[clang] [llvm] [RISC-V] Make EmitRISCVCpuSupports accept multiple features (PR #104917)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 20 21:59:12 PDT 2024


================
@@ -21,6 +21,10 @@
 
 namespace llvm {
 
+namespace RISCV {
+static constexpr unsigned FeatureBitSize = 2;
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topperc wrote:

Can we put this in RISCVISAInfo? It describes the maximum value returned by RISCVISAInfo::getRISCVFeaturesBitsInfo.

https://github.com/llvm/llvm-project/pull/104917


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