[llvm] [DAG][RISCV] Use vp.<binop> when widening illegal types for binops which can trap (PR #105214)

[Craig Topper via llvm-commits]

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@@ -4845,6 +4845,26 @@ SDValue DAGTypeLegalizer::WidenVecRes_BinaryCanTrap(SDNode *N) {
     return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2, Flags);
   }
 
+  // Generate a vp.op if it is custom/legal for the target.  This avoids need
+  // to split and tile the subvectors (below), because the inactive lanes can
+  // simple be disabled. To avoid possible recursion, only do this if the
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topperc wrote:

simple ->simply

https://github.com/llvm/llvm-project/pull/105214