[clang] [llvm] [RISC-V] Make EmitRISCVCpuSupports accept multiple features (PR #104917)

[Craig Topper via llvm-commits]

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@@ -32,6 +32,8 @@ struct RISCVExtensionBitmask {
 };
 } // namespace RISCVExtensionBitmaskTable
 
+static constexpr unsigned RISCVFeatureBitSize = 2;
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topperc wrote:

Maybe this should be a static member of RISCVISAInfo because that's where `getRISCVFeaturesBitsInfo` lives?

https://github.com/llvm/llvm-project/pull/104917