[llvm] ea1f05e - [SelectionDAG] Fix lowering of IEEE 754 2019 minimum/maximum
David Majnemer via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 19 22:10:27 PDT 2024
Author: David Majnemer
Date: 2024-08-20T05:09:49Z
New Revision: ea1f05e6189fbe2b567e795677e1d64acbadc0a2
URL: https://github.com/llvm/llvm-project/commit/ea1f05e6189fbe2b567e795677e1d64acbadc0a2
DIFF: https://github.com/llvm/llvm-project/commit/ea1f05e6189fbe2b567e795677e1d64acbadc0a2.diff
LOG: [SelectionDAG] Fix lowering of IEEE 754 2019 minimum/maximum
We used integer comparisons instead of floating point comparisons
resulting in very odd behavior.
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/test/CodeGen/X86/fminimum-fmaximum.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index ae9f11d02a8ac4..4e796289cff0a1 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -8517,7 +8517,7 @@ SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
// NaN (if exists) will be propagated later, so orderness doesn't matter.
SDValue Compare =
- DAG.getSetCC(DL, CCVT, LHS, RHS, IsMax ? ISD::SETGT : ISD::SETLT);
+ DAG.getSetCC(DL, CCVT, LHS, RHS, IsMax ? ISD::SETOGT : ISD::SETOLT);
MinMax = DAG.getSelect(DL, VT, Compare, LHS, RHS, Flags);
}
@@ -8534,7 +8534,7 @@ SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
if (!MinMaxMustRespectOrderedZero && !N->getFlags().hasNoSignedZeros() &&
!DAG.isKnownNeverZeroFloat(RHS) && !DAG.isKnownNeverZeroFloat(LHS)) {
SDValue IsZero = DAG.getSetCC(DL, CCVT, MinMax,
- DAG.getConstantFP(0.0, DL, VT), ISD::SETEQ);
+ DAG.getConstantFP(0.0, DL, VT), ISD::SETOEQ);
SDValue TestZero =
DAG.getTargetConstant(IsMax ? fcPosZero : fcNegZero, DL, MVT::i32);
SDValue LCmp = DAG.getSelect(
@@ -8823,7 +8823,7 @@ SDValue TargetLowering::expandIS_FPCLASS(EVT ResultVT, SDValue Op,
// Split the value into sign bit and absolute value.
SDValue AbsV = DAG.getNode(ISD::AND, DL, IntVT, OpAsInt, ValueMaskV);
SDValue SignV = DAG.getSetCC(DL, ResultVT, OpAsInt,
- DAG.getConstant(0.0, DL, IntVT), ISD::SETLT);
+ DAG.getConstant(0, DL, IntVT), ISD::SETLT);
// Tests that involve more than one class should be processed first.
SDValue PartialRes;
diff --git a/llvm/test/CodeGen/X86/fminimum-fmaximum.ll b/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
index 55502f37da1a62..41d9a867c0a960 100644
--- a/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
+++ b/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
@@ -11,6 +11,8 @@ declare float @llvm.minimum.f32(float, float)
declare double @llvm.minimum.f64(double, double)
declare <2 x double> @llvm.minimum.v2f64(<2 x double>, <2 x double>)
declare <4 x float> @llvm.maximum.v4f32(<4 x float>, <4 x float>)
+declare <4 x half> @llvm.maximum.v4f16(<4 x half>, <4 x half>)
+declare <4 x bfloat> @llvm.maximum.v4bf16(<4 x bfloat>, <4 x bfloat>)
;
; fmaximum
@@ -1381,3 +1383,1101 @@ define <4 x float> @test_fmaximum_v4f32_splat(<4 x float> %x, float %y) {
%r = call <4 x float> @llvm.maximum.v4f32(<4 x float> %x, <4 x float> %vec) readnone
ret <4 x float> %r
}
+
+define <4 x half> @test_fmaximum_v4f16(<4 x half> %x, <4 x half> %y) {
+; SSE2-LABEL: test_fmaximum_v4f16:
+; SSE2: # %bb.0:
+; SSE2-NEXT: subq $104, %rsp
+; SSE2-NEXT: .cfi_def_cfa_offset 112
+; SSE2-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: psrld $16, %xmm0
+; SSE2-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: movdqa %xmm1, (%rsp) # 16-byte Spill
+; SSE2-NEXT: movdqa %xmm1, %xmm0
+; SSE2-NEXT: psrld $16, %xmm0
+; SSE2-NEXT: callq __extendhfsf2 at PLT
+; SSE2-NEXT: movd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE2-NEXT: callq __extendhfsf2 at PLT
+; SSE2-NEXT: movd {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 4-byte Folded Reload
+; SSE2-NEXT: # xmm4 = mem[0],zero,zero,zero
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: movd %xmm0, %eax
+; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: js .LBB33_2
+; SSE2-NEXT: # %bb.1:
+; SSE2-NEXT: movdqa %xmm4, %xmm2
+; SSE2-NEXT: .LBB33_2:
+; SSE2-NEXT: movdqa %xmm2, %xmm0
+; SSE2-NEXT: cmpunordss %xmm2, %xmm0
+; SSE2-NEXT: movaps %xmm0, %xmm3
+; SSE2-NEXT: andps %xmm2, %xmm3
+; SSE2-NEXT: js .LBB33_4
+; SSE2-NEXT: # %bb.3:
+; SSE2-NEXT: movdqa %xmm1, %xmm4
+; SSE2-NEXT: .LBB33_4:
+; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,1,1]
+; SSE2-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload
+; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,1,1]
+; SSE2-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: maxss %xmm4, %xmm2
+; SSE2-NEXT: andnps %xmm2, %xmm0
+; SSE2-NEXT: orps %xmm3, %xmm0
+; SSE2-NEXT: callq __truncsfhf2 at PLT
+; SSE2-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
+; SSE2-NEXT: callq __extendhfsf2 at PLT
+; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE2-NEXT: callq __extendhfsf2 at PLT
+; SSE2-NEXT: movd {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 4-byte Folded Reload
+; SSE2-NEXT: # xmm4 = mem[0],zero,zero,zero
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: movd %xmm0, %eax
+; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: js .LBB33_6
+; SSE2-NEXT: # %bb.5:
+; SSE2-NEXT: movdqa %xmm4, %xmm2
+; SSE2-NEXT: .LBB33_6:
+; SSE2-NEXT: movdqa %xmm2, %xmm0
+; SSE2-NEXT: cmpunordss %xmm2, %xmm0
+; SSE2-NEXT: movaps %xmm0, %xmm3
+; SSE2-NEXT: andps %xmm2, %xmm3
+; SSE2-NEXT: js .LBB33_8
+; SSE2-NEXT: # %bb.7:
+; SSE2-NEXT: movdqa %xmm1, %xmm4
+; SSE2-NEXT: .LBB33_8:
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE2-NEXT: psrlq $48, %xmm1
+; SSE2-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: movdqa (%rsp), %xmm1 # 16-byte Reload
+; SSE2-NEXT: psrlq $48, %xmm1
+; SSE2-NEXT: movdqa %xmm1, (%rsp) # 16-byte Spill
+; SSE2-NEXT: maxss %xmm4, %xmm2
+; SSE2-NEXT: andnps %xmm2, %xmm0
+; SSE2-NEXT: orps %xmm3, %xmm0
+; SSE2-NEXT: callq __truncsfhf2 at PLT
+; SSE2-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE2-NEXT: callq __extendhfsf2 at PLT
+; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE2-NEXT: callq __extendhfsf2 at PLT
+; SSE2-NEXT: movd {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 4-byte Folded Reload
+; SSE2-NEXT: # xmm4 = mem[0],zero,zero,zero
+; SSE2-NEXT: movd %xmm0, %eax
+; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: js .LBB33_10
+; SSE2-NEXT: # %bb.9:
+; SSE2-NEXT: movdqa %xmm4, %xmm2
+; SSE2-NEXT: .LBB33_10:
+; SSE2-NEXT: movdqa %xmm2, %xmm1
+; SSE2-NEXT: cmpunordss %xmm2, %xmm1
+; SSE2-NEXT: movaps %xmm1, %xmm3
+; SSE2-NEXT: andps %xmm2, %xmm3
+; SSE2-NEXT: js .LBB33_12
+; SSE2-NEXT: # %bb.11:
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: .LBB33_12:
+; SSE2-NEXT: maxss %xmm4, %xmm2
+; SSE2-NEXT: andnps %xmm2, %xmm1
+; SSE2-NEXT: orps %xmm3, %xmm1
+; SSE2-NEXT: movaps %xmm1, %xmm0
+; SSE2-NEXT: callq __truncsfhf2 at PLT
+; SSE2-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
+; SSE2-NEXT: callq __extendhfsf2 at PLT
+; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE2-NEXT: callq __extendhfsf2 at PLT
+; SSE2-NEXT: movd (%rsp), %xmm4 # 4-byte Folded Reload
+; SSE2-NEXT: # xmm4 = mem[0],zero,zero,zero
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: movd %xmm0, %eax
+; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: js .LBB33_14
+; SSE2-NEXT: # %bb.13:
+; SSE2-NEXT: movdqa %xmm4, %xmm2
+; SSE2-NEXT: .LBB33_14:
+; SSE2-NEXT: movdqa %xmm2, %xmm0
+; SSE2-NEXT: cmpunordss %xmm2, %xmm0
+; SSE2-NEXT: movaps %xmm0, %xmm3
+; SSE2-NEXT: andps %xmm2, %xmm3
+; SSE2-NEXT: js .LBB33_16
+; SSE2-NEXT: # %bb.15:
+; SSE2-NEXT: movdqa %xmm1, %xmm4
+; SSE2-NEXT: .LBB33_16:
+; SSE2-NEXT: maxss %xmm4, %xmm2
+; SSE2-NEXT: andnps %xmm2, %xmm0
+; SSE2-NEXT: orps %xmm3, %xmm0
+; SSE2-NEXT: callq __truncsfhf2 at PLT
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE2-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
+; SSE2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; SSE2-NEXT: addq $104, %rsp
+; SSE2-NEXT: .cfi_def_cfa_offset 8
+; SSE2-NEXT: retq
+;
+; AVX1-LABEL: test_fmaximum_v4f16:
+; AVX1: # %bb.0:
+; AVX1-NEXT: subq $120, %rsp
+; AVX1-NEXT: .cfi_def_cfa_offset 128
+; AVX1-NEXT: vmovaps %xmm0, %xmm2
+; AVX1-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
+; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vpsrld $16, %xmm2, %xmm0
+; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovaps %xmm1, (%rsp) # 16-byte Spill
+; AVX1-NEXT: vpsrld $16, %xmm1, %xmm0
+; AVX1-NEXT: callq __extendhfsf2 at PLT
+; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: callq __extendhfsf2 at PLT
+; AVX1-NEXT: vmovd %xmm0, %eax
+; AVX1-NEXT: testl %eax, %eax
+; AVX1-NEXT: js .LBB33_1
+; AVX1-NEXT: # %bb.2:
+; AVX1-NEXT: vmovdqa %xmm0, %xmm1
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; AVX1-NEXT: jmp .LBB33_3
+; AVX1-NEXT: .LBB33_1:
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vmovdqa %xmm0, %xmm2
+; AVX1-NEXT: .LBB33_3:
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: vpsrlq $48, %xmm0, %xmm0
+; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
+; AVX1-NEXT: vpsrlq $48, %xmm0, %xmm0
+; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmaxss %xmm1, %xmm2, %xmm0
+; AVX1-NEXT: vcmpunordss %xmm2, %xmm2, %xmm1
+; AVX1-NEXT: vblendvps %xmm1, %xmm2, %xmm0, %xmm0
+; AVX1-NEXT: callq __truncsfhf2 at PLT
+; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovaps (%rsp), %xmm0 # 16-byte Reload
+; AVX1-NEXT: callq __extendhfsf2 at PLT
+; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: callq __extendhfsf2 at PLT
+; AVX1-NEXT: vmovd %xmm0, %eax
+; AVX1-NEXT: testl %eax, %eax
+; AVX1-NEXT: js .LBB33_4
+; AVX1-NEXT: # %bb.5:
+; AVX1-NEXT: vmovdqa %xmm0, %xmm1
+; AVX1-NEXT: vmovdqa (%rsp), %xmm2 # 16-byte Reload
+; AVX1-NEXT: jmp .LBB33_6
+; AVX1-NEXT: .LBB33_4:
+; AVX1-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vmovdqa %xmm0, %xmm2
+; AVX1-NEXT: .LBB33_6:
+; AVX1-NEXT: vmaxss %xmm1, %xmm2, %xmm0
+; AVX1-NEXT: vcmpunordss %xmm2, %xmm2, %xmm1
+; AVX1-NEXT: vblendvps %xmm1, %xmm2, %xmm0, %xmm0
+; AVX1-NEXT: callq __truncsfhf2 at PLT
+; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: callq __extendhfsf2 at PLT
+; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: callq __extendhfsf2 at PLT
+; AVX1-NEXT: vmovd %xmm0, %eax
+; AVX1-NEXT: testl %eax, %eax
+; AVX1-NEXT: js .LBB33_7
+; AVX1-NEXT: # %bb.8:
+; AVX1-NEXT: vmovdqa %xmm0, %xmm1
+; AVX1-NEXT: vmovdqa (%rsp), %xmm2 # 16-byte Reload
+; AVX1-NEXT: jmp .LBB33_9
+; AVX1-NEXT: .LBB33_7:
+; AVX1-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vmovdqa %xmm0, %xmm2
+; AVX1-NEXT: .LBB33_9:
+; AVX1-NEXT: vmaxss %xmm1, %xmm2, %xmm0
+; AVX1-NEXT: vcmpunordss %xmm2, %xmm2, %xmm1
+; AVX1-NEXT: vblendvps %xmm1, %xmm2, %xmm0, %xmm0
+; AVX1-NEXT: callq __truncsfhf2 at PLT
+; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
+; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: callq __extendhfsf2 at PLT
+; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; AVX1-NEXT: callq __extendhfsf2 at PLT
+; AVX1-NEXT: vmovd %xmm0, %eax
+; AVX1-NEXT: testl %eax, %eax
+; AVX1-NEXT: js .LBB33_10
+; AVX1-NEXT: # %bb.11:
+; AVX1-NEXT: vmovdqa %xmm0, %xmm1
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; AVX1-NEXT: jmp .LBB33_12
+; AVX1-NEXT: .LBB33_10:
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vmovdqa %xmm0, %xmm2
+; AVX1-NEXT: .LBB33_12:
+; AVX1-NEXT: vmaxss %xmm1, %xmm2, %xmm0
+; AVX1-NEXT: vcmpunordss %xmm2, %xmm2, %xmm1
+; AVX1-NEXT: vblendvps %xmm1, %xmm2, %xmm0, %xmm0
+; AVX1-NEXT: callq __truncsfhf2 at PLT
+; AVX1-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1, %xmm1 # 16-byte Folded Reload
+; AVX1-NEXT: # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1],xmm1[2],mem[2],xmm1[3],mem[3]
+; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],zero,zero
+; AVX1-NEXT: addq $120, %rsp
+; AVX1-NEXT: .cfi_def_cfa_offset 8
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: test_fmaximum_v4f16:
+; AVX512: # %bb.0:
+; AVX512-NEXT: pushq %rbp
+; AVX512-NEXT: .cfi_def_cfa_offset 16
+; AVX512-NEXT: pushq %r15
+; AVX512-NEXT: .cfi_def_cfa_offset 24
+; AVX512-NEXT: pushq %r14
+; AVX512-NEXT: .cfi_def_cfa_offset 32
+; AVX512-NEXT: pushq %r13
+; AVX512-NEXT: .cfi_def_cfa_offset 40
+; AVX512-NEXT: pushq %r12
+; AVX512-NEXT: .cfi_def_cfa_offset 48
+; AVX512-NEXT: pushq %rbx
+; AVX512-NEXT: .cfi_def_cfa_offset 56
+; AVX512-NEXT: .cfi_offset %rbx, -56
+; AVX512-NEXT: .cfi_offset %r12, -48
+; AVX512-NEXT: .cfi_offset %r13, -40
+; AVX512-NEXT: .cfi_offset %r14, -32
+; AVX512-NEXT: .cfi_offset %r15, -24
+; AVX512-NEXT: .cfi_offset %rbp, -16
+; AVX512-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[3,3,3,3]
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: xorl %eax, %eax
+; AVX512-NEXT: vucomiss %xmm2, %xmm3
+; AVX512-NEXT: movl $65535, %ecx # imm = 0xFFFF
+; AVX512-NEXT: movl $0, %edx
+; AVX512-NEXT: cmovpl %ecx, %edx
+; AVX512-NEXT: movl $0, %edi
+; AVX512-NEXT: cmoval %ecx, %edi
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm2 = xmm1[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm3 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: vucomiss %xmm2, %xmm3
+; AVX512-NEXT: movl $0, %esi
+; AVX512-NEXT: cmovpl %ecx, %esi
+; AVX512-NEXT: movl $0, %r9d
+; AVX512-NEXT: cmoval %ecx, %r9d
+; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: vucomiss %xmm2, %xmm3
+; AVX512-NEXT: movl $0, %r8d
+; AVX512-NEXT: cmovpl %ecx, %r8d
+; AVX512-NEXT: movl $0, %r11d
+; AVX512-NEXT: cmoval %ecx, %r11d
+; AVX512-NEXT: vpshuflw {{.*#+}} xmm2 = xmm1[3,3,3,3,4,5,6,7]
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vpshuflw {{.*#+}} xmm3 = xmm0[3,3,3,3,4,5,6,7]
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: vucomiss %xmm2, %xmm3
+; AVX512-NEXT: movl $0, %r10d
+; AVX512-NEXT: cmovpl %ecx, %r10d
+; AVX512-NEXT: movl $0, %ebp
+; AVX512-NEXT: cmoval %ecx, %ebp
+; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: vucomiss %xmm2, %xmm3
+; AVX512-NEXT: movl $0, %ebx
+; AVX512-NEXT: cmovpl %ecx, %ebx
+; AVX512-NEXT: movl $0, %r14d
+; AVX512-NEXT: cmoval %ecx, %r14d
+; AVX512-NEXT: vpshuflw {{.*#+}} xmm2 = xmm1[1,1,1,1,4,5,6,7]
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vpshuflw {{.*#+}} xmm3 = xmm0[1,1,1,1,4,5,6,7]
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: vucomiss %xmm2, %xmm3
+; AVX512-NEXT: movl $0, %r15d
+; AVX512-NEXT: cmovpl %ecx, %r15d
+; AVX512-NEXT: movl $0, %r12d
+; AVX512-NEXT: cmoval %ecx, %r12d
+; AVX512-NEXT: vcvtph2ps %xmm1, %xmm2
+; AVX512-NEXT: vcvtph2ps %xmm0, %xmm3
+; AVX512-NEXT: vucomiss %xmm2, %xmm3
+; AVX512-NEXT: movl $0, %r13d
+; AVX512-NEXT: cmoval %ecx, %r13d
+; AVX512-NEXT: vmovd %r13d, %xmm2
+; AVX512-NEXT: vpinsrw $1, %r12d, %xmm2, %xmm2
+; AVX512-NEXT: vpinsrw $2, %r14d, %xmm2, %xmm2
+; AVX512-NEXT: vpinsrw $3, %ebp, %xmm2, %xmm2
+; AVX512-NEXT: vpinsrw $4, %r11d, %xmm2, %xmm2
+; AVX512-NEXT: vpinsrw $5, %r9d, %xmm2, %xmm2
+; AVX512-NEXT: vpinsrw $6, %edi, %xmm2, %xmm2
+; AVX512-NEXT: movl $0, %edi
+; AVX512-NEXT: cmovpl %ecx, %edi
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm3 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm4 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm4, %xmm4
+; AVX512-NEXT: vucomiss %xmm3, %xmm4
+; AVX512-NEXT: movl $0, %r9d
+; AVX512-NEXT: cmoval %ecx, %r9d
+; AVX512-NEXT: vpinsrw $7, %r9d, %xmm2, %xmm2
+; AVX512-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm2
+; AVX512-NEXT: vmovd %edi, %xmm3
+; AVX512-NEXT: vpinsrw $1, %r15d, %xmm3, %xmm3
+; AVX512-NEXT: vpinsrw $2, %ebx, %xmm3, %xmm3
+; AVX512-NEXT: vpinsrw $3, %r10d, %xmm3, %xmm3
+; AVX512-NEXT: vpinsrw $4, %r8d, %xmm3, %xmm3
+; AVX512-NEXT: vpinsrw $5, %esi, %xmm3, %xmm3
+; AVX512-NEXT: vpinsrw $6, %edx, %xmm3, %xmm3
+; AVX512-NEXT: movl $0, %edx
+; AVX512-NEXT: cmovpl %ecx, %edx
+; AVX512-NEXT: vpinsrw $7, %edx, %xmm3, %xmm3
+; AVX512-NEXT: vpbroadcastw {{.*#+}} xmm4 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]
+; AVX512-NEXT: vpblendvb %xmm3, %xmm4, %xmm2, %xmm2
+; AVX512-NEXT: vpshuflw {{.*#+}} xmm3 = xmm2[1,1,1,1,4,5,6,7]
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: vpxor %xmm4, %xmm4, %xmm4
+; AVX512-NEXT: vucomiss %xmm4, %xmm3
+; AVX512-NEXT: movl $65535, %edx # imm = 0xFFFF
+; AVX512-NEXT: cmovnel %eax, %edx
+; AVX512-NEXT: cmovpl %eax, %edx
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm3
+; AVX512-NEXT: vucomiss %xmm4, %xmm3
+; AVX512-NEXT: movl $65535, %esi # imm = 0xFFFF
+; AVX512-NEXT: cmovnel %eax, %esi
+; AVX512-NEXT: cmovpl %eax, %esi
+; AVX512-NEXT: vmovd %esi, %xmm3
+; AVX512-NEXT: vpinsrw $1, %edx, %xmm3, %xmm3
+; AVX512-NEXT: vpshufd {{.*#+}} xmm5 = xmm2[1,1,1,1]
+; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512-NEXT: vucomiss %xmm4, %xmm5
+; AVX512-NEXT: movl $65535, %edx # imm = 0xFFFF
+; AVX512-NEXT: cmovnel %eax, %edx
+; AVX512-NEXT: cmovpl %eax, %edx
+; AVX512-NEXT: vpinsrw $2, %edx, %xmm3, %xmm3
+; AVX512-NEXT: vpshuflw {{.*#+}} xmm5 = xmm2[3,3,3,3,4,5,6,7]
+; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512-NEXT: vucomiss %xmm4, %xmm5
+; AVX512-NEXT: movl $65535, %edx # imm = 0xFFFF
+; AVX512-NEXT: cmovnel %eax, %edx
+; AVX512-NEXT: cmovpl %eax, %edx
+; AVX512-NEXT: vpinsrw $3, %edx, %xmm3, %xmm3
+; AVX512-NEXT: vpshufd {{.*#+}} xmm5 = xmm2[2,3,2,3]
+; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512-NEXT: vucomiss %xmm4, %xmm5
+; AVX512-NEXT: movl $65535, %edx # imm = 0xFFFF
+; AVX512-NEXT: cmovnel %eax, %edx
+; AVX512-NEXT: cmovpl %eax, %edx
+; AVX512-NEXT: vpinsrw $4, %edx, %xmm3, %xmm3
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm5 = xmm2[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512-NEXT: vucomiss %xmm4, %xmm5
+; AVX512-NEXT: movl $65535, %edx # imm = 0xFFFF
+; AVX512-NEXT: cmovnel %eax, %edx
+; AVX512-NEXT: cmovpl %eax, %edx
+; AVX512-NEXT: vpinsrw $5, %edx, %xmm3, %xmm3
+; AVX512-NEXT: vpshufd {{.*#+}} xmm5 = xmm2[3,3,3,3]
+; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512-NEXT: vucomiss %xmm4, %xmm5
+; AVX512-NEXT: movl $65535, %edx # imm = 0xFFFF
+; AVX512-NEXT: cmovnel %eax, %edx
+; AVX512-NEXT: cmovpl %eax, %edx
+; AVX512-NEXT: vpinsrw $6, %edx, %xmm3, %xmm3
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm5 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512-NEXT: vucomiss %xmm4, %xmm5
+; AVX512-NEXT: cmovnel %eax, %ecx
+; AVX512-NEXT: cmovpl %eax, %ecx
+; AVX512-NEXT: vpinsrw $7, %ecx, %xmm3, %xmm3
+; AVX512-NEXT: vpxor %xmm4, %xmm4, %xmm4
+; AVX512-NEXT: vpcmpeqw %xmm4, %xmm0, %xmm5
+; AVX512-NEXT: vpblendvb %xmm5, %xmm0, %xmm2, %xmm0
+; AVX512-NEXT: vpcmpeqw %xmm4, %xmm1, %xmm4
+; AVX512-NEXT: vpblendvb %xmm4, %xmm1, %xmm0, %xmm0
+; AVX512-NEXT: vpblendvb %xmm3, %xmm0, %xmm2, %xmm0
+; AVX512-NEXT: popq %rbx
+; AVX512-NEXT: .cfi_def_cfa_offset 48
+; AVX512-NEXT: popq %r12
+; AVX512-NEXT: .cfi_def_cfa_offset 40
+; AVX512-NEXT: popq %r13
+; AVX512-NEXT: .cfi_def_cfa_offset 32
+; AVX512-NEXT: popq %r14
+; AVX512-NEXT: .cfi_def_cfa_offset 24
+; AVX512-NEXT: popq %r15
+; AVX512-NEXT: .cfi_def_cfa_offset 16
+; AVX512-NEXT: popq %rbp
+; AVX512-NEXT: .cfi_def_cfa_offset 8
+; AVX512-NEXT: retq
+;
+; X86-LABEL: test_fmaximum_v4f16:
+; X86: # %bb.0:
+; X86-NEXT: subl $164, %esp
+; X86-NEXT: .cfi_def_cfa_offset 168
+; X86-NEXT: vmovdqa %xmm0, %xmm2
+; X86-NEXT: vmovdqu %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vpsrlq $48, %xmm0, %xmm0
+; X86-NEXT: vmovdqu %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vmovshdup {{.*#+}} xmm0 = xmm2[1,1,3,3]
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vmovshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vpsrlq $48, %xmm1, %xmm0
+; X86-NEXT: vmovdqu %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vpsrld $16, %xmm2, %xmm0
+; X86-NEXT: vmovdqu %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vpsrld $16, %xmm1, %xmm0
+; X86-NEXT: vmovdqu %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vpextrw $0, %xmm1, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Spill
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vpextrw $0, %xmm0, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Spill
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vpextrw $0, %xmm0, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vpextrw $0, %xmm0, (%esp)
+; X86-NEXT: fstps {{[0-9]+}}(%esp)
+; X86-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Reload
+; X86-NEXT: fstps {{[0-9]+}}(%esp)
+; X86-NEXT: vmovd {{.*#+}} xmm2 = mem[0],zero,zero,zero
+; X86-NEXT: vmovd %xmm2, %eax
+; X86-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-NEXT: testl %eax, %eax
+; X86-NEXT: js .LBB33_1
+; X86-NEXT: # %bb.2:
+; X86-NEXT: vmovdqa %xmm2, %xmm1
+; X86-NEXT: jmp .LBB33_3
+; X86-NEXT: .LBB33_1:
+; X86-NEXT: vmovdqa %xmm0, %xmm1
+; X86-NEXT: vmovdqa %xmm2, %xmm0
+; X86-NEXT: .LBB33_3:
+; X86-NEXT: vmaxss %xmm1, %xmm0, %xmm1
+; X86-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; X86-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vmovss %xmm0, (%esp)
+; X86-NEXT: fstps {{[0-9]+}}(%esp)
+; X86-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Reload
+; X86-NEXT: fstps {{[0-9]+}}(%esp)
+; X86-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X86-NEXT: vmovd %xmm1, %eax
+; X86-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-NEXT: testl %eax, %eax
+; X86-NEXT: js .LBB33_4
+; X86-NEXT: # %bb.5:
+; X86-NEXT: vmovdqa %xmm1, %xmm2
+; X86-NEXT: jmp .LBB33_6
+; X86-NEXT: .LBB33_4:
+; X86-NEXT: vmovdqa %xmm0, %xmm2
+; X86-NEXT: vmovdqa %xmm1, %xmm0
+; X86-NEXT: .LBB33_6:
+; X86-NEXT: vmaxss %xmm2, %xmm0, %xmm1
+; X86-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; X86-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vmovss %xmm0, (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vpextrw $0, %xmm0, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Spill
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vpextrw $0, %xmm0, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Spill
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vpextrw $0, %xmm0, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vpextrw $0, %xmm0, (%esp)
+; X86-NEXT: fstps {{[0-9]+}}(%esp)
+; X86-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Reload
+; X86-NEXT: fstps {{[0-9]+}}(%esp)
+; X86-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X86-NEXT: vmovd %xmm1, %eax
+; X86-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-NEXT: testl %eax, %eax
+; X86-NEXT: js .LBB33_7
+; X86-NEXT: # %bb.8:
+; X86-NEXT: vmovdqa %xmm1, %xmm2
+; X86-NEXT: jmp .LBB33_9
+; X86-NEXT: .LBB33_7:
+; X86-NEXT: vmovdqa %xmm0, %xmm2
+; X86-NEXT: vmovdqa %xmm1, %xmm0
+; X86-NEXT: .LBB33_9:
+; X86-NEXT: vmaxss %xmm2, %xmm0, %xmm1
+; X86-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; X86-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vmovss %xmm0, (%esp)
+; X86-NEXT: fstps {{[0-9]+}}(%esp)
+; X86-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Reload
+; X86-NEXT: fstps {{[0-9]+}}(%esp)
+; X86-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X86-NEXT: vmovd %xmm1, %eax
+; X86-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-NEXT: testl %eax, %eax
+; X86-NEXT: js .LBB33_10
+; X86-NEXT: # %bb.11:
+; X86-NEXT: vmovdqa %xmm1, %xmm2
+; X86-NEXT: jmp .LBB33_12
+; X86-NEXT: .LBB33_10:
+; X86-NEXT: vmovdqa %xmm0, %xmm2
+; X86-NEXT: vmovdqa %xmm1, %xmm0
+; X86-NEXT: .LBB33_12:
+; X86-NEXT: vmaxss %xmm2, %xmm0, %xmm1
+; X86-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; X86-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vmovd %xmm0, (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 # 16-byte Reload
+; X86-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 # 16-byte Reload
+; X86-NEXT: vpunpcklwd {{[-0-9]+}}(%e{{[sb]}}p), %xmm1, %xmm1 # 16-byte Folded Reload
+; X86-NEXT: # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1],xmm1[2],mem[2],xmm1[3],mem[3]
+; X86-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],zero,zero
+; X86-NEXT: addl $164, %esp
+; X86-NEXT: .cfi_def_cfa_offset 4
+; X86-NEXT: retl
+ %r = call <4 x half> @llvm.maximum.v4f16(<4 x half> %x, <4 x half> %y)
+ ret <4 x half> %r
+}
+
+define <4 x bfloat> @test_fmaximum_v4bf16(<4 x bfloat> %x, <4 x bfloat> %y) {
+; SSE2-LABEL: test_fmaximum_v4bf16:
+; SSE2: # %bb.0:
+; SSE2-NEXT: pushq %rbp
+; SSE2-NEXT: .cfi_def_cfa_offset 16
+; SSE2-NEXT: pushq %r15
+; SSE2-NEXT: .cfi_def_cfa_offset 24
+; SSE2-NEXT: pushq %r14
+; SSE2-NEXT: .cfi_def_cfa_offset 32
+; SSE2-NEXT: pushq %rbx
+; SSE2-NEXT: .cfi_def_cfa_offset 40
+; SSE2-NEXT: subq $56, %rsp
+; SSE2-NEXT: .cfi_def_cfa_offset 96
+; SSE2-NEXT: .cfi_offset %rbx, -40
+; SSE2-NEXT: .cfi_offset %r14, -32
+; SSE2-NEXT: .cfi_offset %r15, -24
+; SSE2-NEXT: .cfi_offset %rbp, -16
+; SSE2-NEXT: movdqa %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pextrw $0, %xmm1, %r14d
+; SSE2-NEXT: pextrw $0, %xmm0, %r15d
+; SSE2-NEXT: movdqa %xmm1, %xmm0
+; SSE2-NEXT: psrld $16, %xmm0
+; SSE2-NEXT: pextrw $0, %xmm0, %eax
+; SSE2-NEXT: movdqa %xmm5, %xmm0
+; SSE2-NEXT: psrld $16, %xmm0
+; SSE2-NEXT: pextrw $0, %xmm0, %ecx
+; SSE2-NEXT: shll $16, %ecx
+; SSE2-NEXT: movd %ecx, %xmm3
+; SSE2-NEXT: shll $16, %eax
+; SSE2-NEXT: movd %eax, %xmm2
+; SSE2-NEXT: testl %ecx, %ecx
+; SSE2-NEXT: movdqa %xmm3, %xmm1
+; SSE2-NEXT: js .LBB34_2
+; SSE2-NEXT: # %bb.1:
+; SSE2-NEXT: movdqa %xmm2, %xmm1
+; SSE2-NEXT: .LBB34_2:
+; SSE2-NEXT: movdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,1,1,1]
+; SSE2-NEXT: movdqa %xmm5, (%rsp) # 16-byte Spill
+; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[1,1,1,1]
+; SSE2-NEXT: movdqa %xmm1, %xmm0
+; SSE2-NEXT: cmpunordss %xmm1, %xmm0
+; SSE2-NEXT: movaps %xmm0, %xmm6
+; SSE2-NEXT: andps %xmm1, %xmm6
+; SSE2-NEXT: js .LBB34_4
+; SSE2-NEXT: # %bb.3:
+; SSE2-NEXT: movdqa %xmm3, %xmm2
+; SSE2-NEXT: .LBB34_4:
+; SSE2-NEXT: pextrw $0, %xmm4, %ebp
+; SSE2-NEXT: pextrw $0, %xmm5, %ebx
+; SSE2-NEXT: maxss %xmm2, %xmm1
+; SSE2-NEXT: andnps %xmm1, %xmm0
+; SSE2-NEXT: orps %xmm6, %xmm0
+; SSE2-NEXT: callq __truncsfbf2 at PLT
+; SSE2-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: shll $16, %r15d
+; SSE2-NEXT: movd %r15d, %xmm3
+; SSE2-NEXT: shll $16, %r14d
+; SSE2-NEXT: movd %r14d, %xmm2
+; SSE2-NEXT: testl %r15d, %r15d
+; SSE2-NEXT: movdqa %xmm3, %xmm1
+; SSE2-NEXT: js .LBB34_6
+; SSE2-NEXT: # %bb.5:
+; SSE2-NEXT: movdqa %xmm2, %xmm1
+; SSE2-NEXT: .LBB34_6:
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; SSE2-NEXT: psrlq $48, %xmm5
+; SSE2-NEXT: movdqa (%rsp), %xmm6 # 16-byte Reload
+; SSE2-NEXT: psrlq $48, %xmm6
+; SSE2-NEXT: movdqa %xmm1, %xmm0
+; SSE2-NEXT: cmpunordss %xmm1, %xmm0
+; SSE2-NEXT: movaps %xmm0, %xmm4
+; SSE2-NEXT: andps %xmm1, %xmm4
+; SSE2-NEXT: js .LBB34_8
+; SSE2-NEXT: # %bb.7:
+; SSE2-NEXT: movdqa %xmm3, %xmm2
+; SSE2-NEXT: .LBB34_8:
+; SSE2-NEXT: pextrw $0, %xmm5, %r15d
+; SSE2-NEXT: pextrw $0, %xmm6, %r14d
+; SSE2-NEXT: maxss %xmm2, %xmm1
+; SSE2-NEXT: andnps %xmm1, %xmm0
+; SSE2-NEXT: orps %xmm4, %xmm0
+; SSE2-NEXT: callq __truncsfbf2 at PLT
+; SSE2-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: shll $16, %ebx
+; SSE2-NEXT: movd %ebx, %xmm1
+; SSE2-NEXT: shll $16, %ebp
+; SSE2-NEXT: movd %ebp, %xmm3
+; SSE2-NEXT: testl %ebx, %ebx
+; SSE2-NEXT: movdqa %xmm1, %xmm2
+; SSE2-NEXT: js .LBB34_10
+; SSE2-NEXT: # %bb.9:
+; SSE2-NEXT: movdqa %xmm3, %xmm2
+; SSE2-NEXT: .LBB34_10:
+; SSE2-NEXT: movdqa %xmm2, %xmm0
+; SSE2-NEXT: cmpunordss %xmm2, %xmm0
+; SSE2-NEXT: movaps %xmm0, %xmm4
+; SSE2-NEXT: andps %xmm2, %xmm4
+; SSE2-NEXT: js .LBB34_12
+; SSE2-NEXT: # %bb.11:
+; SSE2-NEXT: movdqa %xmm1, %xmm3
+; SSE2-NEXT: .LBB34_12:
+; SSE2-NEXT: maxss %xmm3, %xmm2
+; SSE2-NEXT: andnps %xmm2, %xmm0
+; SSE2-NEXT: orps %xmm4, %xmm0
+; SSE2-NEXT: callq __truncsfbf2 at PLT
+; SSE2-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
+; SSE2-NEXT: shll $16, %r14d
+; SSE2-NEXT: movd %r14d, %xmm1
+; SSE2-NEXT: shll $16, %r15d
+; SSE2-NEXT: movd %r15d, %xmm3
+; SSE2-NEXT: testl %r14d, %r14d
+; SSE2-NEXT: movdqa %xmm1, %xmm2
+; SSE2-NEXT: js .LBB34_14
+; SSE2-NEXT: # %bb.13:
+; SSE2-NEXT: movdqa %xmm3, %xmm2
+; SSE2-NEXT: .LBB34_14:
+; SSE2-NEXT: movdqa %xmm2, %xmm0
+; SSE2-NEXT: cmpunordss %xmm2, %xmm0
+; SSE2-NEXT: movaps %xmm0, %xmm4
+; SSE2-NEXT: andps %xmm2, %xmm4
+; SSE2-NEXT: js .LBB34_16
+; SSE2-NEXT: # %bb.15:
+; SSE2-NEXT: movdqa %xmm1, %xmm3
+; SSE2-NEXT: .LBB34_16:
+; SSE2-NEXT: maxss %xmm3, %xmm2
+; SSE2-NEXT: andnps %xmm2, %xmm0
+; SSE2-NEXT: orps %xmm4, %xmm0
+; SSE2-NEXT: callq __truncsfbf2 at PLT
+; SSE2-NEXT: movdqa (%rsp), %xmm1 # 16-byte Reload
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE2-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
+; SSE2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; SSE2-NEXT: addq $56, %rsp
+; SSE2-NEXT: .cfi_def_cfa_offset 40
+; SSE2-NEXT: popq %rbx
+; SSE2-NEXT: .cfi_def_cfa_offset 32
+; SSE2-NEXT: popq %r14
+; SSE2-NEXT: .cfi_def_cfa_offset 24
+; SSE2-NEXT: popq %r15
+; SSE2-NEXT: .cfi_def_cfa_offset 16
+; SSE2-NEXT: popq %rbp
+; SSE2-NEXT: .cfi_def_cfa_offset 8
+; SSE2-NEXT: retq
+;
+; AVX1-LABEL: test_fmaximum_v4bf16:
+; AVX1: # %bb.0:
+; AVX1-NEXT: pushq %rbp
+; AVX1-NEXT: .cfi_def_cfa_offset 16
+; AVX1-NEXT: pushq %r15
+; AVX1-NEXT: .cfi_def_cfa_offset 24
+; AVX1-NEXT: pushq %r14
+; AVX1-NEXT: .cfi_def_cfa_offset 32
+; AVX1-NEXT: pushq %r13
+; AVX1-NEXT: .cfi_def_cfa_offset 40
+; AVX1-NEXT: pushq %r12
+; AVX1-NEXT: .cfi_def_cfa_offset 48
+; AVX1-NEXT: pushq %rbx
+; AVX1-NEXT: .cfi_def_cfa_offset 56
+; AVX1-NEXT: subq $56, %rsp
+; AVX1-NEXT: .cfi_def_cfa_offset 112
+; AVX1-NEXT: .cfi_offset %rbx, -56
+; AVX1-NEXT: .cfi_offset %r12, -48
+; AVX1-NEXT: .cfi_offset %r13, -40
+; AVX1-NEXT: .cfi_offset %r14, -32
+; AVX1-NEXT: .cfi_offset %r15, -24
+; AVX1-NEXT: .cfi_offset %rbp, -16
+; AVX1-NEXT: vpsrlq $48, %xmm0, %xmm2
+; AVX1-NEXT: vpsrlq $48, %xmm1, %xmm3
+; AVX1-NEXT: vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
+; AVX1-NEXT: vpextrw $0, %xmm4, %ebx
+; AVX1-NEXT: vmovshdup {{.*#+}} xmm4 = xmm1[1,1,3,3]
+; AVX1-NEXT: vpextrw $0, %xmm4, %ebp
+; AVX1-NEXT: vpextrw $0, %xmm0, %r12d
+; AVX1-NEXT: vpextrw $0, %xmm1, %r13d
+; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0
+; AVX1-NEXT: vpextrw $0, %xmm0, %eax
+; AVX1-NEXT: vpsrld $16, %xmm1, %xmm0
+; AVX1-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX1-NEXT: shll $16, %ecx
+; AVX1-NEXT: vmovd %ecx, %xmm0
+; AVX1-NEXT: shll $16, %eax
+; AVX1-NEXT: vmovd %eax, %xmm4
+; AVX1-NEXT: js .LBB34_1
+; AVX1-NEXT: # %bb.2:
+; AVX1-NEXT: vmovdqa %xmm4, %xmm1
+; AVX1-NEXT: jmp .LBB34_3
+; AVX1-NEXT: .LBB34_1:
+; AVX1-NEXT: vmovdqa %xmm0, %xmm1
+; AVX1-NEXT: vmovdqa %xmm4, %xmm0
+; AVX1-NEXT: .LBB34_3:
+; AVX1-NEXT: vpextrw $0, %xmm2, %r14d
+; AVX1-NEXT: vpextrw $0, %xmm3, %r15d
+; AVX1-NEXT: vmaxss %xmm1, %xmm0, %xmm1
+; AVX1-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; AVX1-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; AVX1-NEXT: callq __truncsfbf2 at PLT
+; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: shll $16, %r13d
+; AVX1-NEXT: vmovd %r13d, %xmm0
+; AVX1-NEXT: shll $16, %r12d
+; AVX1-NEXT: vmovd %r12d, %xmm2
+; AVX1-NEXT: js .LBB34_4
+; AVX1-NEXT: # %bb.5:
+; AVX1-NEXT: vmovdqa %xmm2, %xmm1
+; AVX1-NEXT: jmp .LBB34_6
+; AVX1-NEXT: .LBB34_4:
+; AVX1-NEXT: vmovdqa %xmm0, %xmm1
+; AVX1-NEXT: vmovdqa %xmm2, %xmm0
+; AVX1-NEXT: .LBB34_6:
+; AVX1-NEXT: vmaxss %xmm1, %xmm0, %xmm1
+; AVX1-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; AVX1-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; AVX1-NEXT: callq __truncsfbf2 at PLT
+; AVX1-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX1-NEXT: shll $16, %ebp
+; AVX1-NEXT: vmovd %ebp, %xmm0
+; AVX1-NEXT: shll $16, %ebx
+; AVX1-NEXT: vmovd %ebx, %xmm2
+; AVX1-NEXT: js .LBB34_7
+; AVX1-NEXT: # %bb.8:
+; AVX1-NEXT: vmovdqa %xmm2, %xmm1
+; AVX1-NEXT: jmp .LBB34_9
+; AVX1-NEXT: .LBB34_7:
+; AVX1-NEXT: vmovdqa %xmm0, %xmm1
+; AVX1-NEXT: vmovdqa %xmm2, %xmm0
+; AVX1-NEXT: .LBB34_9:
+; AVX1-NEXT: vmaxss %xmm1, %xmm0, %xmm1
+; AVX1-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; AVX1-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; AVX1-NEXT: callq __truncsfbf2 at PLT
+; AVX1-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
+; AVX1-NEXT: shll $16, %r15d
+; AVX1-NEXT: vmovd %r15d, %xmm0
+; AVX1-NEXT: shll $16, %r14d
+; AVX1-NEXT: vmovd %r14d, %xmm2
+; AVX1-NEXT: js .LBB34_10
+; AVX1-NEXT: # %bb.11:
+; AVX1-NEXT: vmovdqa %xmm2, %xmm1
+; AVX1-NEXT: jmp .LBB34_12
+; AVX1-NEXT: .LBB34_10:
+; AVX1-NEXT: vmovdqa %xmm0, %xmm1
+; AVX1-NEXT: vmovdqa %xmm2, %xmm0
+; AVX1-NEXT: .LBB34_12:
+; AVX1-NEXT: vmaxss %xmm1, %xmm0, %xmm1
+; AVX1-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; AVX1-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; AVX1-NEXT: callq __truncsfbf2 at PLT
+; AVX1-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
+; AVX1-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; AVX1-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1, %xmm1 # 16-byte Folded Reload
+; AVX1-NEXT: # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1],xmm1[2],mem[2],xmm1[3],mem[3]
+; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],zero,zero
+; AVX1-NEXT: addq $56, %rsp
+; AVX1-NEXT: .cfi_def_cfa_offset 56
+; AVX1-NEXT: popq %rbx
+; AVX1-NEXT: .cfi_def_cfa_offset 48
+; AVX1-NEXT: popq %r12
+; AVX1-NEXT: .cfi_def_cfa_offset 40
+; AVX1-NEXT: popq %r13
+; AVX1-NEXT: .cfi_def_cfa_offset 32
+; AVX1-NEXT: popq %r14
+; AVX1-NEXT: .cfi_def_cfa_offset 24
+; AVX1-NEXT: popq %r15
+; AVX1-NEXT: .cfi_def_cfa_offset 16
+; AVX1-NEXT: popq %rbp
+; AVX1-NEXT: .cfi_def_cfa_offset 8
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: test_fmaximum_v4bf16:
+; AVX512: # %bb.0:
+; AVX512-NEXT: pushq %rbp
+; AVX512-NEXT: .cfi_def_cfa_offset 16
+; AVX512-NEXT: pushq %r15
+; AVX512-NEXT: .cfi_def_cfa_offset 24
+; AVX512-NEXT: pushq %r14
+; AVX512-NEXT: .cfi_def_cfa_offset 32
+; AVX512-NEXT: pushq %r13
+; AVX512-NEXT: .cfi_def_cfa_offset 40
+; AVX512-NEXT: pushq %r12
+; AVX512-NEXT: .cfi_def_cfa_offset 48
+; AVX512-NEXT: pushq %rbx
+; AVX512-NEXT: .cfi_def_cfa_offset 56
+; AVX512-NEXT: pushq %rax
+; AVX512-NEXT: .cfi_def_cfa_offset 64
+; AVX512-NEXT: .cfi_offset %rbx, -56
+; AVX512-NEXT: .cfi_offset %r12, -48
+; AVX512-NEXT: .cfi_offset %r13, -40
+; AVX512-NEXT: .cfi_offset %r14, -32
+; AVX512-NEXT: .cfi_offset %r15, -24
+; AVX512-NEXT: .cfi_offset %rbp, -16
+; AVX512-NEXT: vmovq %xmm1, %r13
+; AVX512-NEXT: movq %r13, %rbx
+; AVX512-NEXT: shrq $32, %rbx
+; AVX512-NEXT: vmovq %xmm0, %rbp
+; AVX512-NEXT: movq %rbp, %r14
+; AVX512-NEXT: shrq $32, %r14
+; AVX512-NEXT: movq %r13, %r15
+; AVX512-NEXT: shrq $48, %r15
+; AVX512-NEXT: movq %rbp, %r12
+; AVX512-NEXT: shrq $48, %r12
+; AVX512-NEXT: movl %ebp, %eax
+; AVX512-NEXT: andl $-65536, %eax # imm = 0xFFFF0000
+; AVX512-NEXT: sets %cl
+; AVX512-NEXT: kmovw %ecx, %k1
+; AVX512-NEXT: movl %r13d, %ecx
+; AVX512-NEXT: andl $-65536, %ecx # imm = 0xFFFF0000
+; AVX512-NEXT: vmovd %ecx, %xmm1
+; AVX512-NEXT: vmovd %eax, %xmm0
+; AVX512-NEXT: vmovdqa %xmm0, %xmm2
+; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k1}
+; AVX512-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k1}
+; AVX512-NEXT: vmaxss %xmm2, %xmm1, %xmm0
+; AVX512-NEXT: vcmpunordss %xmm1, %xmm1, %k1
+; AVX512-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
+; AVX512-NEXT: callq __truncsfbf2 at PLT
+; AVX512-NEXT: vpextrw $0, %xmm0, {{[0-9]+}}(%rsp)
+; AVX512-NEXT: shll $16, %ebp
+; AVX512-NEXT: sets %al
+; AVX512-NEXT: kmovw %eax, %k1
+; AVX512-NEXT: shll $16, %r13d
+; AVX512-NEXT: vmovd %r13d, %xmm1
+; AVX512-NEXT: vmovd %ebp, %xmm0
+; AVX512-NEXT: vmovdqa %xmm0, %xmm2
+; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k1}
+; AVX512-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k1}
+; AVX512-NEXT: vmaxss %xmm2, %xmm1, %xmm0
+; AVX512-NEXT: vcmpunordss %xmm1, %xmm1, %k1
+; AVX512-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
+; AVX512-NEXT: callq __truncsfbf2 at PLT
+; AVX512-NEXT: vpextrw $0, %xmm0, (%rsp)
+; AVX512-NEXT: shll $16, %r12d
+; AVX512-NEXT: sets %al
+; AVX512-NEXT: kmovw %eax, %k1
+; AVX512-NEXT: shll $16, %r15d
+; AVX512-NEXT: vmovd %r15d, %xmm1
+; AVX512-NEXT: vmovd %r12d, %xmm0
+; AVX512-NEXT: vmovdqa %xmm0, %xmm2
+; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k1}
+; AVX512-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k1}
+; AVX512-NEXT: vmaxss %xmm2, %xmm1, %xmm0
+; AVX512-NEXT: vcmpunordss %xmm1, %xmm1, %k1
+; AVX512-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
+; AVX512-NEXT: callq __truncsfbf2 at PLT
+; AVX512-NEXT: vpextrw $0, %xmm0, {{[0-9]+}}(%rsp)
+; AVX512-NEXT: shll $16, %r14d
+; AVX512-NEXT: sets %al
+; AVX512-NEXT: kmovw %eax, %k1
+; AVX512-NEXT: shll $16, %ebx
+; AVX512-NEXT: vmovd %ebx, %xmm1
+; AVX512-NEXT: vmovd %r14d, %xmm0
+; AVX512-NEXT: vmovdqa %xmm0, %xmm2
+; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k1}
+; AVX512-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k1}
+; AVX512-NEXT: vmaxss %xmm2, %xmm1, %xmm0
+; AVX512-NEXT: vcmpunordss %xmm1, %xmm1, %k1
+; AVX512-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
+; AVX512-NEXT: callq __truncsfbf2 at PLT
+; AVX512-NEXT: vpextrw $0, %xmm0, {{[0-9]+}}(%rsp)
+; AVX512-NEXT: vmovaps (%rsp), %xmm0
+; AVX512-NEXT: addq $8, %rsp
+; AVX512-NEXT: .cfi_def_cfa_offset 56
+; AVX512-NEXT: popq %rbx
+; AVX512-NEXT: .cfi_def_cfa_offset 48
+; AVX512-NEXT: popq %r12
+; AVX512-NEXT: .cfi_def_cfa_offset 40
+; AVX512-NEXT: popq %r13
+; AVX512-NEXT: .cfi_def_cfa_offset 32
+; AVX512-NEXT: popq %r14
+; AVX512-NEXT: .cfi_def_cfa_offset 24
+; AVX512-NEXT: popq %r15
+; AVX512-NEXT: .cfi_def_cfa_offset 16
+; AVX512-NEXT: popq %rbp
+; AVX512-NEXT: .cfi_def_cfa_offset 8
+; AVX512-NEXT: retq
+;
+; X86-LABEL: test_fmaximum_v4bf16:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: pushl %ebx
+; X86-NEXT: .cfi_def_cfa_offset 12
+; X86-NEXT: pushl %edi
+; X86-NEXT: .cfi_def_cfa_offset 16
+; X86-NEXT: pushl %esi
+; X86-NEXT: .cfi_def_cfa_offset 20
+; X86-NEXT: subl $68, %esp
+; X86-NEXT: .cfi_def_cfa_offset 88
+; X86-NEXT: .cfi_offset %esi, -20
+; X86-NEXT: .cfi_offset %edi, -16
+; X86-NEXT: .cfi_offset %ebx, -12
+; X86-NEXT: .cfi_offset %ebp, -8
+; X86-NEXT: vpsrlq $48, %xmm0, %xmm2
+; X86-NEXT: vpsrlq $48, %xmm1, %xmm3
+; X86-NEXT: vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
+; X86-NEXT: vpextrw $0, %xmm4, %esi
+; X86-NEXT: vmovshdup {{.*#+}} xmm4 = xmm1[1,1,3,3]
+; X86-NEXT: vpextrw $0, %xmm4, %ebx
+; X86-NEXT: vpextrw $0, %xmm0, %eax
+; X86-NEXT: vpextrw $0, %xmm1, %ecx
+; X86-NEXT: vpsrld $16, %xmm0, %xmm0
+; X86-NEXT: vpextrw $0, %xmm0, %edx
+; X86-NEXT: vpsrld $16, %xmm1, %xmm0
+; X86-NEXT: vpextrw $0, %xmm0, %edi
+; X86-NEXT: shll $16, %edi
+; X86-NEXT: vmovd %edi, %xmm0
+; X86-NEXT: shll $16, %edx
+; X86-NEXT: vmovd %edx, %xmm4
+; X86-NEXT: js .LBB34_1
+; X86-NEXT: # %bb.2:
+; X86-NEXT: vmovdqa %xmm4, %xmm1
+; X86-NEXT: jmp .LBB34_3
+; X86-NEXT: .LBB34_1:
+; X86-NEXT: vmovdqa %xmm0, %xmm1
+; X86-NEXT: vmovdqa %xmm4, %xmm0
+; X86-NEXT: .LBB34_3:
+; X86-NEXT: vpextrw $0, %xmm2, %edi
+; X86-NEXT: vpextrw $0, %xmm3, %ebp
+; X86-NEXT: vmaxss %xmm1, %xmm0, %xmm1
+; X86-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; X86-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; X86-NEXT: vmovss %xmm0, (%esp)
+; X86-NEXT: shll $16, %ecx
+; X86-NEXT: vmovd %ecx, %xmm0
+; X86-NEXT: shll $16, %eax
+; X86-NEXT: vmovd %eax, %xmm2
+; X86-NEXT: js .LBB34_4
+; X86-NEXT: # %bb.5:
+; X86-NEXT: vmovdqa %xmm2, %xmm1
+; X86-NEXT: jmp .LBB34_6
+; X86-NEXT: .LBB34_4:
+; X86-NEXT: vmovdqa %xmm0, %xmm1
+; X86-NEXT: vmovdqa %xmm2, %xmm0
+; X86-NEXT: .LBB34_6:
+; X86-NEXT: vmaxss %xmm1, %xmm0, %xmm1
+; X86-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; X86-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: calll __truncsfbf2
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vmovss %xmm0, (%esp)
+; X86-NEXT: shll $16, %ebx
+; X86-NEXT: vmovd %ebx, %xmm0
+; X86-NEXT: shll $16, %esi
+; X86-NEXT: vmovd %esi, %xmm2
+; X86-NEXT: js .LBB34_7
+; X86-NEXT: # %bb.8:
+; X86-NEXT: vmovdqa %xmm2, %xmm1
+; X86-NEXT: jmp .LBB34_9
+; X86-NEXT: .LBB34_7:
+; X86-NEXT: vmovdqa %xmm0, %xmm1
+; X86-NEXT: vmovdqa %xmm2, %xmm0
+; X86-NEXT: .LBB34_9:
+; X86-NEXT: vmaxss %xmm1, %xmm0, %xmm1
+; X86-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; X86-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: calll __truncsfbf2
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vmovss %xmm0, (%esp)
+; X86-NEXT: shll $16, %ebp
+; X86-NEXT: vmovd %ebp, %xmm0
+; X86-NEXT: shll $16, %edi
+; X86-NEXT: vmovd %edi, %xmm2
+; X86-NEXT: js .LBB34_10
+; X86-NEXT: # %bb.11:
+; X86-NEXT: vmovdqa %xmm2, %xmm1
+; X86-NEXT: jmp .LBB34_12
+; X86-NEXT: .LBB34_10:
+; X86-NEXT: vmovdqa %xmm0, %xmm1
+; X86-NEXT: vmovdqa %xmm2, %xmm0
+; X86-NEXT: .LBB34_12:
+; X86-NEXT: vmaxss %xmm1, %xmm0, %xmm1
+; X86-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
+; X86-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: calll __truncsfbf2
+; X86-NEXT: vmovups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: vmovd %xmm0, (%esp)
+; X86-NEXT: calll __truncsfbf2
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 # 16-byte Reload
+; X86-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
+; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 # 16-byte Reload
+; X86-NEXT: vpunpcklwd {{[-0-9]+}}(%e{{[sb]}}p), %xmm1, %xmm1 # 16-byte Folded Reload
+; X86-NEXT: # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1],xmm1[2],mem[2],xmm1[3],mem[3]
+; X86-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],zero,zero
+; X86-NEXT: addl $68, %esp
+; X86-NEXT: .cfi_def_cfa_offset 20
+; X86-NEXT: popl %esi
+; X86-NEXT: .cfi_def_cfa_offset 16
+; X86-NEXT: popl %edi
+; X86-NEXT: .cfi_def_cfa_offset 12
+; X86-NEXT: popl %ebx
+; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: popl %ebp
+; X86-NEXT: .cfi_def_cfa_offset 4
+; X86-NEXT: retl
+ %r = call <4 x bfloat> @llvm.maximum.v4bf16(<4 x bfloat> %x, <4 x bfloat> %y)
+ ret <4 x bfloat> %r
+}
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