[llvm] 7f968e3 - [RISCV] Improve BCLRITwoBitsMaskHigh SDNodeXForm. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 19 10:33:54 PDT 2024
Author: Craig Topper
Date: 2024-08-19T10:32:47-07:00
New Revision: 7f968e3aea41264a952692a4bf32e5e2b612d44e
URL: https://github.com/llvm/llvm-project/commit/7f968e3aea41264a952692a4bf32e5e2b612d44e
DIFF: https://github.com/llvm/llvm-project/commit/7f968e3aea41264a952692a4bf32e5e2b612d44e.diff
LOG: [RISCV] Improve BCLRITwoBitsMaskHigh SDNodeXForm. NFC
Use getZExtValue instead of getSExtValue since we are going to
overwrite the sign extension on RV32. getZExtValue should be cheaper than
getSExtValue.
Use maskLeadingOnes to improve readability.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
index f27039b1c658d..8e6f281027695 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
@@ -124,9 +124,9 @@ def BCLRITwoBitsMaskLow : SDNodeXForm<imm, [{
}]>;
def BCLRITwoBitsMaskHigh : SDNodeXForm<imm, [{
- uint64_t I = N->getSExtValue();
+ uint64_t I = N->getZExtValue();
if (!Subtarget->is64Bit())
- I |= 0xffffffffull << 32;
+ I |= maskLeadingOnes<uint64_t>(32);
return CurDAG->getTargetConstant(llvm::Log2_64(~I), SDLoc(N),
N->getValueType(0));
}]>;
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