[llvm] [RFC][X86] Allow speculative BSR/BSF instructions on targets with CMOV (PR #102885)

[via llvm-commits]

goldsteinn wrote:

> Hmm, we already have TuningLZCNTFalseDeps - would it be worth a separate PR adding TuningBitScanFalseDeps and zeroing out the destination register?

FalseDep is somewhat incorrect, it preserves the destination so its an actual dep. Also FWIW Intel is going to change the documentation on BSF/BSR soon to state that it leaves the destination unchanged as opposed to undefined (i.e same as AMD).

https://github.com/llvm/llvm-project/pull/102885