[llvm] [AMDGPU] Update instrumentAddress method to support aligned size and unusual size accesses. (PR #104804)

[Matt Arsenault via llvm-commits]

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@@ -179,6 +181,46 @@ void instrumentAddress(Module &M, IRBuilder<> &IRB, Instruction *OrigIns,
   return;
 }
 
+void instrumentAddress(Module &M, IRBuilder<> &IRB, Instruction *OrigIns,
+                       Instruction *InsertBefore, Value *Addr,
+                       MaybeAlign Alignment, TypeSize TypeStoreSize,
+                       bool IsWrite, Value *SizeArgument, bool UseCalls,
+                       bool Recover, int AsanScale, int AsanOffset) {
+  // Instrument a 1-, 2-, 4-, 8-, or 16- byte access with one check
+  // if the data is properly aligned.
+  if (!TypeStoreSize.isScalable()) {
+    unsigned Granularity = 1 << AsanScale;
+    const auto FixedSize = TypeStoreSize.getFixedValue();
+    switch (FixedSize) {
+    case 8:
+    case 16:
+    case 32:
+    case 64:
+    case 128:
+      if (!Alignment || *Alignment >= Granularity ||
+          *Alignment >= FixedSize / 8)
+        return instrumentAddressImpl(
+            M, IRB, OrigIns, InsertBefore, Addr, Alignment, FixedSize, IsWrite,
+            SizeArgument, UseCalls, Recover, AsanScale, AsanOffset);
+    }
+  }
+  // Instrument unusual size or unusual alignment.
+  IRB.SetInsertPoint(InsertBefore);
+  Type *AddrTy = Addr->getType();
+  Type *IntptrTy = M.getDataLayout().getIntPtrType(
+      M.getContext(), AddrTy->getPointerAddressSpace());
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arsenm wrote:

You can just pass AddrTy 

https://github.com/llvm/llvm-project/pull/104804