[llvm] [AMDGPU] Move AMDGPUCodeGenPassBuilder into AMDGPUTargetMachine(NFC) (PR #103720)
Christudasan Devadasan via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 19 07:06:45 PDT 2024
https://github.com/cdevadas updated https://github.com/llvm/llvm-project/pull/103720
>From c41f6b9512a733abb58a980b33e299d92ffd64a6 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan <Christudasan.Devadasan at amd.com>
Date: Wed, 14 Aug 2024 12:28:32 +0530
Subject: [PATCH] [AMDGPU] Move AMDGPUCodeGenPassBuilder into
AMDGPUTargetMachine (NFC)
This will allow us to reuse the existing flags and the static
functions while building the pipeline for new pass manager.
---
.../AMDGPU/AMDGPUCodeGenPassBuilder.cpp | 97 -------------------
.../Target/AMDGPU/AMDGPUCodeGenPassBuilder.h | 33 -------
.../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 95 +++++++++++++++++-
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 27 +++++-
llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 -
llvm/lib/Target/AMDGPU/R600TargetMachine.cpp | 1 -
.../Target/AMDGPU/SIMachineFunctionInfo.cpp | 1 -
7 files changed, 112 insertions(+), 143 deletions(-)
delete mode 100644 llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp
delete mode 100644 llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp
deleted file mode 100644
index 36f44a20d95532..00000000000000
--- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp
+++ /dev/null
@@ -1,97 +0,0 @@
-//===- lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp ---------------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#include "AMDGPUCodeGenPassBuilder.h"
-#include "AMDGPU.h"
-#include "AMDGPUISelDAGToDAG.h"
-#include "AMDGPUPerfHintAnalysis.h"
-#include "AMDGPUTargetMachine.h"
-#include "AMDGPUUnifyDivergentExitNodes.h"
-#include "SIFixSGPRCopies.h"
-#include "llvm/Analysis/UniformityAnalysis.h"
-#include "llvm/Transforms/Scalar/FlattenCFG.h"
-#include "llvm/Transforms/Scalar/Sink.h"
-#include "llvm/Transforms/Scalar/StructurizeCFG.h"
-#include "llvm/Transforms/Utils/FixIrreducible.h"
-#include "llvm/Transforms/Utils/LCSSA.h"
-#include "llvm/Transforms/Utils/UnifyLoopExits.h"
-
-using namespace llvm;
-
-AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder(
- GCNTargetMachine &TM, const CGPassBuilderOption &Opts,
- PassInstrumentationCallbacks *PIC)
- : CodeGenPassBuilder(TM, Opts, PIC) {
- Opt.RequiresCodeGenSCCOrder = true;
- // Exceptions and StackMaps are not supported, so these passes will never do
- // anything.
- // Garbage collection is not supported.
- disablePass<StackMapLivenessPass, FuncletLayoutPass,
- ShadowStackGCLoweringPass>();
-}
-
-void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
- const bool LateCFGStructurize = AMDGPUTargetMachine::EnableLateStructurizeCFG;
- const bool DisableStructurizer = AMDGPUTargetMachine::DisableStructurizer;
- const bool EnableStructurizerWorkarounds =
- AMDGPUTargetMachine::EnableStructurizerWorkarounds;
-
- if (TM.getOptLevel() > CodeGenOptLevel::None)
- addPass(FlattenCFGPass());
-
- if (TM.getOptLevel() > CodeGenOptLevel::None)
- addPass(SinkingPass());
-
- addPass(AMDGPULateCodeGenPreparePass(TM));
-
- // Merge divergent exit nodes. StructurizeCFG won't recognize the multi-exit
- // regions formed by them.
-
- addPass(AMDGPUUnifyDivergentExitNodesPass());
-
- if (!LateCFGStructurize && !DisableStructurizer) {
- if (EnableStructurizerWorkarounds) {
- addPass(FixIrreduciblePass());
- addPass(UnifyLoopExitsPass());
- }
-
- addPass(StructurizeCFGPass(/*SkipUniformRegions=*/false));
- }
-
- addPass(AMDGPUAnnotateUniformValuesPass());
-
- if (!LateCFGStructurize && !DisableStructurizer) {
- addPass(SIAnnotateControlFlowPass(TM));
-
- // TODO: Move this right after structurizeCFG to avoid extra divergence
- // analysis. This depends on stopping SIAnnotateControlFlow from making
- // control flow modifications.
- addPass(AMDGPURewriteUndefForPHIPass());
- }
-
- addPass(LCSSAPass());
-
- if (TM.getOptLevel() > CodeGenOptLevel::Less)
- addPass(AMDGPUPerfHintAnalysisPass(TM));
-
- // FIXME: Why isn't this queried as required from AMDGPUISelDAGToDAG, and why
- // isn't this in addInstSelector?
- addPass(RequireAnalysisPass<UniformityInfoAnalysis, Function>());
-}
-
-void AMDGPUCodeGenPassBuilder::addAsmPrinter(AddMachinePass &addPass,
- CreateMCStreamer) const {
- // TODO: Add AsmPrinter.
-}
-
-Error AMDGPUCodeGenPassBuilder::addInstSelector(AddMachinePass &addPass) const {
- addPass(AMDGPUISelDAGToDAGPass(TM));
- addPass(SIFixSGPRCopiesPass());
- addPass(SILowerI1CopiesPass());
- return Error::success();
-}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h
deleted file mode 100644
index e656e166b3eb2e..00000000000000
--- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h
+++ /dev/null
@@ -1,33 +0,0 @@
-//===- lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h -----------*- C++ -*---===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUCODEGENPASSBUILDER_H
-#define LLVM_LIB_TARGET_AMDGPU_AMDGPUCODEGENPASSBUILDER_H
-
-#include "llvm/MC/MCStreamer.h"
-#include "llvm/Passes/CodeGenPassBuilder.h"
-
-namespace llvm {
-
-class GCNTargetMachine;
-
-class AMDGPUCodeGenPassBuilder
- : public CodeGenPassBuilder<AMDGPUCodeGenPassBuilder, GCNTargetMachine> {
-public:
- AMDGPUCodeGenPassBuilder(GCNTargetMachine &TM,
- const CGPassBuilderOption &Opts,
- PassInstrumentationCallbacks *PIC);
-
- void addPreISel(AddIRPass &addPass) const;
- void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;
- Error addInstSelector(AddMachinePass &) const;
-};
-
-} // namespace llvm
-
-#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUCODEGENPASSBUILDER_H
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index b8aa93285ad849..60d6b04f819841 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -7,15 +7,16 @@
//===----------------------------------------------------------------------===//
//
/// \file
-/// The AMDGPU target machine contains all of the hardware specific
-/// information needed to emit code for SI+ GPUs.
+/// This file contains both AMDGPU target machine and the CodeGen pass builder.
+/// The AMDGPU target machine contains all of the hardware specific information
+/// needed to emit code for SI+ GPUs in the legacy pass manager pipeline. The
+/// CodeGen pass builder handles the pass pipeline for new pass manager.
//
//===----------------------------------------------------------------------===//
#include "AMDGPUTargetMachine.h"
#include "AMDGPU.h"
#include "AMDGPUAliasAnalysis.h"
-#include "AMDGPUCodeGenPassBuilder.h"
#include "AMDGPUCtorDtorLowering.h"
#include "AMDGPUExportClustering.h"
#include "AMDGPUIGroupLP.h"
@@ -40,6 +41,7 @@
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm/Analysis/CGSCCPassManager.h"
#include "llvm/Analysis/CallGraphSCCPass.h"
+#include "llvm/Analysis/UniformityAnalysis.h"
#include "llvm/CodeGen/GlobalISel/CSEInfo.h"
#include "llvm/CodeGen/GlobalISel/IRTranslator.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
@@ -64,10 +66,16 @@
#include "llvm/Transforms/IPO/GlobalDCE.h"
#include "llvm/Transforms/IPO/Internalize.h"
#include "llvm/Transforms/Scalar.h"
+#include "llvm/Transforms/Scalar/FlattenCFG.h"
#include "llvm/Transforms/Scalar/GVN.h"
#include "llvm/Transforms/Scalar/InferAddressSpaces.h"
+#include "llvm/Transforms/Scalar/Sink.h"
+#include "llvm/Transforms/Scalar/StructurizeCFG.h"
#include "llvm/Transforms/Utils.h"
+#include "llvm/Transforms/Utils/FixIrreducible.h"
+#include "llvm/Transforms/Utils/LCSSA.h"
#include "llvm/Transforms/Utils/SimplifyLibCalls.h"
+#include "llvm/Transforms/Utils/UnifyLoopExits.h"
#include "llvm/Transforms/Vectorize/LoadStoreVectorizer.h"
#include <optional>
@@ -930,7 +938,7 @@ Error GCNTargetMachine::buildCodeGenPipeline(
}
//===----------------------------------------------------------------------===//
-// AMDGPU Pass Setup
+// AMDGPU Legacy Pass Setup
//===----------------------------------------------------------------------===//
std::unique_ptr<CSEConfigBase> llvm::AMDGPUPassConfig::getCSEConfig() const {
@@ -1214,7 +1222,7 @@ MachineFunctionInfo *R600TargetMachine::createMachineFunctionInfo(
}
//===----------------------------------------------------------------------===//
-// GCN Pass Setup
+// GCN Legacy Pass Setup
//===----------------------------------------------------------------------===//
ScheduleDAGInstrs *GCNPassConfig::createMachineScheduler(
@@ -1751,3 +1759,80 @@ bool GCNTargetMachine::parseMachineFunctionInfo(
return false;
}
+
+//===----------------------------------------------------------------------===//
+// AMDGPU CodeGen Pass Builder interface.
+//===----------------------------------------------------------------------===//
+
+AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder(
+ GCNTargetMachine &TM, const CGPassBuilderOption &Opts,
+ PassInstrumentationCallbacks *PIC)
+ : CodeGenPassBuilder(TM, Opts, PIC) {
+ Opt.RequiresCodeGenSCCOrder = true;
+ // Exceptions and StackMaps are not supported, so these passes will never do
+ // anything.
+ // Garbage collection is not supported.
+ disablePass<StackMapLivenessPass, FuncletLayoutPass,
+ ShadowStackGCLoweringPass>();
+}
+
+void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
+ const bool LateCFGStructurize = AMDGPUTargetMachine::EnableLateStructurizeCFG;
+ const bool DisableStructurizer = AMDGPUTargetMachine::DisableStructurizer;
+ const bool EnableStructurizerWorkarounds =
+ AMDGPUTargetMachine::EnableStructurizerWorkarounds;
+
+ if (TM.getOptLevel() > CodeGenOptLevel::None)
+ addPass(FlattenCFGPass());
+
+ if (TM.getOptLevel() > CodeGenOptLevel::None)
+ addPass(SinkingPass());
+
+ addPass(AMDGPULateCodeGenPreparePass(TM));
+
+ // Merge divergent exit nodes. StructurizeCFG won't recognize the multi-exit
+ // regions formed by them.
+
+ addPass(AMDGPUUnifyDivergentExitNodesPass());
+
+ if (!LateCFGStructurize && !DisableStructurizer) {
+ if (EnableStructurizerWorkarounds) {
+ addPass(FixIrreduciblePass());
+ addPass(UnifyLoopExitsPass());
+ }
+
+ addPass(StructurizeCFGPass(/*SkipUniformRegions=*/false));
+ }
+
+ addPass(AMDGPUAnnotateUniformValuesPass());
+
+ if (!LateCFGStructurize && !DisableStructurizer) {
+ addPass(SIAnnotateControlFlowPass(TM));
+
+ // TODO: Move this right after structurizeCFG to avoid extra divergence
+ // analysis. This depends on stopping SIAnnotateControlFlow from making
+ // control flow modifications.
+ addPass(AMDGPURewriteUndefForPHIPass());
+ }
+
+ addPass(LCSSAPass());
+
+ if (TM.getOptLevel() > CodeGenOptLevel::Less)
+ addPass(AMDGPUPerfHintAnalysisPass(TM));
+
+ // FIXME: Why isn't this queried as required from AMDGPUISelDAGToDAG, and why
+ // isn't this in addInstSelector?
+ addPass(RequireAnalysisPass<UniformityInfoAnalysis, Function>());
+}
+
+void AMDGPUCodeGenPassBuilder::addAsmPrinter(AddMachinePass &addPass,
+ CreateMCStreamer) const {
+ // TODO: Add AsmPrinter.
+}
+
+Error AMDGPUCodeGenPassBuilder::addInstSelector(AddMachinePass &addPass) const {
+ addPass(AMDGPUISelDAGToDAGPass(TM));
+ addPass(SIFixSGPRCopiesPass());
+ addPass(SILowerI1CopiesPass());
+ return Error::success();
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
index 4d39ad2b415052..4dffddd2d44ccf 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
@@ -16,6 +16,8 @@
#include "GCNSubtarget.h"
#include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/MC/MCStreamer.h"
+#include "llvm/Passes/CodeGenPassBuilder.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>
#include <utility>
@@ -47,7 +49,8 @@ class AMDGPUTargetMachine : public LLVMTargetMachine {
~AMDGPUTargetMachine() override;
const TargetSubtargetInfo *getSubtargetImpl() const;
- const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
+ const TargetSubtargetInfo *
+ getSubtargetImpl(const Function &) const override = 0;
TargetLoweringObjectFile *getObjFileLowering() const override {
return TLOF.get();
@@ -94,9 +97,7 @@ class GCNTargetMachine final : public AMDGPUTargetMachine {
TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
- bool useIPRA() const override {
- return true;
- }
+ bool useIPRA() const override { return true; }
Error buildCodeGenPipeline(ModulePassManager &MPM, raw_pwrite_stream &Out,
raw_pwrite_stream *DwoOut,
@@ -120,7 +121,7 @@ class GCNTargetMachine final : public AMDGPUTargetMachine {
};
//===----------------------------------------------------------------------===//
-// AMDGPU Pass Setup
+// AMDGPU Pass Setup - For Legacy Pass Manager.
//===----------------------------------------------------------------------===//
class AMDGPUPassConfig : public TargetPassConfig {
@@ -158,6 +159,22 @@ class AMDGPUPassConfig : public TargetPassConfig {
}
};
+//===----------------------------------------------------------------------===//
+// AMDGPU CodeGen Pass Builder interface.
+//===----------------------------------------------------------------------===//
+
+class AMDGPUCodeGenPassBuilder
+ : public CodeGenPassBuilder<AMDGPUCodeGenPassBuilder, GCNTargetMachine> {
+public:
+ AMDGPUCodeGenPassBuilder(GCNTargetMachine &TM,
+ const CGPassBuilderOption &Opts,
+ PassInstrumentationCallbacks *PIC);
+
+ void addPreISel(AddIRPass &addPass) const;
+ void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;
+ Error addInstSelector(AddMachinePass &) const;
+};
+
} // end namespace llvm
#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
diff --git a/llvm/lib/Target/AMDGPU/CMakeLists.txt b/llvm/lib/Target/AMDGPU/CMakeLists.txt
index 671caf8484cd97..f493076f5bb8a3 100644
--- a/llvm/lib/Target/AMDGPU/CMakeLists.txt
+++ b/llvm/lib/Target/AMDGPU/CMakeLists.txt
@@ -51,7 +51,6 @@ add_llvm_target(AMDGPUCodeGen
AMDGPUAtomicOptimizer.cpp
AMDGPUAttributor.cpp
AMDGPUCallLowering.cpp
- AMDGPUCodeGenPassBuilder.cpp
AMDGPUCodeGenPrepare.cpp
AMDGPUCombinerHelper.cpp
AMDGPUCtorDtorLowering.cpp
diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
index c550cfaf06c100..fe1927e5bdf74a 100644
--- a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
@@ -13,7 +13,6 @@
//===----------------------------------------------------------------------===//
#include "R600TargetMachine.h"
-#include "AMDGPUTargetMachine.h"
#include "R600.h"
#include "R600CodeGenPassBuilder.h"
#include "R600MachineScheduler.h"
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
index c5251826b117cb..4818f1b13caa6a 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
@@ -8,7 +8,6 @@
#include "SIMachineFunctionInfo.h"
#include "AMDGPUSubtarget.h"
-#include "AMDGPUTargetMachine.h"
#include "GCNSubtarget.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "SIRegisterInfo.h"
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