[llvm] [RISCV] Add isel optimization for (add x, (and (sra y, c2), c1)) to recover regression from #101751. (PR #104114)

[Yingwei Zheng via llvm-commits]

================
@@ -1479,6 +1479,27 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
           return;
         }
       }
+
+      // Look for (and (sra y, c2), c1) where c1 is a shifted mask with c3
+      // leading zeros and c4 trailing zeros. If c2 is greater than c3, we can
+      // use (slli (srli (srai y, c2 - c3), c3 + c4), c4).
+      if (isShiftedMask_64(C1) && !Skip) {
----------------
dtcxzyw wrote:

Reproducer:
```
define i64 @func0000000000000004(i64 %x) nounwind {
entry:
  %y = ashr i64 %x, 8
  %z = and i64 %y, -8
  ret i64 %z
}
```
Before:
```
func0000000000000004:
        srai    a0, a0, 8
        andi    a0, a0, -8
        ret
```
After this patch:
```
func0000000000000004:
        srai    a0, a0, 8
        srli    a0, a0, 3
        slli    a0, a0, 3
        ret
```

>  It needs to have leading zeros.

But it is not guarded by `isShiftedMask_64`. We should explicitly check this corner case.


https://github.com/llvm/llvm-project/pull/104114