[llvm] [GlobalIsel] Pust cast through build vector (PR #104634)

[Thorsten Schütt via llvm-commits]

tschuett wrote:

In the combiner, see C++, we replace cast(build vector) by buildvector(fleet of free casts). `TLI.isZExtFree` and `TLI. isTruncateFree`.

AArch64:
```
// All 32-bit GPR operations implicitly zero the high-half of the corresponding
// 64-bit GPR.
bool AArch64TargetLowering::isZExtFree(Type *Ty1, Type *Ty2) const {
  if (!Ty1->isIntegerTy() || !Ty2->isIntegerTy())
    return false;
  unsigned NumBits1 = Ty1->getPrimitiveSizeInBits();
  unsigned NumBits2 = Ty2->getPrimitiveSizeInBits();
  return NumBits1 == 32 && NumBits2 == 64;
}
```
We can also see this in combine-cast.mir.

Probably the select materializes all free gMIR instructions. That's why see the increase of instructions in some cases.

How can we avoid to materialize free instructions? Or do we have to emit them for correctness? Do we need to add more combines for better cleanup?



https://github.com/llvm/llvm-project/pull/104634