[llvm] [SPARC] Loosen assertions in printOperand for inline asm operands (PR #104692)

[via llvm-commits]

https://github.com/koachan created https://github.com/llvm/llvm-project/pull/104692

Inline asm operands could contain any kind of relocation, so bypass the checks so that it can be performed against the instructions inside the asm string instead.

Fixes https://github.com/llvm/llvm-project/issues/103493

>From 61184129efe8367ebf861e354e7c8e3cee933a4b Mon Sep 17 00:00:00 2001
From: Koakuma <koachan at protonmail.com>
Date: Fri, 16 Aug 2024 09:01:58 +0700
Subject: [PATCH] [SPARC] Loosen assertions in printOperand for inline asm
 operands

Inline asm operands could contain any kind of relocation in its
operands, so bypass the checks so that it can be performed against
the instructions inside the inline asm string instead.

Fixes https://github.com/llvm/llvm-project/issues/103493
---
 llvm/lib/Target/Sparc/SparcAsmPrinter.cpp | 18 ++++++++++--------
 llvm/test/CodeGen/SPARC/inlineasm.ll      | 10 ++++++++++
 2 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
index 6855471840e9db..8a19ae9ad175fc 100644
--- a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -31,6 +31,7 @@
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/MC/TargetRegistry.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
@@ -317,10 +318,11 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
 #ifndef NDEBUG
   // Verify the target flags.
   if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) {
-    if (MI->getOpcode() == SP::CALL)
+    unsigned Opc = MI->getOpcode();
+    if (Opc == SP::CALL)
       assert(TF == SparcMCExpr::VK_Sparc_None &&
              "Cannot handle target flags on call address");
-    else if (MI->getOpcode() == SP::SETHIi)
+    else if (Opc == SP::SETHIi)
       assert((TF == SparcMCExpr::VK_Sparc_HI
               || TF == SparcMCExpr::VK_Sparc_H44
               || TF == SparcMCExpr::VK_Sparc_HH
@@ -331,28 +333,28 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
               || TF == SparcMCExpr::VK_Sparc_TLS_IE_HI22
               || TF == SparcMCExpr::VK_Sparc_TLS_LE_HIX22) &&
              "Invalid target flags for address operand on sethi");
-    else if (MI->getOpcode() == SP::TLS_CALL)
+    else if (Opc == SP::TLS_CALL)
       assert((TF == SparcMCExpr::VK_Sparc_None
               || TF == SparcMCExpr::VK_Sparc_TLS_GD_CALL
               || TF == SparcMCExpr::VK_Sparc_TLS_LDM_CALL) &&
              "Cannot handle target flags on tls call address");
-    else if (MI->getOpcode() == SP::TLS_ADDrr)
+    else if (Opc == SP::TLS_ADDrr)
       assert((TF == SparcMCExpr::VK_Sparc_TLS_GD_ADD
               || TF == SparcMCExpr::VK_Sparc_TLS_LDM_ADD
               || TF == SparcMCExpr::VK_Sparc_TLS_LDO_ADD
               || TF == SparcMCExpr::VK_Sparc_TLS_IE_ADD) &&
              "Cannot handle target flags on add for TLS");
-    else if (MI->getOpcode() == SP::TLS_LDrr)
+    else if (Opc == SP::TLS_LDrr)
       assert(TF == SparcMCExpr::VK_Sparc_TLS_IE_LD &&
              "Cannot handle target flags on ld for TLS");
-    else if (MI->getOpcode() == SP::TLS_LDXrr)
+    else if (Opc == SP::TLS_LDXrr)
       assert(TF == SparcMCExpr::VK_Sparc_TLS_IE_LDX &&
              "Cannot handle target flags on ldx for TLS");
-    else if (MI->getOpcode() == SP::XORri)
+    else if (Opc == SP::XORri)
       assert((TF == SparcMCExpr::VK_Sparc_TLS_LDO_LOX10
               || TF == SparcMCExpr::VK_Sparc_TLS_LE_LOX10) &&
              "Cannot handle target flags on xor for TLS");
-    else
+    else if (Opc != SP::INLINEASM && Opc != SP::INLINEASM_BR)
       assert((TF == SparcMCExpr::VK_Sparc_LO
               || TF == SparcMCExpr::VK_Sparc_M44
               || TF == SparcMCExpr::VK_Sparc_L44
diff --git a/llvm/test/CodeGen/SPARC/inlineasm.ll b/llvm/test/CodeGen/SPARC/inlineasm.ll
index 14ea0a2a126027..e2853f03a002e6 100644
--- a/llvm/test/CodeGen/SPARC/inlineasm.ll
+++ b/llvm/test/CodeGen/SPARC/inlineasm.ll
@@ -152,3 +152,13 @@ define i64 @test_twinword(){
   %1 = tail call i64 asm sideeffect "rd %asr5, ${0:L} \0A\09 srlx ${0:L}, 32, ${0:H}", "={i0}"()
   ret i64 %1
 }
+
+; CHECK-LABEL: test_symbol:
+; CHECK: ba,a brtarget
+define void @test_symbol() {
+Entry:
+  call void asm sideeffect "ba,a ${0}", "X"(ptr @brtarget)
+  unreachable
+}
+
+declare void @brtarget()