[llvm] [AMDGPU] Correctly insert s_nops for dst forwarding hazard (PR #100276)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 16 23:19:55 PDT 2024
================
@@ -913,26 +978,14 @@ int GCNHazardRecognizer::checkVALUHazards(MachineInstr *VALU) {
const int Shift16DefWaitstates = 1;
auto IsShift16BitDefFn = [this, VALU](const MachineInstr &MI) {
- if (!SIInstrInfo::isVALU(MI))
- return false;
- const SIInstrInfo *TII = ST.getInstrInfo();
- if (SIInstrInfo::isSDWA(MI)) {
- if (auto *DstSel = TII->getNamedOperand(MI, AMDGPU::OpName::dst_sel))
- if (DstSel->getImm() == AMDGPU::SDWA::DWORD)
- return false;
- } else {
- if (!AMDGPU::hasNamedOperand(MI.getOpcode(), AMDGPU::OpName::op_sel) ||
- !(TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers)
- ->getImm() &
- SISrcMods::DST_OP_SEL))
- return false;
- }
const SIRegisterInfo *TRI = ST.getRegisterInfo();
- if (auto *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst)) {
- Register Def = Dst->getReg();
-
- for (const MachineOperand &Use : VALU->explicit_uses()) {
- if (Use.isReg() && TRI->regsOverlap(Def, Use.getReg()))
+ const MachineOperand *ForwardedDst = getDstSelForwardingOperand(MI, ST);
+ if (ForwardedDst) {
+ return consumesDstSelForwardingOperand(VALU, ForwardedDst, TRI);
+ } else if (MI.isInlineAsm()) {
----------------
arsenm wrote:
No else after return
```suggestion
}
if (MI.isInlineAsm()) {
```
https://github.com/llvm/llvm-project/pull/100276
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