[llvm] 6e0fc15 - [RISCV] Remove feature implication from Zvknhb.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 16 18:36:18 PDT 2024
Author: Craig Topper
Date: 2024-08-16T18:35:06-07:00
New Revision: 6e0fc155782ff5307245a85c7b037a2998ec6c86
URL: https://github.com/llvm/llvm-project/commit/6e0fc155782ff5307245a85c7b037a2998ec6c86
DIFF: https://github.com/llvm/llvm-project/commit/6e0fc155782ff5307245a85c7b037a2998ec6c86.diff
LOG: [RISCV] Remove feature implication from Zvknhb.
We don't have feature implications on any other Zvk extensions and
we have error messages in RISCVISAInfo if Zve or V is not enabled.
I'm working on testing and refactoring in that code so I'd like to
make it consistent.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVFeatures.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index e278fa3fe31764..f2610ea7c9768e 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -780,8 +780,7 @@ def HasStdExtZvknha : Predicate<"Subtarget->hasStdExtZvknha()">,
def FeatureStdExtZvknhb
: RISCVExtension<"zvknhb", 1, 0,
- "'Zvknhb' (Vector SHA-2 (SHA-256 and SHA-512))",
- [FeatureStdExtZve64x]>,
+ "'Zvknhb' (Vector SHA-2 (SHA-256 and SHA-512))">,
RISCVExtensionBitmask<0, 56>;
def HasStdExtZvknhb : Predicate<"Subtarget->hasStdExtZvknhb()">,
AssemblerPredicate<(all_of FeatureStdExtZvknhb),
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