[llvm] AMDGPU: Add tonearest and towardzero roundings for intrinsic llvm.fptrunc.round (PR #104486)

[Changpeng Fang via llvm-commits]

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@@ -6671,10 +6655,34 @@ SDValue SITargetLowering::getFPExtOrFPRound(SelectionDAG &DAG,
                 DAG.getTargetConstant(0, DL, MVT::i32));
 }
 
+SDValue SITargetLowering::lowerFPTRUNC_ROUND(SDValue Op,
+                                             SelectionDAG &DAG) const {
+  if (Op.getOperand(0)->getValueType(0) != MVT::f32)
+    return SDValue();
+
+  // Only support towardzero, tonearest, upward and downward.
+  int RoundMode = Op.getConstantOperandVal(1);
+  if (RoundMode < (int)RoundingMode::TowardZero ||
+      RoundMode > (int)RoundingMode::TowardNegative)
+    return SDValue();
+
+  // "round.towardzero" -> TowardZero 0        -> FP_ROUND_ROUND_TO_ZERO 3
+  // "round.tonearest"  -> NearestTiesToEven 1 -> FP_ROUND_ROUND_TO_NEAREST 0
+  // "round.upward"     -> TowardPositive 2    -> FP_ROUND_ROUND_TO_INF 1
+  // "round.downward    -> TowardNegative 3    -> FP_ROUND_ROUND_TO_NEGINF 2
+  unsigned HW_Mode = (RoundMode + 3) % 4;
+  SDLoc DL(Op);
+  unsigned Opc = AMDGPUISD::FPTRUNC_ROUND;
+  return DAG.getNode(Opc, DL, Op.getNode()->getVTList(), Op->getOperand(0),
+                     DAG.getTargetConstant(HW_Mode, DL, MVT::i32));
+}
+
 SDValue SITargetLowering::lowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
   assert(Op.getValueType() == MVT::f16 &&
          "Do not know how to custom lower FP_ROUND for non-f16 type");
 
+  return Op;
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changpeng wrote:

Sorry, this was the leftover when I tried something else. should not change fp_round

https://github.com/llvm/llvm-project/pull/104486