[llvm] [RISCV] Gate CSR defined by experimental and vendor extensions (PR #104424)

[Jesse Huang via llvm-commits]

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@@ -1923,8 +1923,25 @@ ParseStatus RISCVAsmParser::parseCSRSystemRegister(OperandVector &Operands) {
 
     // Accept a named Sys Reg if the required features are present.
     if (SysReg) {
-      if (!SysReg->haveRequiredFeatures(getSTI().getFeatureBits()))
-        return Error(S, "system register use requires an option to be enabled");
+      const auto &FeatureBits = getSTI().getFeatureBits();
+      if (!SysReg->haveRequiredFeatures(FeatureBits)) {
+        const auto *Feature = std::find_if(
+            RISCVFeatureKV, std::end(RISCVFeatureKV), [&](auto Feature) {
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jaidTw wrote:

fixed

https://github.com/llvm/llvm-project/pull/104424