[llvm] [AMDGPU] Disable inline constants for pseudo scalar transcendentals (PR #104395)

[Matt Arsenault via llvm-commits]

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@@ -5776,6 +5776,10 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr &MI, unsigned OpIdx,
           return false;
       }
     }
+  } else if (ST.hasNoF16PseudoScalarTransInlineConstants() &&
+             isF16PseudoScalarTrans(MI.getOpcode()) && !MO->isReg() &&
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arsenm wrote:

swap order of checks, isReg before isF16... 

https://github.com/llvm/llvm-project/pull/104395