[llvm] [SelectionDAG][X86] Add SelectionDAG::getSignedConstant and use it in a few places. (PR #104555)

[Simon Pilgrim via llvm-commits]

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@@ -4474,7 +4474,7 @@ void SelectionDAGBuilder::visitAlloca(const AllocaInst &I) {
 
   // Mask out the low bits for alignment purposes.
   AllocSize = DAG.getNode(ISD::AND, dl, AllocSize.getValueType(), AllocSize,
-                          DAG.getConstant(~StackAlignMask, dl, IntPtr));
+                          DAG.getSignedConstant(~StackAlignMask, dl, IntPtr));
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RKSimon wrote:

Can we use DAG.getZeroExtendInReg here?

https://github.com/llvm/llvm-project/pull/104555