[llvm] AMDGPU: Improve codegen for intrinsic llvm.fptrunc.round (PR #104486)

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git-clang-format --diff 932538199818554cee7347c17de3f4e004b75257 621d6b988124140164cbcdb0a9cb38d9d3ff9bf7 --extensions h,cpp -- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/AMDGPU/SIISelLowering.h llvm/lib/Target/AMDGPU/SIModeRegister.cpp
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diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 01651c06b0..d617117b69 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -6660,7 +6660,7 @@ SDValue SITargetLowering::lowerFPTRUNC_ROUND(SDValue Op,
   if (Op.getOperand(0)->getValueType(0) != MVT::f32)
     return SDValue();
 
-  // Only support towardzero, tonearest, upward and downward. 
+  // Only support towardzero, tonearest, upward and downward.
   int RoundMode = Op.getConstantOperandVal(1);
   if (RoundMode < (int)RoundingMode::TowardZero ||
       RoundMode > (int)RoundingMode::TowardNegative)
diff --git a/llvm/lib/Target/AMDGPU/SIModeRegister.cpp b/llvm/lib/Target/AMDGPU/SIModeRegister.cpp
index a7bfa2216e..37c3445ab7 100644
--- a/llvm/lib/Target/AMDGPU/SIModeRegister.cpp
+++ b/llvm/lib/Target/AMDGPU/SIModeRegister.cpp
@@ -164,8 +164,7 @@ FunctionPass *llvm::createSIModeRegisterPass() { return new SIModeRegister(); }
 Status SIModeRegister::getInstructionMode(MachineInstr &MI,
                                           const SIInstrInfo *TII) {
   unsigned Opcode = MI.getOpcode();
-  if (TII->usesFPDPRounding(MI) ||
-      Opcode == AMDGPU::FPTRUNC_ROUND_F32_TO_F16) {
+  if (TII->usesFPDPRounding(MI) || Opcode == AMDGPU::FPTRUNC_ROUND_F32_TO_F16) {
     switch (Opcode) {
     case AMDGPU::V_INTERP_P1LL_F16:
     case AMDGPU::V_INTERP_P1LV_F16:
@@ -189,8 +188,7 @@ Status SIModeRegister::getInstructionMode(MachineInstr &MI,
         B.addImm(0); // omod
       } else
         MI.setDesc(TII->get(AMDGPU::V_CVT_F16_F32_e32));
-      return Status(FP_ROUND_MODE_DP(3),
-                    FP_ROUND_MODE_DP(Mode));
+      return Status(FP_ROUND_MODE_DP(3), FP_ROUND_MODE_DP(Mode));
     }
     default:
       return DefaultStatus;

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https://github.com/llvm/llvm-project/pull/104486