[llvm] [SPIR-V] Rework usage of virtual registers' types and classes (PR #104104)
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Wed Aug 14 11:02:51 PDT 2024
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git-clang-format --diff 27a713f5b042bbcd88491c991877d0806aa66913 6e959d3767f60f929f647555b485ce73e38995a8 --extensions cpp,h -- llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp llvm/lib/Target/SPIRV/SPIRVISelLowering.h llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
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diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
index e98067ed40..4bf96b1b87 100644
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
@@ -2108,8 +2108,8 @@ static bool buildEnqueueKernel(const SPIRV::IncomingCall *Call,
auto GEPInst = MIRBuilder.buildIntrinsic(
Intrinsic::spv_gep, ArrayRef<Register>{Reg}, true, false);
GEPInst
- .addImm(GepMI->getOperand(2).getImm()) // In bound.
- .addUse(ArrayMI->getOperand(0).getReg()) // Alloca.
+ .addImm(GepMI->getOperand(2).getImm()) // In bound.
+ .addUse(ArrayMI->getOperand(0).getReg()) // Alloca.
.addUse(buildConstantIntReg32(0, MIRBuilder, GR)) // Indices.
.addUse(buildConstantIntReg32(I, MIRBuilder, GR));
LocalSizes.push_back(Reg);
@@ -2149,8 +2149,8 @@ static bool buildEnqueueKernel(const SPIRV::IncomingCall *Call,
// Param Size: Size of block literal structure.
MIB.addUse(buildConstantIntReg32(DL.getTypeStoreSize(PType), MIRBuilder, GR));
// Param Aligment: Aligment of block literal structure.
- MIB.addUse(
- buildConstantIntReg32(DL.getPrefTypeAlign(PType).value(), MIRBuilder, GR));
+ MIB.addUse(buildConstantIntReg32(DL.getPrefTypeAlign(PType).value(),
+ MIRBuilder, GR));
for (unsigned i = 0; i < LocalSizes.size(); i++)
MIB.addUse(LocalSizes[i]);
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index 621b6bdf71..67cc15977b 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -287,7 +287,8 @@ Register SPIRVGlobalRegistry::buildConstantInt(uint64_t Val,
bool EmitIR) {
assert(SpvType);
auto &MF = MIRBuilder.getMF();
- const IntegerType *LLVMIntTy = cast<IntegerType>(getTypeForSPIRVType(SpvType));
+ const IntegerType *LLVMIntTy =
+ cast<IntegerType>(getTypeForSPIRVType(SpvType));
// Find a constant in DT or build a new one.
const auto ConstInt =
ConstantInt::get(const_cast<IntegerType *>(LLVMIntTy), Val);
@@ -635,7 +636,7 @@ Register SPIRVGlobalRegistry::buildGlobalVariable(
// Set to Reg the same type as ResVReg has.
auto MRI = MIRBuilder.getMRI();
-// assert(MRI->getType(ResVReg).isPointer() && "Pointer type is expected");
+ // assert(MRI->getType(ResVReg).isPointer() && "Pointer type is expected");
if (Reg != ResVReg) {
LLT RegLLTy =
LLT::pointer(MRI->getType(ResVReg).getAddressSpace(), getPointerSize());
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index ee8bbbdf20..e096378b6b 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -1635,7 +1635,8 @@ void SPIRVInstructionSelector::renderImm32(MachineInstrBuilder &MIB,
Register
SPIRVInstructionSelector::buildI32Constant(uint32_t Val, MachineInstr &I,
const SPIRVType *ResType) const {
- Type *LLVMTy = IntegerType::get(GR.CurMF->getFunction().getContext(), 32); // lev
+ Type *LLVMTy =
+ IntegerType::get(GR.CurMF->getFunction().getContext(), 32); // lev
const SPIRVType *SpvI32Ty =
ResType ? ResType : GR.getOrCreateSPIRVIntegerType(32, I, TII);
// Find a constant in DT or build a new one.
@@ -2410,7 +2411,8 @@ bool SPIRVInstructionSelector::selectSpvThreadId(Register ResVReg,
// 93 ThreadId reads the thread ID
MachineIRBuilder MIRBuilder(I);
- const SPIRVType *U32Type = GR.getOrCreateSPIRVIntegerType(32, MIRBuilder); // lev
+ const SPIRVType *U32Type =
+ GR.getOrCreateSPIRVIntegerType(32, MIRBuilder); // lev
const SPIRVType *Vec3Ty =
GR.getOrCreateSPIRVVectorType(U32Type, 3, MIRBuilder);
const SPIRVType *PtrType = GR.getOrCreateSPIRVPointerType(
diff --git a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
index bcfcf0b21c..db8dffc306 100644
--- a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
@@ -608,8 +608,8 @@ static void processInstrsWithTypeFolding(MachineFunction &MF,
if (UseMI.getOpcode() == TargetOpcode::G_ADDRSPACE_CAST)
continue;
}
-// if (MRI.getType(DstReg).isPointer())
-// MRI.setType(DstReg, LLT::pointer(0, GR->getPointerSize()));
+ // if (MRI.getType(DstReg).isPointer())
+ // MRI.setType(DstReg, LLT::pointer(0, GR->getPointerSize()));
}
}
}
@@ -703,11 +703,11 @@ insertInlineAsmProcess(MachineFunction &MF, SPIRVGlobalRegistry *GR,
unsigned IntrIdx = 2;
for (unsigned Idx : Ops) {
++IntrIdx;
- //const MachineOperand &MO = I2->getOperand(Idx);
- //if (MO.isReg())
- // AsmCall.addUse(MO.getReg());
- //else
- AsmCall.addUse(I1->getOperand(IntrIdx).getReg());
+ // const MachineOperand &MO = I2->getOperand(Idx);
+ // if (MO.isReg())
+ // AsmCall.addUse(MO.getReg());
+ // else
+ AsmCall.addUse(I1->getOperand(IntrIdx).getReg());
}
}
for (MachineInstr *MI : ToProcess)
diff --git a/llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp b/llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
index 003e0ee2f2..3d7b39b6dc 100644
--- a/llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
@@ -232,7 +232,8 @@ void SPIRVRegularizer::visitCallScalToVec(CallInst *CI, StringRef MangledName,
// %10 = OpCompositeInsert %v2uint %uint_5 %8 0
// %11 = OpVectorShuffle %v2uint %10 %8 0 0
// %call = OpExtInst %v2uint %1 s_min %14 %11
- auto ConstInt = ConstantInt::get(IntegerType::get(CI->getContext(), 32), 0); // lev
+ auto ConstInt =
+ ConstantInt::get(IntegerType::get(CI->getContext(), 32), 0); // lev
PoisonValue *PVal = PoisonValue::get(Arg0Ty);
Instruction *Inst =
InsertElementInst::Create(PVal, CI->getOperand(1), ConstInt, "", CI);
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https://github.com/llvm/llvm-project/pull/104104
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