[llvm] 3287a2e - [AArch64] Add some uxtw peephole tests. NFC

[David Green via llvm-commits]

Author: David Green
Date: 2024-08-14T18:53:54+01:00
New Revision: 3287a2ebcaf0197f68905917a0d7eba35df831e2

URL: https://github.com/llvm/llvm-project/commit/3287a2ebcaf0197f68905917a0d7eba35df831e2
DIFF: https://github.com/llvm/llvm-project/commit/3287a2ebcaf0197f68905917a0d7eba35df831e2.diff

LOG: [AArch64] Add some uxtw peephole tests. NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/peephole-sxtw.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/peephole-sxtw.mir b/llvm/test/CodeGen/AArch64/peephole-sxtw.mir
index 274d434bbec67..22eec1a4dc038 100644
--- a/llvm/test/CodeGen/AArch64/peephole-sxtw.mir
+++ b/llvm/test/CodeGen/AArch64/peephole-sxtw.mir
@@ -95,3 +95,57 @@ body:             |
     B %bb.2
 
 ...
+---
+name: removeUxtw
+tracksRegLiveness: true
+body: |
+  bb.0.entry:
+    liveins: $x0
+    ; CHECK-LABEL: name: removeUxtw
+    ; CHECK: liveins: $x0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
+    ; CHECK-NEXT: [[ORRWrr:%[0-9]+]]:gpr32 = ORRWrr $wzr, [[COPY1]]
+    ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[ORRWrr]], %subreg.sub_32
+    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32sp = COPY [[SUBREG_TO_REG]].sub_32
+    ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[COPY2]], 1, 0
+    ; CHECK-NEXT: $w0 = COPY [[ADDWri]]
+    ; CHECK-NEXT: RET_ReallyLR implicit $w0
+    %0:gpr64 = COPY $x0
+    %1:gpr32 = COPY %0.sub_32
+    %2:gpr32 = ORRWrr $wzr, %1
+    %3:gpr64 = SUBREG_TO_REG 0, %2, %subreg.sub_32
+    %4:gpr32sp = COPY %3.sub_32
+    %5:gpr32sp = ADDWri %4, 1, 0
+    $w0 = COPY %5
+    RET_ReallyLR implicit $w0
+...
+---
+name: extraUseOrr
+tracksRegLiveness: true
+body: |
+  bb.0.entry:
+    liveins: $x0
+    ; CHECK-LABEL: name: extraUseOrr
+    ; CHECK: liveins: $x0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
+    ; CHECK-NEXT: [[ORRWrr:%[0-9]+]]:gpr32 = ORRWrr $wzr, [[COPY1]]
+    ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[ORRWrr]], %subreg.sub_32
+    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32sp = COPY [[SUBREG_TO_REG]].sub_32
+    ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[COPY2]], 1, 0
+    ; CHECK-NEXT: $w0 = COPY [[ADDWri]]
+    ; CHECK-NEXT: $w1 = COPY [[ORRWrr]]
+    ; CHECK-NEXT: RET_ReallyLR implicit $w0
+    %0:gpr64 = COPY $x0
+    %1:gpr32 = COPY %0.sub_32
+    %2:gpr32 = ORRWrr $wzr, %1
+    %3:gpr64 = SUBREG_TO_REG 0, %2, %subreg.sub_32
+    %4:gpr32sp = COPY %3.sub_32
+    %5:gpr32sp = ADDWri %4, 1, 0
+    $w0 = COPY %5
+    $w1 = COPY %2
+    RET_ReallyLR implicit $w0
+...