[llvm] Add FPMR register and update dependencies of FP8 instructions (PR #102910)

[Paul Walker via llvm-commits]

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@@ -10306,15 +10316,47 @@ class sve2_fp8_mla_long_long_by_indexed_elem<bits<2> TT, string mnemonic>
   let Constraints = "$Zda = $_Zda";
   let DestructiveInstType = DestructiveOther;
   let ElementSize         = ZPR32.ElementSize;
+  let Uses = [FPMR, FPCR];
+}
+
+class sve_fp8_dot_indexed<bit bf, ZPRRegOp dst_ty, Operand iop_ty, string mnemonic>
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paulwalker-arm wrote:

Can `bit bf` be replaced by `bits<4> opc` that covers Inst{22,20-19,11}? Sometimes there's a good exception but typically I prefer instruction classes to define all bits.  This will not affect `sve2_fp8_dot_indexed_{h,s}` much because they can pass in `{0, ?, ?, ?}` and `{1, ?, ?, 0}` respectively.

https://github.com/llvm/llvm-project/pull/102910