[llvm] [X86][dec] Handle EVEX.W = 1 and EVEX.pp = 01 (PR #103816)
Freddy Ye via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 14 04:37:48 PDT 2024
https://github.com/FreddyLeaf created https://github.com/llvm/llvm-project/pull/103816
None
>From 15c0747cb42efbbc4fd6522671ab04901bb7b9b7 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Wed, 14 Aug 2024 19:35:20 +0800
Subject: [PATCH] [X86][dec] Handle EVEX.W = 1 and EVEX.pp = 01
---
llvm/test/MC/Disassembler/X86/apx/imul.txt | 5 +++++
llvm/utils/TableGen/X86DisassemblerTables.cpp | 1 +
2 files changed, 6 insertions(+)
diff --git a/llvm/test/MC/Disassembler/X86/apx/imul.txt b/llvm/test/MC/Disassembler/X86/apx/imul.txt
index f72a6f4aec8f92..9fed5dfafdc80e 100644
--- a/llvm/test/MC/Disassembler/X86/apx/imul.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/imul.txt
@@ -21,6 +21,11 @@
# INTEL: {evex} imul r9, r9, 123
0x62,0x54,0xfc,0x08,0x6b,0xc9,0x7b
+# iOSize=64 when EVEX.W = 1 and EVEX.pp = 01
+# ATT: {evex} imulq $123, %r9, %r9
+# INTEL: {evex} imul r9, r9, 123
+0x62,0x54,0xfd,0x08,0x6b,0xc9,0x7b
+
# ATT: {nf} imulq $123, %r9, %r9
# INTEL: {nf} imul r9, r9, 123
0x62,0x54,0xfc,0x0c,0x6b,0xc9,0x7b
diff --git a/llvm/utils/TableGen/X86DisassemblerTables.cpp b/llvm/utils/TableGen/X86DisassemblerTables.cpp
index 21c5e3297b23f6..876cbf9eccd0f7 100644
--- a/llvm/utils/TableGen/X86DisassemblerTables.cpp
+++ b/llvm/utils/TableGen/X86DisassemblerTables.cpp
@@ -268,6 +268,7 @@ static inline bool inheritsFrom(InstructionContext child,
(VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ));
case IC_EVEX_W:
return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) ||
+ inheritsFrom(child, IC_EVEX_W_OPSIZE) ||
(VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W));
case IC_EVEX_W_XS:
return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
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