[llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)

[Jay Foad via llvm-commits]

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@@ -6215,6 +6215,8 @@ void SIInstrInfo::legalizeOperandsFLAT(MachineRegisterInfo &MRI,
     return;
 
   Register ToSGPR = readlaneVGPRToSGPR(SAddr->getReg(), MI, MRI);
+  if (MRI.getRegClass(ToSGPR) == &AMDGPU::SReg_64RegClass)
+    MRI.setRegClass(ToSGPR, &AMDGPU::SReg_64_XEXEC_XNULLRegClass);
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jayfoad wrote:

Is this required? If it is, can you make it a bit more generic by constraining the RC with the declared RC of the saddr operand, instead of mentioning these specific RCs?

https://github.com/llvm/llvm-project/pull/101730