[llvm] [RISCV] Add scheduling model for Syntacore SCR4 and SCR5 (PR #102909)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 13 10:31:43 PDT 2024

Previous message: [llvm] [RISCV] Add scheduling model for Syntacore SCR4 and SCR5 (PR #102909)
Next message: [llvm] [RISCV] Add scheduling model for Syntacore SCR4 and SCR5 (PR #102909)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

https://github.com/topperc approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/102909

Previous message: [llvm] [RISCV] Add scheduling model for Syntacore SCR4 and SCR5 (PR #102909)
Next message: [llvm] [RISCV] Add scheduling model for Syntacore SCR4 and SCR5 (PR #102909)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list