[llvm] [GlobalISel] Bail out early for big-endian (PR #103310)
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Tue Aug 13 09:52:26 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-aarch64
Author: David Green (davemgreen)
<details>
<summary>Changes</summary>
If we continue through the function we can currently hit crashes. We can bail out early and fall back to SDAG.
Fixes #<!-- -->103032
---
Full diff: https://github.com/llvm/llvm-project/pull/103310.diff
2 Files Affected:
- (modified) llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp (+1)
- (added) llvm/test/CodeGen/AArch64/GlobalISel/endian_fallback.ll (+18)
``````````diff
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 219c60eab04f5a..4f5a26e72e539b 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -3889,6 +3889,7 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &CurMF) {
F.getSubprogram(), &F.getEntryBlock());
R << "unable to translate in big endian mode";
reportTranslationError(*MF, *TPC, *ORE, R);
+ return false;
}
// Release the per-function state when we return, whether we succeeded or not.
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/endian_fallback.ll b/llvm/test/CodeGen/AArch64/GlobalISel/endian_fallback.ll
new file mode 100644
index 00000000000000..e995d60c05d13a
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/endian_fallback.ll
@@ -0,0 +1,18 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple aarch64-unknown-linux-musl -O0 < %s | FileCheck %s --check-prefix=CHECK-LE
+; RUN: llc -mtriple aarch64_be-unknown-linux-musl -O0 < %s | FileCheck %s --check-prefix=CHECK-BE
+
+; Make sure we fall-back to SDAG for BE targets.
+
+define <4 x i6> @foo(float %0, <4 x i6> %1) {
+; CHECK-LE-LABEL: foo:
+; CHECK-LE: // %bb.0:
+; CHECK-LE-NEXT: fmov d0, d1
+; CHECK-LE-NEXT: ret
+;
+; CHECK-BE-LABEL: foo:
+; CHECK-BE: // %bb.0:
+; CHECK-BE-NEXT: fmov d0, d1
+; CHECK-BE-NEXT: ret
+ ret <4 x i6> %1
+}
``````````
</details>
https://github.com/llvm/llvm-project/pull/103310
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