[llvm] Add FPMR register and update dependencies of FP8 instructions (PR #102910)

[Paul Walker via llvm-commits]

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@@ -10306,15 +10316,38 @@ class sve2_fp8_mla_long_long_by_indexed_elem<bits<2> TT, string mnemonic>
   let Constraints = "$Zda = $_Zda";
   let DestructiveInstType = DestructiveOther;
   let ElementSize         = ZPR32.ElementSize;
+  let Uses = [FPMR, FPCR];
+}
+
+class sve_fp8_dot_indexed<bit bf, ZPRRegOp dst_ty, Operand iop_ty, string mnemonic>
+: I<(outs dst_ty:$Zda), (ins dst_ty:$_Zda, ZPR8:$Zn, ZPR3b8:$Zm, iop_ty:$iop),
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paulwalker-arm wrote:

Sorry, I did a terrible job with my previous comment.

What I meant was `FDOT_ZZZI_BtoH` and `FDOT_ZZZI_BtoS` shouldn't share a common multiclass because their lane index operand is of differing size.  I'm not sure how important it is but in general we try to ensure the immediate operands match the exact size within the instruction, which is why `sve2_fp8_dot_indexed` exists in the first place.  

So perhaps rename `sve2_fp8_dot_indexed` to `sve2_fp8_dot_indexed_h` and then add a new multiclass called `sve2_fp8_dot_indexed_s` for `FDOT_ZZZI_BtoS` with both multiclasses using `sve_fp8_dot_indexed` to define the instruction and containing `Uses = [FPMR, FPCR]`.

https://github.com/llvm/llvm-project/pull/102910