[llvm] [AMDGPU][True16][CodeGen] Support AND/OR/XOR and LDEXP True16 format (PR #102620)

[Brox Chen via llvm-commits]

================
@@ -236,5 +243,38 @@ bool GCNPreRAOptimizations::runOnMachineFunction(MachineFunction &MF) {
     Changed |= processReg(Reg);
   }
 
+  if (!ST.useRealTrue16Insts())
+    return Changed;
+
+  // Add RA hints to improve True16 COPY elimination.
----------------
broxigarchen wrote:

Hi Matt. This is added to improve the copy. Without this change, RA could introduce many copys to move 16bit values to another 32 bit registers.

This can certainly be done in another PR so the change in the test file could be explicit

https://github.com/llvm/llvm-project/pull/102620