[llvm] Simple check to ignore Inline asm fwait insertion (PR #101686)

[via llvm-commits]

https://github.com/Temperature-block updated https://github.com/llvm/llvm-project/pull/101686

>From 1324a5feb514b5494ffc91b6cfb8529e7e2b2a16 Mon Sep 17 00:00:00 2001
From: vijay shankar <shank.vijay at yandex.com>
Date: Fri, 2 Aug 2024 20:41:53 +0530
Subject: [PATCH] Fix for #101613 Changes   X86InstrInfo.cpp   updated with
 check to ignore inlineasm   pr59305.ll   Test case fix

---
 llvm/lib/Target/X86/X86InstrInfo.cpp | 4 ++--
 llvm/test/CodeGen/X86/pr59305.ll     | 4 +---
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 7fc786b1e570ba..a5847f19df226e 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -3537,10 +3537,10 @@ static bool isX87Reg(unsigned Reg) {
 
 /// check if the instruction is X87 instruction
 bool X86::isX87Instruction(MachineInstr &MI) {
-  // Call defs X87 register, so we special case it here because
+  // Call and inlineasm defs X87 register, so we special case it here because
   // otherwise calls are incorrectly flagged as x87 instructions
   // as a result.
-  if (MI.isCall())
+  if (MI.isCall() || MI.isInlineAsm())
     return false;
   for (const MachineOperand &MO : MI.operands()) {
     if (!MO.isReg())
diff --git a/llvm/test/CodeGen/X86/pr59305.ll b/llvm/test/CodeGen/X86/pr59305.ll
index 46c9da5a51939d..d8738081842a33 100644
--- a/llvm/test/CodeGen/X86/pr59305.ll
+++ b/llvm/test/CodeGen/X86/pr59305.ll
@@ -81,20 +81,17 @@ define double @bar(double %0) #0 {
 ; X64-NEXT:    #APP
 ; X64-NEXT:    ldmxcsr 0
 ; X64-NEXT:    #NO_APP
-; X64-NEXT:    wait
 ; X64-NEXT:    movsd {{.*#+}} xmm2 = [1.0E+0,0.0E+0]
 ; X64-NEXT:    movapd %xmm2, %xmm3
 ; X64-NEXT:    divsd %xmm0, %xmm3
 ; X64-NEXT:    #APP
 ; X64-NEXT:    ldmxcsr 0
 ; X64-NEXT:    #NO_APP
-; X64-NEXT:    wait
 ; X64-NEXT:    movapd %xmm2, %xmm1
 ; X64-NEXT:    divsd %xmm0, %xmm1
 ; X64-NEXT:    #APP
 ; X64-NEXT:    ldmxcsr 0
 ; X64-NEXT:    #NO_APP
-; X64-NEXT:    wait
 ; X64-NEXT:    divsd %xmm0, %xmm2
 ; X64-NEXT:    movapd %xmm3, %xmm0
 ; X64-NEXT:    callq fma at PLT
@@ -105,6 +102,7 @@ define double @bar(double %0) #0 {
 ; X86:       # %bb.0:
 ; X86-NEXT:    subl $28, %esp
 ; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    wait
 ; X86-NEXT:    #APP
 ; X86-NEXT:    fldcw 0
 ; X86-NEXT:    #NO_APP