[llvm] [X86][AVX] Add missing X86ISD::VBROADCAST(v2i64 -> v4i64) isel pattern for AVX1 targets (PR #102853)

Mészáros Gergely via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 12 03:38:37 PDT 2024


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@@ -7797,6 +7797,11 @@ let Predicates = [HasAVX1Only] in {
             (VPSHUFDri (VMOV64toPQIrr GR64:$src), 0x44)>;
   def : Pat<(v2i64 (X86VBroadcastld64 addr:$src)),
             (VMOVDDUPrm addr:$src)>;
+
+  def : Pat<(v4i64 (X86VBroadcast v2i64:$src)),
+            (VINSERTF128rr (INSERT_SUBREG (v4i64 (IMPLICIT_DEF)),
+              (v2i64 (VMOVDDUPrr VR128:$src)), sub_xmm),
+              (v2i64 (VMOVDDUPrr VR128:$src)), 1)>;
----------------
Maetveis wrote:

Sure, I will change it.

I'm not versed in these instruction level considerations yet, are you referring to less mixing of "floating point" and integer instructions? Is this sentence in the Intel Optimization Manual relevant?

> When writing SIMD code that works for both integer and floating-point data, use the subset of SIMD convert
instructions or load/store instructions to ensure that the input operands in XMM registers contain data types that
are properly defined to match the instruction.
> Code sequences containing cross-typed usage produce the same result across different implementa-
tions but incur a significant performance penalty. Using SSE/SSE2/SSE3/SSSE3/SSE44.1 instruc-
tions to operate on type-mismatched SIMD data in the XMM register is strongly discouraged.

https://github.com/llvm/llvm-project/pull/102853


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