[llvm] [DAGCombine] Add without oneuse constraints for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) (PR #101294)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 12 02:37:39 PDT 2024
================
@@ -59541,3 +59541,18 @@ Align X86TargetLowering::getPrefLoopAlignment(MachineLoop *ML) const {
return Align(1ULL << ExperimentalPrefInnermostLoopAlignment);
return TargetLowering::getPrefLoopAlignment();
}
+
+bool X86TargetLowering::isDesirableToCommuteWithShift(
+ const SDNode *N, CombineLevel Level) const {
+ assert((N->getOpcode() == ISD::SHL || N->getOpcode() == ISD::SRA ||
+ N->getOpcode() == ISD::SRL) &&
+ "Expected shift op");
+
+ SDValue ShiftLHS = N->getOperand(0);
+ if ((ShiftLHS.getOpcode() == ISD::SIGN_EXTEND &&
+ !(ShiftLHS->hasOneUse() && ShiftLHS.getOperand(0)->hasOneUse())) ||
+ !ShiftLHS->hasOneUse())
+ return false;
----------------
RKSimon wrote:
why do you need all the llvm::SDPatternMatch:: namespace prefixes?
https://github.com/llvm/llvm-project/pull/101294
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