[llvm] dad1cb9 - [ARM] Regenerate big-endian-vmov.ll. NFC
David Green via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 9 07:24:58 PDT 2024
Author: David Green
Date: 2024-08-09T15:24:54+01:00
New Revision: dad1cb9cf9b5aa21da4622fa239f682678fa5eb3
URL: https://github.com/llvm/llvm-project/commit/dad1cb9cf9b5aa21da4622fa239f682678fa5eb3
DIFF: https://github.com/llvm/llvm-project/commit/dad1cb9cf9b5aa21da4622fa239f682678fa5eb3.diff
LOG: [ARM] Regenerate big-endian-vmov.ll. NFC
Added:
Modified:
llvm/test/CodeGen/ARM/big-endian-vmov.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/ARM/big-endian-vmov.ll b/llvm/test/CodeGen/ARM/big-endian-vmov.ll
index 1b2d4db9b9090c..2cb22b4d5fbc26 100644
--- a/llvm/test/CodeGen/ARM/big-endian-vmov.ll
+++ b/llvm/test/CodeGen/ARM/big-endian-vmov.ll
@@ -1,88 +1,136 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple armv7-eabi -o - | FileCheck %s --check-prefixes=CHECK,CHECK-LE
; RUN: llc < %s -mtriple armebv7-eabi -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
-; CHECK-LABEL: vmov_i8
-; CHECK-LE: vmov.i64 d0, #0xff00000000000000{{$}}
-; CHECK-BE: vmov.i64 d0, #0xff{{$}}
-; CHECK-NEXT: bx lr
define arm_aapcs_vfpcc <8 x i8> @vmov_i8() {
+; CHECK-LE-LABEL: vmov_i8:
+; CHECK-LE: @ %bb.0:
+; CHECK-LE-NEXT: vmov.i64 d0, #0xff00000000000000
+; CHECK-LE-NEXT: bx lr
+;
+; CHECK-BE-LABEL: vmov_i8:
+; CHECK-BE: @ %bb.0:
+; CHECK-BE-NEXT: vmov.i64 d0, #0xff
+; CHECK-BE-NEXT: bx lr
ret <8 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 -1>
}
-; CHECK-LABEL: vmov_i16_a:
-; CHECK-LE: vmov.i64 d0, #0xffff000000000000{{$}}
-; CHECK-BE: vmov.i64 d0, #0xffff{{$}}
-; CHECK-NEXT: bx lr
define arm_aapcs_vfpcc <4 x i16> @vmov_i16_a() {
+; CHECK-LE-LABEL: vmov_i16_a:
+; CHECK-LE: @ %bb.0:
+; CHECK-LE-NEXT: vmov.i64 d0, #0xffff000000000000
+; CHECK-LE-NEXT: bx lr
+;
+; CHECK-BE-LABEL: vmov_i16_a:
+; CHECK-BE: @ %bb.0:
+; CHECK-BE-NEXT: vmov.i64 d0, #0xffff
+; CHECK-BE-NEXT: bx lr
ret <4 x i16> <i16 0, i16 0, i16 0, i16 -1>
}
-; CHECK-LABEL: vmov_i16_b:
-; CHECK-LE: vmov.i64 d0, #0xff000000000000{{$}}
-; CHECK-BE: vmov.i64 d0, #0xff{{$}}
-; CHECK-NEXT: bx lr
define arm_aapcs_vfpcc <4 x i16> @vmov_i16_b() {
+; CHECK-LE-LABEL: vmov_i16_b:
+; CHECK-LE: @ %bb.0:
+; CHECK-LE-NEXT: vmov.i64 d0, #0xff000000000000
+; CHECK-LE-NEXT: bx lr
+;
+; CHECK-BE-LABEL: vmov_i16_b:
+; CHECK-BE: @ %bb.0:
+; CHECK-BE-NEXT: vmov.i64 d0, #0xff
+; CHECK-BE-NEXT: bx lr
ret <4 x i16> <i16 0, i16 0, i16 0, i16 255>
}
-; CHECK-LABEL: vmov_i16_c:
-; CHECK-LE: vmov.i64 d0, #0xff00000000000000{{$}}
-; CHECK-BE: vmov.i64 d0, #0xff00{{$}}
-; CHECK-NEXT: bx lr
define arm_aapcs_vfpcc <4 x i16> @vmov_i16_c() {
+; CHECK-LE-LABEL: vmov_i16_c:
+; CHECK-LE: @ %bb.0:
+; CHECK-LE-NEXT: vmov.i64 d0, #0xff00000000000000
+; CHECK-LE-NEXT: bx lr
+;
+; CHECK-BE-LABEL: vmov_i16_c:
+; CHECK-BE: @ %bb.0:
+; CHECK-BE-NEXT: vmov.i64 d0, #0xff00
+; CHECK-BE-NEXT: bx lr
ret <4 x i16> <i16 0, i16 0, i16 0, i16 65280>
}
-; CHECK-LABEL: vmov_i32_a:
-; CHECK-LE: vmov.i64 d0, #0xffffffff00000000{{$}}
-; CHECK-BE: vmov.i64 d0, #0xffffffff{{$}}
-; CHECK-NEXT: bx lr
define arm_aapcs_vfpcc <2 x i32> @vmov_i32_a() {
+; CHECK-LE-LABEL: vmov_i32_a:
+; CHECK-LE: @ %bb.0:
+; CHECK-LE-NEXT: vmov.i64 d0, #0xffffffff00000000
+; CHECK-LE-NEXT: bx lr
+;
+; CHECK-BE-LABEL: vmov_i32_a:
+; CHECK-BE: @ %bb.0:
+; CHECK-BE-NEXT: vmov.i64 d0, #0xffffffff
+; CHECK-BE-NEXT: bx lr
ret <2 x i32> <i32 0, i32 -1>
}
-; CHECK-LABEL: vmov_i32_b:
-; CHECK-LE: vmov.i64 d0, #0xff00000000{{$}}
-; CHECK-BE: vmov.i64 d0, #0xff{{$}}
-; CHECK-NEXT: bx lr
define arm_aapcs_vfpcc <2 x i32> @vmov_i32_b() {
+; CHECK-LE-LABEL: vmov_i32_b:
+; CHECK-LE: @ %bb.0:
+; CHECK-LE-NEXT: vmov.i64 d0, #0xff00000000
+; CHECK-LE-NEXT: bx lr
+;
+; CHECK-BE-LABEL: vmov_i32_b:
+; CHECK-BE: @ %bb.0:
+; CHECK-BE-NEXT: vmov.i64 d0, #0xff
+; CHECK-BE-NEXT: bx lr
ret <2 x i32> <i32 0, i32 255>
}
-; CHECK-LABEL: vmov_i32_c:
-; CHECK-LE: vmov.i64 d0, #0xff0000000000{{$}}
-; CHECK-BE: vmov.i64 d0, #0xff00{{$}}
-; CHECK-NEXT: bx lr
define arm_aapcs_vfpcc <2 x i32> @vmov_i32_c() {
+; CHECK-LE-LABEL: vmov_i32_c:
+; CHECK-LE: @ %bb.0:
+; CHECK-LE-NEXT: vmov.i64 d0, #0xff0000000000
+; CHECK-LE-NEXT: bx lr
+;
+; CHECK-BE-LABEL: vmov_i32_c:
+; CHECK-BE: @ %bb.0:
+; CHECK-BE-NEXT: vmov.i64 d0, #0xff00
+; CHECK-BE-NEXT: bx lr
ret <2 x i32> <i32 0, i32 65280>
}
-; CHECK-LABEL: vmov_i32_d:
-; CHECK-LE: vmov.i64 d0, #0xff000000000000{{$}}
-; CHECK-BE: vmov.i64 d0, #0xff0000{{$}}
-; CHECK-NEXT: bx lr
define arm_aapcs_vfpcc <2 x i32> @vmov_i32_d() {
+; CHECK-LE-LABEL: vmov_i32_d:
+; CHECK-LE: @ %bb.0:
+; CHECK-LE-NEXT: vmov.i64 d0, #0xff000000000000
+; CHECK-LE-NEXT: bx lr
+;
+; CHECK-BE-LABEL: vmov_i32_d:
+; CHECK-BE: @ %bb.0:
+; CHECK-BE-NEXT: vmov.i64 d0, #0xff0000
+; CHECK-BE-NEXT: bx lr
ret <2 x i32> <i32 0, i32 16711680>
}
-; CHECK-LABEL: vmov_i32_e:
-; CHECK-LE: vmov.i64 d0, #0xff00000000000000{{$}}
-; CHECK-BE: vmov.i64 d0, #0xff000000{{$}}
-; CHECK-NEXT: bx lr
define arm_aapcs_vfpcc <2 x i32> @vmov_i32_e() {
+; CHECK-LE-LABEL: vmov_i32_e:
+; CHECK-LE: @ %bb.0:
+; CHECK-LE-NEXT: vmov.i64 d0, #0xff00000000000000
+; CHECK-LE-NEXT: bx lr
+;
+; CHECK-BE-LABEL: vmov_i32_e:
+; CHECK-BE: @ %bb.0:
+; CHECK-BE-NEXT: vmov.i64 d0, #0xff000000
+; CHECK-BE-NEXT: bx lr
ret <2 x i32> <i32 0, i32 4278190080>
}
-; CHECK-LABEL: vmov_i64_a:
-; CHECK: vmov.i8 d0, #0xff{{$}}
-; CHECK-NEXT: bx lr
define arm_aapcs_vfpcc <1 x i64> @vmov_i64_a() {
+; CHECK-LABEL: vmov_i64_a:
+; CHECK: @ %bb.0:
+; CHECK-NEXT: vmov.i8 d0, #0xff
+; CHECK-NEXT: bx lr
ret <1 x i64> <i64 -1>
}
-; CHECK-LABEL: vmov_i64_b:
-; CHECK: vmov.i64 d0, #0xffff00ff0000ff{{$}}
-; CHECK-NEXT: bx lr
define arm_aapcs_vfpcc <1 x i64> @vmov_i64_b() {
+; CHECK-LABEL: vmov_i64_b:
+; CHECK: @ %bb.0:
+; CHECK-NEXT: vmov.i64 d0, #0xffff00ff0000ff
+; CHECK-NEXT: bx lr
ret <1 x i64> <i64 72056498804490495>
}
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