[llvm] 070ce81 - [RISCV] Remove unused function argument in RISCVOptWInstrs. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2024-08-08T15:13:46-07:00
New Revision: 070ce816dadb266f3296256048e6a5fb8517b06d

URL: https://github.com/llvm/llvm-project/commit/070ce816dadb266f3296256048e6a5fb8517b06d
DIFF: https://github.com/llvm/llvm-project/commit/070ce816dadb266f3296256048e6a5fb8517b06d.diff

LOG: [RISCV] Remove unused function argument in RISCVOptWInstrs. NFC

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp b/llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
index 49be866448f2e..00ac8cb9a9066 100644
--- a/llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
+++ b/llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
@@ -350,8 +350,7 @@ static bool hasAllWUsers(const MachineInstr &OrigMI, const RISCVSubtarget &ST,
 
 // This function returns true if the machine instruction always outputs a value
 // where bits 63:32 match bit 31.
-static bool isSignExtendingOpW(const MachineInstr &MI,
-                               const MachineRegisterInfo &MRI, unsigned OpNo) {
+static bool isSignExtendingOpW(const MachineInstr &MI, unsigned OpNo) {
   uint64_t TSFlags = MI.getDesc().TSFlags;
 
   // Instructions that can be determined from opcode are marked in tablegen.
@@ -426,7 +425,7 @@ static bool isSignExtendedW(Register SrcReg, const RISCVSubtarget &ST,
     assert(OpNo != -1 && "Couldn't find register");
 
     // If this is a sign extending operation we don't need to look any further.
-    if (isSignExtendingOpW(*MI, MRI, OpNo))
+    if (isSignExtendingOpW(*MI, OpNo))
       continue;
 
     // Is this an instruction that propagates sign extend?