[llvm] MTM: improve operand latency when missing sched info (PR #101389)
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 8 07:33:45 PDT 2024
================
@@ -761,6 +762,64 @@ static void updatePhysDepsDownwards(const MachineInstr *UseMI,
}
}
+/// Estimates the number of cycles elapsed between DefMI and UseMI if they're
+/// non-null and in the same BasicBlock. Returns std::nullopt when UseMI is in a
+/// different MBB than DefMI.
+static std::optional<unsigned>
+estimateDefUseCycles(const TargetSchedModel &Sched, const MachineInstr *DefMI,
+ const MachineInstr *UseMI) {
+ if (!DefMI || !UseMI || DefMI == UseMI)
+ return 0;
+ const MachineBasicBlock *ParentBB = DefMI->getParent();
+ if (ParentBB != UseMI->getParent())
+ return std::nullopt;
+
+ const auto DefIt =
+ llvm::find_if(ParentBB->instrs(),
+ [DefMI](const MachineInstr &MI) { return DefMI == &MI; });
+ const auto UseIt =
+ llvm::find_if(ParentBB->instrs(),
+ [UseMI](const MachineInstr &MI) { return UseMI == &MI; });
+
+ unsigned NumMicroOps = 0;
+ for (auto It = DefIt; It != UseIt; ++It) {
+ // In cases where the UseMI is a PHI at the beginning of the MBB, compute
+ // MicroOps until the end of the MBB.
+ if (It.isEnd())
+ break;
+
+ NumMicroOps += Sched.getNumMicroOps(&*It);
+ }
+ return NumMicroOps / Sched.getIssueWidth();
----------------
michaelmaitland wrote:
I wonder if it would be useful to use `defaultDefLatency` for the instructions we are iterating over here in the case that some of the instructions we are iterating over depend on eachother. Imagine a scenario:
```
defmi = ...
a = ...
b = use a
usemi = ...
```
In this case, what if we checked defaultDefLatency of a and used it to understand the number of cycles elapsed between a and b? For example, if `a` has a default latency of 10, then b can't really start in the next `NumMicroOps / IssueWidth` cycles, since it has to wait 10 additional cycles.
https://github.com/llvm/llvm-project/pull/101389
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