[clang] [compiler-rt] [llvm] [RISCV] Support new groupid/bitmask for cpu_model (PR #101632)

[Piyou Chen via llvm-commits]

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@@ -1056,24 +1056,12 @@ constexpr static RISCVExtBit RISCVBitPositions[] = {
     {"zcf", 1, 5},        {"zcmop", 1, 6},
     {"zawrs", 1, 7}};
 
-int RISCVISAInfo::getRISCVFeaturesBitPosition(StringRef Ext) {
+std::pair<int, int> RISCVISAInfo::getRISCVFeaturesBitsInfo(StringRef Ext) {
   // Note that this code currently accepts mixed case extension names, but
   // does not handle extension versions at all.  That's probably fine because
   // there's only one extension version in the __riscv_feature_bits vector.
   for (auto E : RISCVBitPositions)
     if (E.ext.equals_insensitive(Ext))
-      return E.bitpos;
-  return -1;
-}
-
-// TODO: merge getRISCVFeaturesBitPosition and getRISCVFeaturesGroupID into
-// single function.
-int RISCVISAInfo::getRISCVFeaturesGroupID(StringRef Ext) {
-  // Note that this code currently accepts mixed case extension names, but
-  // does not handle extension versions at all.  That's probably fine because
-  // there's only one extension version in the __riscv_feature_bits vector.
-  for (auto E : RISCVBitPositions)
-    if (E.ext.equals_insensitive(Ext))
-      return E.groupid;
-  return -1;
+      return std::make_pair<int, int>(E.groupid, E.bitpos);
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BeMg wrote:

It works! I always used to write the type in make_pair before...

https://github.com/llvm/llvm-project/pull/101632