[llvm] 5fb2002 - [Mips] Add test for AND optimization (#102278)

via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 7 12:55:18 PDT 2024


Author: yingopq
Date: 2024-08-07T20:55:13+01:00
New Revision: 5fb20024e2eaef39d631f63fa82200bf55399090

URL: https://github.com/llvm/llvm-project/commit/5fb20024e2eaef39d631f63fa82200bf55399090
DIFF: https://github.com/llvm/llvm-project/commit/5fb20024e2eaef39d631f63fa82200bf55399090.diff

LOG: [Mips] Add test for AND optimization (#102278)

See https://github.com/llvm/llvm-project/issues/42826

Added: 
    llvm/test/CodeGen/Mips/llvm-ir/and-srl.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/Mips/llvm-ir/and-srl.ll b/llvm/test/CodeGen/Mips/llvm-ir/and-srl.ll
new file mode 100644
index 0000000000000..988a0f5ee5ba3
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/llvm-ir/and-srl.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -mtriple=mips64el-unknown-linux-gnu -mcpu=mips64 | FileCheck %s \
+; RUN:    -check-prefix=MIPS4
+; RUN: llc < %s -mtriple=mips64el-unknown-linux-gnu -mcpu=mips64r2 | FileCheck %s \
+; RUN:    -check-prefix=MIPS64R2
+
+define i64 @foo(i64 noundef %a) {
+; MIPS4-LABEL: foo:
+; MIPS4:       # %bb.0: # %entry
+; MIPS4-NEXT:   sll    $1, $4, 0
+; MIPS4-NEXT:   srl    $1, $1, 2
+; MIPS4-NEXT:   andi   $1, $1, 7
+; MIPS4-NEXT:   daddiu $2, $zero, 1
+; MIPS4-NEXT:   jr     $ra
+; MIPS4-NEXT:   dsllv  $2, $2, $1
+;
+; MIPS64R2-LABEL: foo:
+; MIPS64R2:       # %bb.0: # %entry
+; MIPS64R2-NEXT:   sll	  $1, $4, 0
+; MIPS64R2-NEXT:   ext	  $1, $1, 2, 3
+; MIPS64R2-NEXT:   daddiu $2, $zero, 1
+; MIPS64R2-NEXT:   jr     $ra
+; MIPS64R2-NEXT:   dsllv  $2, $2, $1
+entry:
+  %div1 = lshr i64 %a, 2
+  %and = and i64 %div1, 7
+  %shl = shl nuw nsw i64 1, %and
+  ret i64 %shl
+}


        


More information about the llvm-commits mailing list