[llvm] Simplify Patterns (PR #102221)
Rose Silicon via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 7 10:14:35 PDT 2024
https://github.com/RSilicon updated https://github.com/llvm/llvm-project/pull/102221
>From ab0bbecb05a3888c4ab57ee1919af62a108d3d54 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Tue, 6 Aug 2024 16:43:57 -0400
Subject: [PATCH] Simplify Patterns
We can simplify patterns where we don't need to hold onto another variable.
---
llvm/lib/Analysis/ValueTracking.cpp | 41 ++++++++-----------
llvm/lib/CodeGen/CodeGenPrepare.cpp | 4 +-
llvm/lib/IR/Constants.cpp | 4 +-
llvm/lib/Target/X86/X86ISelLowering.cpp | 9 ++--
.../InstCombine/InstCombineAddSub.cpp | 4 +-
.../InstCombine/InstCombineCompares.cpp | 5 +--
.../InstCombine/InstCombineMulDivRem.cpp | 5 ++-
.../InstCombine/InstCombineNegator.cpp | 3 +-
.../InstCombine/InstCombineSelect.cpp | 10 ++---
.../InstCombine/InstCombineShifts.cpp | 5 ++-
llvm/test/Transforms/InstCombine/and.ll | 4 +-
.../Transforms/InstCombine/getelementptr.ll | 8 ++--
.../InstCombine/mul-inseltpoison.ll | 6 +--
llvm/test/Transforms/InstCombine/mul.ll | 8 ++--
.../test/Transforms/InstCombine/opaque-ptr.ll | 5 +--
15 files changed, 57 insertions(+), 64 deletions(-)
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 202eaad57d1e36..e364f40fe5c792 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -3803,12 +3803,7 @@ static unsigned ComputeNumSignBitsImpl(const Value *V,
case Instruction::SDiv: {
const APInt *Denominator;
// sdiv X, C -> adds log(C) sign bits.
- if (match(U->getOperand(1), m_APInt(Denominator))) {
-
- // Ignore non-positive denominator.
- if (!Denominator->isStrictlyPositive())
- break;
-
+ if (match(U->getOperand(1), m_StrictlyPositive(Denominator))) {
// Calculate the incoming numerator bits.
unsigned NumBits =
ComputeNumSignBits(U->getOperand(0), DemandedElts, Depth + 1, Q);
@@ -3826,26 +3821,24 @@ static unsigned ComputeNumSignBitsImpl(const Value *V,
// srem X, C -> we know that the result is within [-C+1,C) when C is a
// positive constant. This let us put a lower bound on the number of sign
// bits.
- if (match(U->getOperand(1), m_APInt(Denominator))) {
+ if (match(U->getOperand(1), m_StrictlyPositive(Denominator))) {
// Ignore non-positive denominator.
- if (Denominator->isStrictlyPositive()) {
- // Calculate the leading sign bit constraints by examining the
- // denominator. Given that the denominator is positive, there are two
- // cases:
- //
- // 1. The numerator is positive. The result range is [0,C) and
- // [0,C) u< (1 << ceilLogBase2(C)).
- //
- // 2. The numerator is negative. Then the result range is (-C,0] and
- // integers in (-C,0] are either 0 or >u (-1 << ceilLogBase2(C)).
- //
- // Thus a lower bound on the number of sign bits is `TyBits -
- // ceilLogBase2(C)`.
-
- unsigned ResBits = TyBits - Denominator->ceilLogBase2();
- Tmp = std::max(Tmp, ResBits);
- }
+ // Calculate the leading sign bit constraints by examining the
+ // denominator. Given that the denominator is positive, there are two
+ // cases:
+ //
+ // 1. The numerator is positive. The result range is [0,C) and
+ // [0,C) u< (1 << ceilLogBase2(C)).
+ //
+ // 2. The numerator is negative. Then the result range is (-C,0] and
+ // integers in (-C,0] are either 0 or >u (-1 << ceilLogBase2(C)).
+ //
+ // Thus a lower bound on the number of sign bits is `TyBits -
+ // ceilLogBase2(C)`.
+
+ unsigned ResBits = TyBits - Denominator->ceilLogBase2();
+ Tmp = std::max(Tmp, ResBits);
}
return Tmp;
}
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index 22d0708f547860..62b3ea23d478e7 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -1733,9 +1733,9 @@ bool CodeGenPrepare::combineToUSubWithOverflow(CmpInst *Cmp,
}
// A + (-C), A u< C (canonicalized form of (sub A, C))
- const APInt *CmpC, *AddC;
+ const APInt *AddC;
if (match(U, m_Add(m_Specific(A), m_APInt(AddC))) &&
- match(B, m_APInt(CmpC)) && *AddC == -(*CmpC)) {
+ match(B, m_SpecificInt(-*AddC))) {
Sub = cast<BinaryOperator>(U);
break;
}
diff --git a/llvm/lib/IR/Constants.cpp b/llvm/lib/IR/Constants.cpp
index a1c9e925a024fe..aca26d9f53130a 100644
--- a/llvm/lib/IR/Constants.cpp
+++ b/llvm/lib/IR/Constants.cpp
@@ -2636,7 +2636,7 @@ Constant *ConstantExpr::getXor(Constant *C1, Constant *C2) {
Constant *ConstantExpr::getExactLogBase2(Constant *C) {
Type *Ty = C->getType();
const APInt *IVal;
- if (match(C, m_APInt(IVal)) && IVal->isPowerOf2())
+ if (match(C, m_Power2(IVal)))
return ConstantInt::get(Ty, IVal->logBase2());
// FIXME: We can extract pow of 2 of splat constant for scalable vectors.
@@ -2654,7 +2654,7 @@ Constant *ConstantExpr::getExactLogBase2(Constant *C) {
Elts.push_back(Constant::getNullValue(Ty->getScalarType()));
continue;
}
- if (!match(Elt, m_APInt(IVal)) || !IVal->isPowerOf2())
+ if (!match(Elt, m_Power2(IVal)))
return nullptr;
Elts.push_back(ConstantInt::get(Ty->getScalarType(), IVal->logBase2()));
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 2891e21be1b267..f305e205a2f183 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -30579,11 +30579,12 @@ static std::pair<Value *, BitTestKind> FindSingleBitChange(Value *V) {
Value *BitV = I->getOperand(1);
Value *AndOp;
- const APInt *AndC;
- if (match(BitV, m_c_And(m_Value(AndOp), m_APInt(AndC)))) {
+ if (match(BitV,
+ m_c_And(m_Value(AndOp),
+ m_SpecificInt(I->getType()->getPrimitiveSizeInBits() -
+ 1)))) {
// Read past a shiftmask instruction to find count
- if (*AndC == (I->getType()->getPrimitiveSizeInBits() - 1))
- BitV = AndOp;
+ BitV = AndOp;
}
return {BitV, BTK};
}
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index 3bd086230cbec5..5796b844cb4484 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -773,10 +773,10 @@ static Value *checkForNegativeOperand(BinaryOperator &I,
if (match(X, m_Xor(m_Value(Y), m_APInt(C1)))) {
// X = XOR(Y, C1), Y = OR(Z, C2), C2 = NOT(C1) ==> X == NOT(AND(Z, C1))
// ADD(ADD(X, 1), RHS) == ADD(X, ADD(RHS, 1)) == SUB(RHS, AND(Z, C1))
- if (match(Y, m_Or(m_Value(Z), m_APInt(C2))) && (*C2 == ~(*C1))) {
+ if (match(Y, m_Or(m_Value(Z), m_SpecificInt(~(*C1))))) {
Value *NewAnd = Builder.CreateAnd(Z, *C1);
return Builder.CreateSub(RHS, NewAnd, "sub");
- } else if (match(Y, m_And(m_Value(Z), m_APInt(C2))) && (*C1 == *C2)) {
+ } else if (match(Y, m_And(m_Value(Z), m_SpecificInt(*C1)))) {
// X = XOR(Y, C1), Y = AND(Z, C2), C2 == C1 ==> X == NOT(OR(Z, ~C1))
// ADD(ADD(X, 1), RHS) == ADD(X, ADD(RHS, 1)) == SUB(RHS, OR(Z, ~C1))
Value *NewOr = Builder.CreateOr(Z, ~(*C1));
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 10a89b47e07537..9e1d9d5997271d 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -7245,11 +7245,10 @@ Instruction *InstCombinerImpl::foldICmpCommutative(ICmpInst::Predicate Pred,
return Res;
{
- Value *X;
const APInt *C;
// icmp X+Cst, X
- if (match(Op0, m_Add(m_Value(X), m_APInt(C))) && Op1 == X)
- return foldICmpAddOpConst(X, *C, Pred);
+ if (match(Op0, m_Add(m_Specific(Op1), m_APInt(C))))
+ return foldICmpAddOpConst(Op1, *C, Pred);
}
// abs(X) >= X --> true
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index f4f3644acfe5ea..8f18be6a4db868 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -1366,7 +1366,7 @@ Instruction *InstCombinerImpl::commonIDivTransforms(BinaryOperator &I) {
auto OB1HasNSW = cast<OverflowingBinaryOperator>(Op1)->hasNoSignedWrap();
auto OB1HasNUW =
cast<OverflowingBinaryOperator>(Op1)->hasNoUnsignedWrap();
- const APInt *C1, *C2;
+ const APInt *C1;
if (IsSigned && OB0HasNSW) {
if (OB1HasNSW && match(B, m_APInt(C1)) && !C1->isAllOnes())
return BinaryOperator::CreateSDiv(A, B);
@@ -1374,7 +1374,8 @@ Instruction *InstCombinerImpl::commonIDivTransforms(BinaryOperator &I) {
if (!IsSigned && OB0HasNUW) {
if (OB1HasNUW)
return BinaryOperator::CreateUDiv(A, B);
- if (match(A, m_APInt(C1)) && match(B, m_APInt(C2)) && C2->ule(*C1))
+ if (match(A, m_APInt(C1)) &&
+ match(B, m_SpecificInt_ICMP(ICmpInst::ICMP_ULE, *C1)))
return BinaryOperator::CreateUDiv(A, B);
}
return nullptr;
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp b/llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
index e4895b59f4b4a9..225a1c6c2dd8dc 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
@@ -181,8 +181,7 @@ std::array<Value *, 2> Negator::getSortedOperandsOfBinOp(Instruction *I) {
case Instruction::AShr:
case Instruction::LShr: {
// Right-shift sign bit smear is negatible.
- const APInt *Op1Val;
- if (match(I->getOperand(1), m_APInt(Op1Val)) && *Op1Val == BitWidth - 1) {
+ if (match(I->getOperand(1), m_SpecificInt(BitWidth - 1))) {
Value *BO = I->getOpcode() == Instruction::AShr
? Builder.CreateLShr(I->getOperand(0), I->getOperand(1))
: Builder.CreateAShr(I->getOperand(0), I->getOperand(1));
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index 6025e73f07cf38..973c1b02d6b730 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -1882,7 +1882,7 @@ Instruction *InstCombinerImpl::foldSelectInstWithICmp(SelectInst &SI,
DL.getTypeSizeInBits(TrueVal->getType()->getScalarType());
APInt MinSignedValue = APInt::getSignedMinValue(BitWidth);
Value *X;
- const APInt *Y, *C;
+ const APInt *Y;
bool TrueWhenUnset;
bool IsBitTest = false;
if (ICmpInst::isEquality(Pred) &&
@@ -1905,19 +1905,19 @@ Instruction *InstCombinerImpl::foldSelectInstWithICmp(SelectInst &SI,
Value *V = nullptr;
// (X & Y) == 0 ? X : X ^ Y --> X & ~Y
if (TrueWhenUnset && TrueVal == X &&
- match(FalseVal, m_Xor(m_Specific(X), m_APInt(C))) && *Y == *C)
+ match(FalseVal, m_Xor(m_Specific(X), m_SpecificInt(*Y))))
V = Builder.CreateAnd(X, ~(*Y));
// (X & Y) != 0 ? X ^ Y : X --> X & ~Y
else if (!TrueWhenUnset && FalseVal == X &&
- match(TrueVal, m_Xor(m_Specific(X), m_APInt(C))) && *Y == *C)
+ match(TrueVal, m_Xor(m_Specific(X), m_SpecificInt(*Y))))
V = Builder.CreateAnd(X, ~(*Y));
// (X & Y) == 0 ? X ^ Y : X --> X | Y
else if (TrueWhenUnset && FalseVal == X &&
- match(TrueVal, m_Xor(m_Specific(X), m_APInt(C))) && *Y == *C)
+ match(TrueVal, m_Xor(m_Specific(X), m_SpecificInt(*Y))))
V = Builder.CreateOr(X, *Y);
// (X & Y) != 0 ? X : X ^ Y --> X | Y
else if (!TrueWhenUnset && TrueVal == X &&
- match(FalseVal, m_Xor(m_Specific(X), m_APInt(C))) && *Y == *C)
+ match(FalseVal, m_Xor(m_Specific(X), m_SpecificInt(*Y))))
V = Builder.CreateOr(X, *Y);
if (V)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index 38f8a41214b682..dd919e9ffad194 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -460,8 +460,9 @@ Instruction *InstCombinerImpl::commonShiftTransforms(BinaryOperator &I) {
// C << (X - AddC) --> (C >> AddC) << X
// and
// C >> (X - AddC) --> (C << AddC) >> X
- if (match(Op0, m_APInt(AC)) && match(Op1, m_Add(m_Value(A), m_APInt(AddC))) &&
- AddC->isNegative() && (-*AddC).ult(BitWidth)) {
+ if (match(Op0, m_APInt(AC)) &&
+ match(Op1, m_Add(m_Value(A), m_Negative(AddC))) &&
+ (-*AddC).ult(BitWidth)) {
assert(!AC->isZero() && "Expected simplify of shifted zero");
unsigned PosOffset = (-*AddC).getZExtValue();
diff --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll
index b5250fc1a7849d..ea3272557f45fa 100644
--- a/llvm/test/Transforms/InstCombine/and.ll
+++ b/llvm/test/Transforms/InstCombine/and.ll
@@ -2122,7 +2122,7 @@ define <3 x i16> @shl_lshr_pow2_const_case1_non_uniform_vec_negative(<3 x i16> %
define <3 x i16> @shl_lshr_pow2_const_case1_poison1_vec(<3 x i16> %x) {
; CHECK-LABEL: @shl_lshr_pow2_const_case1_poison1_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i16> [[X:%.*]], <i16 8, i16 4, i16 4>
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i16> [[X:%.*]], <i16 4, i16 4, i16 4>
; CHECK-NEXT: [[R:%.*]] = select <3 x i1> [[TMP1]], <3 x i16> <i16 8, i16 8, i16 8>, <3 x i16> zeroinitializer
; CHECK-NEXT: ret <3 x i16> [[R]]
;
@@ -2418,7 +2418,7 @@ define <3 x i16> @lshr_shl_pow2_const_case1_non_uniform_vec_negative(<3 x i16> %
define <3 x i16> @lshr_shl_pow2_const_case1_poison1_vec(<3 x i16> %x) {
; CHECK-LABEL: @lshr_shl_pow2_const_case1_poison1_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i16> [[X:%.*]], <i16 -1, i16 12, i16 12>
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i16> [[X:%.*]], <i16 12, i16 12, i16 12>
; CHECK-NEXT: [[R:%.*]] = select <3 x i1> [[TMP1]], <3 x i16> <i16 128, i16 128, i16 128>, <3 x i16> zeroinitializer
; CHECK-NEXT: ret <3 x i16> [[R]]
;
diff --git a/llvm/test/Transforms/InstCombine/getelementptr.ll b/llvm/test/Transforms/InstCombine/getelementptr.ll
index a9addfcb182f70..5e1d955f199bfc 100644
--- a/llvm/test/Transforms/InstCombine/getelementptr.ll
+++ b/llvm/test/Transforms/InstCombine/getelementptr.ll
@@ -234,7 +234,7 @@ define <2 x i1> @test13_vector(<2 x i64> %X, <2 x ptr> %P) nounwind {
define <2 x i1> @test13_vector2(i64 %X, <2 x ptr> %P) nounwind {
; CHECK-LABEL: @test13_vector2(
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], <i64 2, i64 0>
+; CHECK-NEXT: [[TMP1:%.*]] = shl nsw <2 x i64> [[DOTSPLATINSERT]], <i64 2, i64 2>
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i64> [[TMP1]], <i64 -4, i64 poison>
; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP2]], <2 x i1> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[C]]
@@ -248,7 +248,7 @@ define <2 x i1> @test13_vector2(i64 %X, <2 x ptr> %P) nounwind {
define <2 x i1> @test13_fixed_fixed(i64 %X, ptr %P, <2 x i64> %y) nounwind {
; CHECK-LABEL: @test13_fixed_fixed(
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], <i64 3, i64 0>
+; CHECK-NEXT: [[TMP1:%.*]] = shl nsw <2 x i64> [[DOTSPLATINSERT]], <i64 3, i64 3>
; CHECK-NEXT: [[A_IDX:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: [[B_IDX:%.*]] = shl nsw <2 x i64> [[Y:%.*]], <i64 4, i64 4>
; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i64> [[A_IDX]], [[B_IDX]]
@@ -263,7 +263,7 @@ define <2 x i1> @test13_fixed_fixed(i64 %X, ptr %P, <2 x i64> %y) nounwind {
define <2 x i1> @test13_fixed_scalable(i64 %X, ptr %P, <2 x i64> %y) nounwind {
; CHECK-LABEL: @test13_fixed_scalable(
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], <i64 3, i64 0>
+; CHECK-NEXT: [[TMP1:%.*]] = shl nsw <2 x i64> [[DOTSPLATINSERT]], <i64 3, i64 3>
; CHECK-NEXT: [[A_IDX:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 4
@@ -302,7 +302,7 @@ define <vscale x 2 x i1> @test13_scalable_scalable(i64 %X, ptr %P, <vscale x 2 x
define <2 x i1> @test13_vector3(i64 %X, <2 x ptr> %P) nounwind {
; CHECK-LABEL: @test13_vector3(
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], <i64 2, i64 0>
+; CHECK-NEXT: [[TMP1:%.*]] = shl nsw <2 x i64> [[DOTSPLATINSERT]], <i64 2, i64 2>
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i64> [[TMP1]], <i64 4, i64 poison>
; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP2]], <2 x i1> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[C]]
diff --git a/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll b/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
index 94f41236c6f867..112243bc059602 100644
--- a/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
+++ b/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
@@ -978,7 +978,7 @@ define <2 x i32> @mulsub1_vec_nonuniform(<2 x i32> %a0, <2 x i32> %a1) {
define <2 x i32> @mulsub1_vec_nonuniform_poison(<2 x i32> %a0, <2 x i32> %a1) {
; CHECK-LABEL: @mulsub1_vec_nonuniform_poison(
; CHECK-NEXT: [[SUB_NEG:%.*]] = sub <2 x i32> [[A0:%.*]], [[A1:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%sub = sub <2 x i32> %a1, %a0
@@ -1022,7 +1022,7 @@ define <2 x i32> @mulsub2_vec_nonuniform(<2 x i32> %a0) {
define <2 x i32> @mulsub2_vec_nonuniform_poison(<2 x i32> %a0) {
; CHECK-LABEL: @mulsub2_vec_nonuniform_poison(
; CHECK-NEXT: [[SUB_NEG:%.*]] = add <2 x i32> [[A0:%.*]], <i32 -16, i32 -32>
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%sub = sub <2 x i32> <i32 16, i32 32>, %a0
@@ -1066,7 +1066,7 @@ define <2 x i32> @muladd2_vec_nonuniform(<2 x i32> %a0) {
define <2 x i32> @muladd2_vec_nonuniform_poison(<2 x i32> %a0) {
; CHECK-LABEL: @muladd2_vec_nonuniform_poison(
; CHECK-NEXT: [[ADD_NEG:%.*]] = sub <2 x i32> <i32 -16, i32 -32>, [[A0:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%add = add <2 x i32> %a0, <i32 16, i32 32>
diff --git a/llvm/test/Transforms/InstCombine/mul.ll b/llvm/test/Transforms/InstCombine/mul.ll
index 66455479feaaa6..4f1ce1e1e7a6c8 100644
--- a/llvm/test/Transforms/InstCombine/mul.ll
+++ b/llvm/test/Transforms/InstCombine/mul.ll
@@ -1757,7 +1757,7 @@ define <2 x i32> @mulsub1_vec_nonuniform(<2 x i32> %a0, <2 x i32> %a1) {
define <2 x i32> @mulsub1_vec_nonuniform_poison(<2 x i32> %a0, <2 x i32> %a1) {
; CHECK-LABEL: @mulsub1_vec_nonuniform_poison(
; CHECK-NEXT: [[SUB_NEG:%.*]] = sub <2 x i32> [[A0:%.*]], [[A1:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%sub = sub <2 x i32> %a1, %a0
@@ -1801,7 +1801,7 @@ define <2 x i32> @mulsub2_vec_nonuniform(<2 x i32> %a0) {
define <2 x i32> @mulsub2_vec_nonuniform_poison(<2 x i32> %a0) {
; CHECK-LABEL: @mulsub2_vec_nonuniform_poison(
; CHECK-NEXT: [[SUB_NEG:%.*]] = add <2 x i32> [[A0:%.*]], <i32 -16, i32 -32>
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%sub = sub <2 x i32> <i32 16, i32 32>, %a0
@@ -1825,7 +1825,7 @@ define i8 @mulsub_nsw(i8 %a1, i8 %a2) {
define <2 x i8> @mulsub_nsw_poison(<2 x i8> %a1, <2 x i8> %a2) {
; CHECK-LABEL: @mulsub_nsw_poison(
; CHECK-NEXT: [[A_NEG:%.*]] = sub nsw <2 x i8> [[A2:%.*]], [[A1:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i8> [[A_NEG]], <i8 1, i8 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i8> [[A_NEG]], <i8 1, i8 1>
; CHECK-NEXT: ret <2 x i8> [[MUL]]
;
%a = sub nsw <2 x i8> %a1, %a2
@@ -1869,7 +1869,7 @@ define <2 x i32> @muladd2_vec_nonuniform(<2 x i32> %a0) {
define <2 x i32> @muladd2_vec_nonuniform_poison(<2 x i32> %a0) {
; CHECK-LABEL: @muladd2_vec_nonuniform_poison(
; CHECK-NEXT: [[ADD_NEG:%.*]] = sub <2 x i32> <i32 -16, i32 -32>, [[A0:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%add = add <2 x i32> %a0, <i32 16, i32 32>
diff --git a/llvm/test/Transforms/InstCombine/opaque-ptr.ll b/llvm/test/Transforms/InstCombine/opaque-ptr.ll
index df85547f56d74f..638acd8c3458e6 100644
--- a/llvm/test/Transforms/InstCombine/opaque-ptr.ll
+++ b/llvm/test/Transforms/InstCombine/opaque-ptr.ll
@@ -350,9 +350,8 @@ define i1 @compare_gep_with_base(ptr %p, i64 %idx) {
define <2 x i1> @compare_gep_with_base_vector1(<2 x ptr> %p, i64 %idx) {
; CHECK-LABEL: @compare_gep_with_base_vector1(
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[IDX:%.*]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], <i64 2, i64 0>
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i64> [[TMP1]], zeroinitializer
-; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP2]], <2 x i1> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i64> [[DOTSPLATINSERT]], zeroinitializer
+; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP1]], <2 x i1> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%gep = getelementptr inbounds i32, <2 x ptr> %p, i64 %idx
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