[llvm] d06303f - [ARM] t2CALL_BTI pseudo-inst clobbers LR (#102117)
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Wed Aug 7 02:24:21 PDT 2024
Author: Oliver Stannard
Date: 2024-08-07T10:24:17+01:00
New Revision: d06303ffc1f3b2023532fd426734e9435f87d038
URL: https://github.com/llvm/llvm-project/commit/d06303ffc1f3b2023532fd426734e9435f87d038
DIFF: https://github.com/llvm/llvm-project/commit/d06303ffc1f3b2023532fd426734e9435f87d038.diff
LOG: [ARM] t2CALL_BTI pseudo-inst clobbers LR (#102117)
The t2CALL_BTI pseudo-instruction expands to a tBL instruction, so needs
the same implicit uses and defs as it.
Added:
Modified:
llvm/lib/Target/ARM/ARMInstrThumb2.td
llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td
index e133dbeba365b..61635bd1629eb 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -5849,6 +5849,7 @@ def t2AUT : PACBTIHintSpaceUseInst<"aut", 0b00101101> {
def ARMt2CallBTI : SDNode<"ARMISD::t2CALL_BTI", SDT_ARMcall,
[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue, SDNPVariadic]>;
+let Defs = [LR], Uses = [SP] in
def t2CALL_BTI : PseudoInst<(outs), (ins pred:$p, thumb_bl_target:$func),
IIC_Br, [(ARMt2CallBTI tglobaladdr:$func)]>,
Requires<[IsThumb2]>, Sched<[WriteBrL]>;
diff --git a/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll b/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
index 3b01e3e9327e4..7fe7015a482ad 100644
--- a/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
+++ b/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi < %s | FileCheck %s --check-prefix=BTI
; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+no-bti-at-return-twice < %s | \
; RUN: FileCheck %s --check-prefix=NOBTI
@@ -20,11 +21,43 @@
define i32 @foo(i32 %x) "branch-target-enforcement" {
; BTI-LABEL: foo:
-; BTI: bl setjmp
-; BTI-NEXT: bti
+; BTI: @ %bb.0: @ %entry
+; BTI-NEXT: bti
+; BTI-NEXT: .save {r4, lr}
+; BTI-NEXT: push {r4, lr}
+; BTI-NEXT: mov r4, r0
+; BTI-NEXT: movw r0, :lower16:buf
+; BTI-NEXT: movt r0, :upper16:buf
+; BTI-NEXT: bl setjmp
+; BTI-NEXT: bti
+; BTI-NEXT: cmp r0, #0
+; BTI-NEXT: itt ne
+; BTI-NEXT: movne r0, #0
+; BTI-NEXT: popne {r4, pc}
+; BTI-NEXT: .LBB0_1: @ %if.else
+; BTI-NEXT: mov r0, r4
+; BTI-NEXT: bl bar
+; BTI-NEXT: mov r0, r4
+; BTI-NEXT: pop {r4, pc}
+;
; NOBTI-LABEL: foo:
-; NOBTI: bl setjmp
-; NOBTI-NOT: bti
+; NOBTI: @ %bb.0: @ %entry
+; NOBTI-NEXT: bti
+; NOBTI-NEXT: .save {r4, lr}
+; NOBTI-NEXT: push {r4, lr}
+; NOBTI-NEXT: mov r4, r0
+; NOBTI-NEXT: movw r0, :lower16:buf
+; NOBTI-NEXT: movt r0, :upper16:buf
+; NOBTI-NEXT: bl setjmp
+; NOBTI-NEXT: cmp r0, #0
+; NOBTI-NEXT: itt ne
+; NOBTI-NEXT: movne r0, #0
+; NOBTI-NEXT: popne {r4, pc}
+; NOBTI-NEXT: .LBB0_1: @ %if.else
+; NOBTI-NEXT: mov r0, r4
+; NOBTI-NEXT: bl bar
+; NOBTI-NEXT: mov r0, r4
+; NOBTI-NEXT: pop {r4, pc}
entry:
%call = call i32 @setjmp(ptr @buf) #0
@@ -40,6 +73,41 @@ if.end: ; preds = %entry, %if.else
ret i32 %x.addr.0
}
+;; Check that the BL to setjmp correctly clobbers LR
+
+define i32 @baz() "branch-target-enforcement" {
+; BTI-LABEL: baz:
+; BTI: @ %bb.0: @ %entry
+; BTI-NEXT: bti
+; BTI-NEXT: .save {r7, lr}
+; BTI-NEXT: push {r7, lr}
+; BTI-NEXT: .pad #160
+; BTI-NEXT: sub sp, #160
+; BTI-NEXT: mov r0, sp
+; BTI-NEXT: bl setjmp
+; BTI-NEXT: bti
+; BTI-NEXT: movs r0, #0
+; BTI-NEXT: add sp, #160
+; BTI-NEXT: pop {r7, pc}
+;
+; NOBTI-LABEL: baz:
+; NOBTI: @ %bb.0: @ %entry
+; NOBTI-NEXT: bti
+; NOBTI-NEXT: .save {r7, lr}
+; NOBTI-NEXT: push {r7, lr}
+; NOBTI-NEXT: .pad #160
+; NOBTI-NEXT: sub sp, #160
+; NOBTI-NEXT: mov r0, sp
+; NOBTI-NEXT: bl setjmp
+; NOBTI-NEXT: movs r0, #0
+; NOBTI-NEXT: add sp, #160
+; NOBTI-NEXT: pop {r7, pc}
+entry:
+ %outgoing_jb = alloca [20 x i64], align 8
+ %call = call i32 @setjmp(ptr %outgoing_jb) returns_twice
+ ret i32 0
+}
+
declare void @bar(i32)
declare i32 @setjmp(ptr) #0
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