[clang] [llvm] [RISCV] Add vector and vector crypto to SiFiveP400 scheduler model (PR #102155)

[Camel Coder via llvm-commits]

camel-cdr wrote:

Are the vrgather.vv numbers correct? Usually LMUL>1 vrgather is implemented by aplying a LMUL=1 vrgather LMUL^2 times. Since the LMUL=1 vrgather.vv takes a single cycle, I would've expected a 4 cycle LMUL=2 vrgather.vv instead of 12.
12 cycles is less than one element per cycle (128/32*2=8).

Oh, and did you use upstream llvm-exegesis? I didn't managed to get it to work last time I tried.


https://github.com/llvm/llvm-project/pull/102155