[llvm] [PowerPC][AIX] Update the initial CPU type for AIX. (PR #102277)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 7 00:10:35 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-binary-utilities
Author: Esme (EsmeYi)
<details>
<summary>Changes</summary>
The `PPCTargetParser` was added in https://github.com/llvm/llvm-project/pull/97541.
This patch utilize the `getNormalizedPPCTargetCPU()` to init the CPU type for AIX.
---
Patch is 37.20 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/102277.diff
40 Files Affected:
- (modified) llvm/lib/Target/PowerPC/PPCSubtarget.cpp (+3)
- (modified) llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-dwarf.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-weak-reloc.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix64-csr-alloc.mir (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/alloca-oversized.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/atomic-float.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/fma-assoc.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/hoist-logic.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/huge-frame-call.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/inc-of-add.ll (+4-4)
- (modified) llvm/test/CodeGen/PowerPC/ldst-16-byte.mir (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/licm-tocReg.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass_notail.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass_notail.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/popcnt-zext.ll (+4-4)
- (modified) llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/pr74951.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/store-forward-be32.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/store-forward-be64.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/toc-data-common.ll (+4-4)
- (modified) llvm/test/CodeGen/PowerPC/toc-data-const.ll (+4-4)
- (modified) llvm/test/CodeGen/PowerPC/toc-data.ll (+12-12)
- (modified) llvm/test/DebugInfo/XCOFF/empty.ll (+3-4)
- (modified) llvm/test/DebugInfo/XCOFF/explicit-section.ll (+1-1)
- (modified) llvm/test/DebugInfo/XCOFF/function-sections.ll (+1-1)
- (modified) llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll (+1-1)
- (modified) llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll (+1-1)
- (modified) llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll.generated.expected (+1-1)
- (modified) llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll.nogenerated.expected (+1-1)
- (modified) llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll (+1-1)
- (modified) llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands2.ll (+1-1)
``````````diff
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
index f2fee2ce7c6a8..d498b67813638 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -29,6 +29,7 @@
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/TargetParser/PPCTargetParser.h"
#include <cstdlib>
using namespace llvm;
@@ -84,6 +85,8 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
CPUName = "ppc64le";
else if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
CPUName = "e500";
+ else if (TargetTriple.isOSAIX() && CPUName.empty())
+ CPUName = std::string(PPC::getNormalizedPPCTargetCPU(TargetTriple));
else
CPUName = "generic";
}
diff --git a/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll b/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll
index 2f25f12a13b5b..df32a406d2ba3 100644
--- a/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll
+++ b/llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll
@@ -6,7 +6,7 @@ target triple = "powerpc-ibm-aix7.2.0.0"
; Check IndexedReference::computeRefCost can handle type differences between
; CacheLineSize and Numerator
-; CHECK: Loop '_loop_1_do_' has cost = 2
+; CHECK: Loop '_loop_1_do_' has cost = 1
%_elem_type_of_v = type <{ i32 }>
diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll b/llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
index ccc36530c7957..2674bfcc9fa72 100644
--- a/llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
+; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -stop-after=machine-cp -verify-machineinstrs < %s | \
; RUN: FileCheck --check-prefix=32BIT %s
-; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -stop-after=machine-cp -verify-machineinstrs < %s | \
; RUN: FileCheck --check-prefix=64BIT %s
define void @call_test_chars() {
diff --git a/llvm/test/CodeGen/PowerPC/aix-dwarf.ll b/llvm/test/CodeGen/PowerPC/aix-dwarf.ll
index 33e61a8cab376..59a9e87c6c058 100644
--- a/llvm/test/CodeGen/PowerPC/aix-dwarf.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-dwarf.ll
@@ -1,9 +1,9 @@
-; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
+; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --section-headers %t.o | FileCheck %s --check-prefixes=SEC,SEC32
; RUN: llvm-objdump -r %t.o | FileCheck %s --check-prefix=RELO
-; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t64.o < %s
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t64.o < %s
; RUN: llvm-readobj --section-headers %t64.o | FileCheck %s --check-prefixes=SEC,SEC64
; RUN: llvm-objdump -r %t64.o | FileCheck %s --check-prefix=RELO64
diff --git a/llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll b/llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
index 8e3b99b6114da..6d88f9139d79c 100644
--- a/llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -verify-machineinstrs < %s | FileCheck %s
@llvm.global_ctors = appending global [5 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 0, ptr @cf1, ptr null }, { i32, ptr, ptr } { i32 21, ptr @cf2, ptr null }, { i32, ptr, ptr } { i32 81, ptr @cf3, ptr null }, { i32, ptr, ptr } { i32 1125, ptr @cf4, ptr null }, { i32, ptr, ptr } { i32 64512, ptr @cf5, ptr null }]
@llvm.global_dtors = appending global [5 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 20, ptr @df1, ptr null }, { i32, ptr, ptr } { i32 80, ptr @df2, ptr null }, { i32, ptr, ptr } { i32 1124, ptr @df3, ptr null }, { i32, ptr, ptr } { i32 64511, ptr @df4, ptr null }, { i32, ptr, ptr } { i32 65535, ptr @df5, ptr null }]
diff --git a/llvm/test/CodeGen/PowerPC/aix-weak-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-weak-reloc.ll
index 6b941917d6c31..55606cd358ff9 100644
--- a/llvm/test/CodeGen/PowerPC/aix-weak-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-weak-reloc.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
+; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -dr %t.o | FileCheck --check-prefix=OBJ32 %s
-; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t.o < %s
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -dr %t.o | FileCheck --check-prefix=OBJ64 %s
; Function Attrs: noinline nounwind optnone
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
index bc6e9f3501982..f7ff36cd3f49b 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
@@ -1,9 +1,9 @@
; This file contains exception section testing for when debug information is present.
; The 32-bit test should not print exception auxilliary entries because they are a 64-bit only feature.
; Exception auxilliary entries are present in the 64-bit tests because 64-bit && debug enabled are the requirements.
-; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -filetype=obj -o %t_32.o < %s
+; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t_32.o < %s
; RUN: llvm-readobj --syms %t_32.o | FileCheck %s --check-prefix=SYMS32
-; RUN: llc -mtriple=powerpc64-unknown-aix -filetype=obj -o %t_32.o < %s
+; RUN: llc -mtriple=powerpc64-unknown-aix -mcpu=generic -filetype=obj -o %t_32.o < %s
; RUN: llvm-readobj --syms %t_32.o | FileCheck %s --check-prefix=SYMS64
; If any debug information is included in a module and is XCOFF64, exception auxilliary entries are emitted
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
index 8ee58755919b7..8c915479fa2e0 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
@@ -1,11 +1,11 @@
; Testing 32-bit and 64-bit exception section entries, no exception auxilliary
; entries should be produced as no debug information is specified.
-; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -filetype=obj -o %t_32.o < %s
+; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t_32.o < %s
; RUN: llvm-readobj --exception-section %t_32.o | FileCheck %s --check-prefix=EXCEPT
; RUN: llvm-readobj --section-headers %t_32.o | FileCheck %s --check-prefix=READ
; RUN: llvm-readobj --syms %t_32.o | FileCheck %s --check-prefix=SYMS
-; RUN: llc -mtriple=powerpc64-unknown-aix -filetype=obj -o %t_64.o < %s
+; RUN: llc -mtriple=powerpc64-unknown-aix -mcpu=generic -filetype=obj -o %t_64.o < %s
; RUN: llvm-readobj --exception-section %t_64.o | FileCheck %s --check-prefix=EXCEPT64
; RUN: llvm-readobj --section-headers %t_64.o | FileCheck %s --check-prefix=READ64
; RUN: llvm-readobj --syms %t_64.o | FileCheck %s --check-prefix=SYMS64
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll
index 7ffd11f485e42..2ad2e13472903 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll
@@ -3,10 +3,10 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec -data-sections=false < %s |\
; RUN: FileCheck %s
-; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -filetype=obj %s -o %t.o
+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -filetype=obj %s -o %t.o
; RUN: llvm-readobj --syms --auxiliary-header %t.o | FileCheck %s --check-prefixes=SYM,AUX32
-; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -filetype=obj %s -o %t64.o
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -filetype=obj %s -o %t64.o
; RUN: llvm-readobj --syms --auxiliary-header %t64.o | FileCheck %s --check-prefixes=SYM,AUX64
@b = global i32 0, align 4
diff --git a/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll b/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
index bf66a1ed042d2..a14c84ca1719c 100644
--- a/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
+++ b/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=ASM32 %s
-; RUN: llc -O2 -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | FileCheck --check-prefix=32BIT %s
+; RUN: llc -O2 -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -stop-after=machine-cp -verify-machineinstrs < %s | FileCheck --check-prefix=32BIT %s
define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr {
; ASM32-LABEL: int_va_arg:
diff --git a/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll b/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
index ccf89aac2d540..90f36ff6ad950 100644
--- a/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
+++ b/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O2 -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
+; RUN: llc -O2 -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -stop-after=machine-cp -verify-machineinstrs < %s | \
; RUN: FileCheck --check-prefix=64BIT %s
; RUN: llc -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
diff --git a/llvm/test/CodeGen/PowerPC/aix64-csr-alloc.mir b/llvm/test/CodeGen/PowerPC/aix64-csr-alloc.mir
index 7d96f7feabe2b..b0ade5ffc9709 100644
--- a/llvm/test/CodeGen/PowerPC/aix64-csr-alloc.mir
+++ b/llvm/test/CodeGen/PowerPC/aix64-csr-alloc.mir
@@ -1,6 +1,6 @@
# REQUIRES: asserts
# RUN: llc -verify-machineinstrs -simplify-mir -mtriple=powerpc64-ibm-aix-xcoff \
-# RUN: -debug-only=regalloc %s -o - 2>&1 | FileCheck %s
+# RUN: -mcpu=generic -debug-only=regalloc %s -o - 2>&1 | FileCheck %s
---
name: i64
@@ -19,4 +19,4 @@ body: |
# CHECK-DAG: AllocationOrder(VFRC) = [ $vf2 $vf3 $vf4 $vf5 $vf0 $vf1 $vf6 $vf7 $vf8 $vf9 $vf10 $vf11 $vf12 $vf13 $vf14 $vf15 $vf16 $vf17 $vf18 $vf19 $vf31 $vf30 $vf29 $vf28 $vf27 $vf26 $vf25 $vf24 $vf23 $vf22 $vf21 $vf20 ]
# CHECK-DAG: AllocationOrder(G8RC_and_G8RC_NOX0) = [ $x3 $x4 $x5 $x6 $x7 $x8 $x9 $x10 $x11 $x12 $x31 $x30 $x29 $x28 $x27 $x26 $x25 $x24 $x23 $x22 $x21 $x20 $x19 $x18 $x17 $x16 $x15 $x1
# CHECK-DAG: 4 ]
-# CHECK-DAG: AllocationOrder(F8RC) = [ $f0 $f1 $f2 $f3 $f4 $f5 $f6 $f7 $f8 $f9 $f10 $f11 $f12 $f13 $f31 $f30 $f29 $f28 $f27 $f26 $f25 $f24 $f23 $f22 $f21 $f20 $f19 $f18 $f17 $f16 $f15 $f14 ]
\ No newline at end of file
+# CHECK-DAG: AllocationOrder(F8RC) = [ $f0 $f1 $f2 $f3 $f4 $f5 $f6 $f7 $f8 $f9 $f10 $f11 $f12 $f13 $f31 $f30 $f29 $f28 $f27 $f26 $f25 $f24 $f23 $f22 $f21 $f20 $f19 $f18 $f17 $f16 $f15 $f14 ]
diff --git a/llvm/test/CodeGen/PowerPC/alloca-oversized.ll b/llvm/test/CodeGen/PowerPC/alloca-oversized.ll
index 89922c3483858..d10c66bced3e2 100644
--- a/llvm/test/CodeGen/PowerPC/alloca-oversized.ll
+++ b/llvm/test/CodeGen/PowerPC/alloca-oversized.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck %s
+; RUN: llc < %s -mcpu=generic -mtriple=powerpc-ibm-aix-xcoff | FileCheck %s
define void @test_oversized(ptr %dst, i32 %cond) {
; CHECK-LABEL: test_oversized:
; CHECK: # %bb.0: # %entry
diff --git a/llvm/test/CodeGen/PowerPC/atomic-float.ll b/llvm/test/CodeGen/PowerPC/atomic-float.ll
index 8f9c86fb8a8b8..0158ba8652dd1 100644
--- a/llvm/test/CodeGen/PowerPC/atomic-float.ll
+++ b/llvm/test/CodeGen/PowerPC/atomic-float.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
+; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-unknown-unknown \
; RUN: < %s | FileCheck --check-prefix=CHECK-64 %s
-; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-unknown \
+; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc-unknown-unknown \
; RUN: < %s | FileCheck --check-prefix=CHECK-32 %s
define float @test_add(ptr %ptr, float %incr) {
diff --git a/llvm/test/CodeGen/PowerPC/fma-assoc.ll b/llvm/test/CodeGen/PowerPC/fma-assoc.ll
index 91a89fd6e46e2..a429beac066d5 100644
--- a/llvm/test/CodeGen/PowerPC/fma-assoc.ll
+++ b/llvm/test/CodeGen/PowerPC/fma-assoc.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -fp-contract=fast \
-; RUN: -mattr=-vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
+; RUN: -mcpu=generic -mattr=-vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff -fp-contract=fast \
-; RUN: -mattr=-vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
+; RUN: -mcpu=generic -mattr=-vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -fp-contract=fast -mattr=+vsx -disable-ppc-vsx-fma-mutation=false \
; RUN: -mcpu=pwr7 | FileCheck -check-prefix=CHECK-VSX %s
diff --git a/llvm/test/CodeGen/PowerPC/hoist-logic.ll b/llvm/test/CodeGen/PowerPC/hoist-logic.ll
index 2a3cfb1927ebd..200eb12041d6e 100644
--- a/llvm/test/CodeGen/PowerPC/hoist-logic.ll
+++ b/llvm/test/CodeGen/PowerPC/hoist-logic.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s
; This is good - eliminate an op by hoisting logic.
diff --git a/llvm/test/CodeGen/PowerPC/huge-frame-call.ll b/llvm/test/CodeGen/PowerPC/huge-frame-call.ll
index acbd81eecd8b1..76fe3329c69ee 100644
--- a/llvm/test/CodeGen/PowerPC/huge-frame-call.ll
+++ b/llvm/test/CodeGen/PowerPC/huge-frame-call.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-linux-gnu < %s \
; RUN: 2>&1 | FileCheck --check-prefix=CHECK-LE %s
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff < %s \
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -mcpu=generic < %s \
; RUN: 2>&1 | FileCheck --check-prefix=CHECK-BE %s
%0 = type <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, [8 x i8] }>
diff --git a/llvm/test/CodeGen/PowerPC/inc-of-add.ll b/llvm/test/CodeGen/PowerPC/inc-of-add.ll
index c6d6f6a17b1b5..8b1664681febd 100644
--- a/llvm/test/CodeGen/PowerPC/inc-of-add.ll
+++ b/llvm/test/CodeGen/PowerPC/inc-of-add.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=ppc32-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC32
-; RUN: llc < %s -mtriple=powerpc64-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC64,PPC64BE
-; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s --check-prefixes=ALL,PPC64,PPC64BE,AIX-PPC64
-; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC64,PPC64LE
+; RUN: llc < %s -mcpu=generic -mtriple=ppc32-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC32
+; RUN: llc < %s -mcpu=generic -mtriple=powerpc64-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC64,PPC64BE
+; RUN: llc < %s -mcpu=generic -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s --check-prefixes=ALL,PPC64,PPC64BE,AIX-PPC64
+; RUN: llc < %s -mcpu=generic -mtriple=powerpc64le-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC64,PPC64LE
; These two forms are equivalent:
; sub %y, (xor %x, -1)
diff --git a/llvm/test/CodeGen/PowerPC/ldst-16-byte.mir b/llvm/test/CodeGen/PowerPC/ldst-16-byte.mir
index b9c541feae5ac..4dc78cd12e368 100644
--- a/llvm/test/CodeGen/PowerPC/ldst-16-byte.mir
+++ b/llvm/test/CodeGen/PowerPC/ldst-16-byte.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -simplify-mir -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \
+# RUN: llc -simplify-mir -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-ibm-aix-xcoff \
# RUN: -stop-after=postrapseudos %s -o - | FileCheck %s
---
diff --git a/llvm/test/CodeGen/PowerPC/licm-tocReg.ll b/llvm/test/CodeGen/PowerPC/licm-tocReg.ll
index 7b53108750192..1d87060820856 100644
--- a/llvm/test/CodeGen/PowerPC/licm-tocReg.ll
+++ b/llvm/test/CodeGen/PowerPC/licm-tocReg.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck -check-prefixes=CHECKLX %s
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECKAIX %s
-; RUN: llc -verify-machineinstrs -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECKAIX32 %s
+; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECKAIX %s
+; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECKAIX32 %s
; The instructions ADDIStocHA8/LDtocL are used to calculate the address of
; globals. The ones that are in bb.3.if.end could not be hoisted by Machine
diff --git a/llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass_notail.ll b/llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass_notail.ll
index e7d5d6c3847f8..59d259246b944 100644
--- a/llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass_notail.ll
+++ b/llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass_notail.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK-LNX %s
-; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s
+; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mcpu=generic -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s
define void @cos_f64(ptr %arg) {
; CHECK-LNX-LABEL: cos_f64:
diff --git a/llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass_notail.ll b/llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass_notail.ll
index 3fe1b7086c697..0f3289cf102e4 100644
--- a/llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass_notail.ll
+++ b/llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass_notail.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK-LNX %s
-; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s
+; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mcpu=generic -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s
define void @cos_f64(ptr %arg) {
; CHECK-LNX-LABEL: cos_f64:
diff --git a/llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll b/llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll
index 37df4d6a71d1a..57bb74f0e979d 100644
--- a/llvm...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/102277
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