[llvm] 41491c7 - [CodeGen] Allocate RegAllocHints map lazily (#102186)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 6 22:56:36 PDT 2024
Author: Alexis Engelke
Date: 2024-08-07T07:56:32+02:00
New Revision: 41491c77231e9d389ef18593be1fab4f4e810e88
URL: https://github.com/llvm/llvm-project/commit/41491c77231e9d389ef18593be1fab4f4e810e88
DIFF: https://github.com/llvm/llvm-project/commit/41491c77231e9d389ef18593be1fab4f4e810e88.diff
LOG: [CodeGen] Allocate RegAllocHints map lazily (#102186)
This hint map is not required whenever a new register is added, in fact,
at -O0, it is not used at all. Growing this map is quite expensive, as
SmallVectors are not trivially copyable.
Grow this map only when hints are actually added to avoid multiple grows
and grows when no hints are added at all.
Added:
Modified:
llvm/include/llvm/CodeGen/MachineRegisterInfo.h
llvm/lib/CodeGen/MachineRegisterInfo.cpp
llvm/lib/CodeGen/TargetRegisterInfo.cpp
llvm/tools/llvm-reduce/ReducerWorkItem.cpp
llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
index 09d9a0b4ec402..2367d8d04787d 100644
--- a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -801,6 +801,7 @@ class MachineRegisterInfo {
/// of an earlier hint it will be overwritten.
void setRegAllocationHint(Register VReg, unsigned Type, Register PrefReg) {
assert(VReg.isVirtual());
+ RegAllocHints.grow(Register::index2VirtReg(getNumVirtRegs()));
RegAllocHints[VReg].first = Type;
RegAllocHints[VReg].second.clear();
RegAllocHints[VReg].second.push_back(PrefReg);
@@ -810,6 +811,7 @@ class MachineRegisterInfo {
/// vector for VReg.
void addRegAllocationHint(Register VReg, Register PrefReg) {
assert(VReg.isVirtual());
+ RegAllocHints.grow(Register::index2VirtReg(getNumVirtRegs()));
RegAllocHints[VReg].second.push_back(PrefReg);
}
@@ -822,7 +824,8 @@ class MachineRegisterInfo {
void clearSimpleHint(Register VReg) {
assert (!RegAllocHints[VReg].first &&
"Expected to clear a non-target hint!");
- RegAllocHints[VReg].second.clear();
+ if (RegAllocHints.inBounds(VReg))
+ RegAllocHints[VReg].second.clear();
}
/// getRegAllocationHint - Return the register allocation hint for the
@@ -830,6 +833,8 @@ class MachineRegisterInfo {
/// one with the greatest weight.
std::pair<unsigned, Register> getRegAllocationHint(Register VReg) const {
assert(VReg.isVirtual());
+ if (!RegAllocHints.inBounds(VReg))
+ return {0, Register()};
Register BestHint = (RegAllocHints[VReg.id()].second.size() ?
RegAllocHints[VReg.id()].second[0] : Register());
return {RegAllocHints[VReg.id()].first, BestHint};
@@ -845,10 +850,10 @@ class MachineRegisterInfo {
/// getRegAllocationHints - Return a reference to the vector of all
/// register allocation hints for VReg.
- const std::pair<unsigned, SmallVector<Register, 4>> &
+ const std::pair<unsigned, SmallVector<Register, 4>> *
getRegAllocationHints(Register VReg) const {
assert(VReg.isVirtual());
- return RegAllocHints[VReg];
+ return RegAllocHints.inBounds(VReg) ? &RegAllocHints[VReg] : nullptr;
}
/// markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
index 3caa96cd5e55d..fcedb302d228c 100644
--- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
@@ -47,7 +47,6 @@ MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF)
: MF->getSubtarget().enableSubRegLiveness()) {
unsigned NumRegs = getTargetRegisterInfo()->getNumRegs();
VRegInfo.reserve(256);
- RegAllocHints.reserve(256);
UsedPhysRegMask.resize(NumRegs);
PhysRegUseDefLists.reset(new MachineOperand*[NumRegs]());
TheDelegates.clear();
@@ -147,7 +146,6 @@ MachineRegisterInfo::recomputeRegClass(Register Reg) {
Register MachineRegisterInfo::createIncompleteVirtualRegister(StringRef Name) {
Register Reg = Register::index2VirtReg(getNumVirtRegs());
VRegInfo.grow(Reg);
- RegAllocHints.grow(Reg);
insertVRegByName(Name, Reg);
return Reg;
}
diff --git a/llvm/lib/CodeGen/TargetRegisterInfo.cpp b/llvm/lib/CodeGen/TargetRegisterInfo.cpp
index ffc8055dd27e8..16dab974efacb 100644
--- a/llvm/lib/CodeGen/TargetRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/TargetRegisterInfo.cpp
@@ -421,13 +421,16 @@ bool TargetRegisterInfo::getRegAllocationHints(
SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF,
const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const {
const MachineRegisterInfo &MRI = MF.getRegInfo();
- const std::pair<unsigned, SmallVector<Register, 4>> &Hints_MRI =
+ const std::pair<unsigned, SmallVector<Register, 4>> *Hints_MRI =
MRI.getRegAllocationHints(VirtReg);
+ if (!Hints_MRI)
+ return false;
+
SmallSet<Register, 32> HintedRegs;
// First hint may be a target hint.
- bool Skip = (Hints_MRI.first != 0);
- for (auto Reg : Hints_MRI.second) {
+ bool Skip = (Hints_MRI->first != 0);
+ for (auto Reg : Hints_MRI->second) {
if (Skip) {
Skip = false;
continue;
diff --git a/llvm/tools/llvm-reduce/ReducerWorkItem.cpp b/llvm/tools/llvm-reduce/ReducerWorkItem.cpp
index 3d36d80f82315..3fa49cbef4ec2 100644
--- a/llvm/tools/llvm-reduce/ReducerWorkItem.cpp
+++ b/llvm/tools/llvm-reduce/ReducerWorkItem.cpp
@@ -306,9 +306,10 @@ static std::unique_ptr<MachineFunction> cloneMF(MachineFunction *SrcMF,
DstMRI->setType(NewReg, RegTy);
// Copy register allocation hints.
- const auto &Hints = SrcMRI->getRegAllocationHints(Reg);
- for (Register PrefReg : Hints.second)
- DstMRI->addRegAllocationHint(NewReg, PrefReg);
+ const auto *Hints = SrcMRI->getRegAllocationHints(Reg);
+ if (Hints)
+ for (Register PrefReg : Hints->second)
+ DstMRI->addRegAllocationHint(NewReg, PrefReg);
}
const TargetSubtargetInfo &STI = DstMF->getSubtarget();
@@ -530,7 +531,8 @@ static uint64_t computeMIRComplexityScoreImpl(const MachineFunction &MF) {
const MachineRegisterInfo &MRI = MF.getRegInfo();
for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
Register Reg = Register::index2VirtReg(I);
- Score += MRI.getRegAllocationHints(Reg).second.size();
+ if (const auto *Hints = MRI.getRegAllocationHints(Reg))
+ Score += Hints->second.size();
}
for (const MachineBasicBlock &MBB : MF) {
diff --git a/llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp b/llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp
index 2b97e65bbf093..3ec9555c0f2f5 100644
--- a/llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp
+++ b/llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp
@@ -23,9 +23,9 @@ static void dropRegisterHintsFromFunction(Oracle &O, MachineFunction &MF) {
for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
Register Reg = Register::index2VirtReg(I);
- const std::pair<unsigned, SmallVector<Register, 4>> &Hints =
+ const std::pair<unsigned, SmallVector<Register, 4>> *Hints =
MRI.getRegAllocationHints(Reg);
- if (Hints.second.empty())
+ if (!Hints || Hints->second.empty())
continue;
if (!O.shouldKeep())
More information about the llvm-commits
mailing list