[llvm] MTM: improve operand latency when missing sched info (PR #101389)

[Ramkumar Ramachandra via llvm-commits]

artagnon wrote:

Gentle ping. I think the test changes can be summarized as:
- ALU operations like add, sub, shift, and have latency of 1: therefore, it is fine to schedule a use of the result immediately after.
- Load operations have non-trivial latency: therefore, instructions have been re-ordered to avoid stalling after a load.
- Vector operations have non-trivial latency: again, instructions have been re-ordered to avoid waiting for the result.

https://github.com/llvm/llvm-project/pull/101389