[llvm] [NFC] Use references to avoid copying (PR #99863)

[Pratyay Pande via llvm-commits]

https://github.com/pratyay-p updated https://github.com/llvm/llvm-project/pull/99863

>From b15c063a955eaa0547f7a7b6b3ba8cfd946fef4b Mon Sep 17 00:00:00 2001
From: "Pande, Pratyay" <pratyay.pande at intel.com>
Date: Mon, 22 Jul 2024 03:40:48 -0700
Subject: [PATCH 1/3] Modified auto to auto& for MachineOperand objects

---
 llvm/lib/CodeGen/RegAllocFast.cpp    | 2 +-
 llvm/lib/CodeGen/WindowScheduler.cpp | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
index b4660d4085ffd..7e9f96a3451f7 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -584,7 +584,7 @@ void RegAllocFastImpl::spill(MachineBasicBlock::iterator Before,
       SpilledOperandsMap;
   for (MachineOperand *MO : LRIDbgOperands)
     SpilledOperandsMap[MO->getParent()].push_back(MO);
-  for (auto MISpilledOperands : SpilledOperandsMap) {
+  for (auto& MISpilledOperands : SpilledOperandsMap) {
     MachineInstr &DBG = *MISpilledOperands.first;
     // We don't have enough support for tracking operands of DBG_VALUE_LISTs.
     if (DBG.isDebugValueList())
diff --git a/llvm/lib/CodeGen/WindowScheduler.cpp b/llvm/lib/CodeGen/WindowScheduler.cpp
index 0777480499e55..15e99bf40c749 100644
--- a/llvm/lib/CodeGen/WindowScheduler.cpp
+++ b/llvm/lib/CodeGen/WindowScheduler.cpp
@@ -315,7 +315,7 @@ void WindowScheduler::generateTripleMBB() {
       auto *NewMI = MF->CloneMachineInstr(MI);
       DenseMap<Register, Register> NewDefs;
       // New defines are updated.
-      for (auto MO : NewMI->all_defs())
+      for (const auto& MO : NewMI->all_defs())
         if (MO.isReg() && MO.getReg().isVirtual()) {
           Register NewDef =
               MRI->createVirtualRegister(MRI->getRegClass(MO.getReg()));
@@ -692,7 +692,7 @@ unsigned WindowScheduler::getOriStage(MachineInstr *OriMI, unsigned Offset) {
 Register WindowScheduler::getAntiRegister(MachineInstr *Phi) {
   assert(Phi->isPHI() && "Expecting PHI!");
   Register AntiReg;
-  for (auto MO : Phi->uses()) {
+  for (const auto& MO : Phi->uses()) {
     if (MO.isReg())
       AntiReg = MO.getReg();
     else if (MO.isMBB() && MO.getMBB() == MBB)

>From a2c1adac260c0b273974e15388197d0b42be756c Mon Sep 17 00:00:00 2001
From: Pratyay Pande <pratyay.pande at intel.com>
Date: Fri, 2 Aug 2024 11:06:58 +0530
Subject: [PATCH 2/3] Fixed formatting in RegAllocFast.cpp

---
 llvm/lib/CodeGen/RegAllocFast.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
index 58cd550e6bb18..68a8c83508244 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -584,7 +584,7 @@ void RegAllocFastImpl::spill(MachineBasicBlock::iterator Before,
       SpilledOperandsMap;
   for (MachineOperand *MO : LRIDbgOperands)
     SpilledOperandsMap[MO->getParent()].push_back(MO);
-  for (auto& MISpilledOperands : SpilledOperandsMap) {
+  for (auto &MISpilledOperands : SpilledOperandsMap) {
     MachineInstr &DBG = *MISpilledOperands.first;
     // We don't have enough support for tracking operands of DBG_VALUE_LISTs.
     if (DBG.isDebugValueList())

>From 6f20f888a272ef85069cf5812d95dd9481f44165 Mon Sep 17 00:00:00 2001
From: Pratyay Pande <pratyay.pande at intel.com>
Date: Fri, 2 Aug 2024 11:08:01 +0530
Subject: [PATCH 3/3] Fixed formatting in WindowScheduler.cpp

---
 llvm/lib/CodeGen/WindowScheduler.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/CodeGen/WindowScheduler.cpp b/llvm/lib/CodeGen/WindowScheduler.cpp
index 18d0670dc8d38..6ac1c4c135981 100644
--- a/llvm/lib/CodeGen/WindowScheduler.cpp
+++ b/llvm/lib/CodeGen/WindowScheduler.cpp
@@ -318,7 +318,7 @@ void WindowScheduler::generateTripleMBB() {
       auto *NewMI = MF->CloneMachineInstr(MI);
       DenseMap<Register, Register> NewDefs;
       // New defines are updated.
-      for (const auto& MO : NewMI->all_defs())
+      for (const auto &MO : NewMI->all_defs())
         if (MO.isReg() && MO.getReg().isVirtual()) {
           Register NewDef =
               MRI->createVirtualRegister(MRI->getRegClass(MO.getReg()));
@@ -700,7 +700,7 @@ unsigned WindowScheduler::getOriStage(MachineInstr *OriMI, unsigned Offset) {
 Register WindowScheduler::getAntiRegister(MachineInstr *Phi) {
   assert(Phi->isPHI() && "Expecting PHI!");
   Register AntiReg;
-  for (const auto& MO : Phi->uses()) {
+  for (const auto &MO : Phi->uses()) {
     if (MO.isReg())
       AntiReg = MO.getReg();
     else if (MO.isMBB() && MO.getMBB() == MBB)