[llvm] [ARM] t2CALL_BTI pseudo-inst clobbers LR (PR #102117)

Tue Aug 6 02:59:08 PDT 2024

https://github.com/ostannard created https://github.com/llvm/llvm-project/pull/102117

The t2CALL_BTI pseudo-instruction expands to a tBL instruction, so needs the same implicit uses and defs as it.

>From 11d8bfbe32fb0c5b53f2d5a0ed4cba3c5d23e9a2 Mon Sep 17 00:00:00 2001
From: Oliver Stannard <oliver.stannard at arm.com>
Date: Tue, 6 Aug 2024 10:50:33 +0100
Subject: [PATCH 1/2] Pre-commit test showing bug

---
 llvm/test/CodeGen/ARM/setjmp-bti-basic.ll | 74 +++++++++++++++++++++--
 1 file changed, 70 insertions(+), 4 deletions(-)

diff --git a/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll b/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
index 3b01e3e9327e4..f677a691b1804 100644
--- a/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
+++ b/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi < %s | FileCheck %s --check-prefix=BTI
 ; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+no-bti-at-return-twice < %s | \
 ; RUN: FileCheck %s --check-prefix=NOBTI
@@ -20,11 +21,43 @@
 
 define i32 @foo(i32 %x)  "branch-target-enforcement" {
 ; BTI-LABEL: foo:
-; BTI:       bl setjmp
-; BTI-NEXT:  bti
+; BTI:       @ %bb.0: @ %entry
+; BTI-NEXT:    bti
+; BTI-NEXT:    .save {r4, lr}
+; BTI-NEXT:    push {r4, lr}
+; BTI-NEXT:    mov r4, r0
+; BTI-NEXT:    movw r0, :lower16:buf
+; BTI-NEXT:    movt r0, :upper16:buf
+; BTI-NEXT:    bl setjmp
+; BTI-NEXT:    bti
+; BTI-NEXT:    cmp r0, #0
+; BTI-NEXT:    itt ne
+; BTI-NEXT:    movne r0, #0
+; BTI-NEXT:    popne {r4, pc}
+; BTI-NEXT:  .LBB0_1: @ %if.else
+; BTI-NEXT:    mov r0, r4
+; BTI-NEXT:    bl bar
+; BTI-NEXT:    mov r0, r4
+; BTI-NEXT:    pop {r4, pc}
+;
 ; NOBTI-LABEL: foo:
-; NOBTI:       bl setjmp
-; NOBTI-NOT:   bti
+; NOBTI:       @ %bb.0: @ %entry
+; NOBTI-NEXT:    bti
+; NOBTI-NEXT:    .save {r4, lr}
+; NOBTI-NEXT:    push {r4, lr}
+; NOBTI-NEXT:    mov r4, r0
+; NOBTI-NEXT:    movw r0, :lower16:buf
+; NOBTI-NEXT:    movt r0, :upper16:buf
+; NOBTI-NEXT:    bl setjmp
+; NOBTI-NEXT:    cmp r0, #0
+; NOBTI-NEXT:    itt ne
+; NOBTI-NEXT:    movne r0, #0
+; NOBTI-NEXT:    popne {r4, pc}
+; NOBTI-NEXT:  .LBB0_1: @ %if.else
+; NOBTI-NEXT:    mov r0, r4
+; NOBTI-NEXT:    bl bar
+; NOBTI-NEXT:    mov r0, r4
+; NOBTI-NEXT:    pop {r4, pc}
 
 entry:
   %call = call i32 @setjmp(ptr @buf) #0
@@ -40,6 +73,39 @@ if.end:                                           ; preds = %entry, %if.else
   ret i32 %x.addr.0
 }
 
+;; Check that the BL to setjmp correctly clobbers LR
+
+define i32 @baz() "branch-target-enforcement" {
+; BTI-LABEL: baz:
+; BTI:       @ %bb.0: @ %entry
+; BTI-NEXT:    bti
+; BTI-NEXT:    .pad #160
+; BTI-NEXT:    sub sp, #160
+; BTI-NEXT:    mov r0, sp
+; BTI-NEXT:    bl setjmp
+; BTI-NEXT:    bti
+; BTI-NEXT:    movs r0, #0
+; BTI-NEXT:    add sp, #160
+; BTI-NEXT:    bx lr
+;
+; NOBTI-LABEL: baz:
+; NOBTI:       @ %bb.0: @ %entry
+; NOBTI-NEXT:    bti
+; NOBTI-NEXT:    .save {r7, lr}
+; NOBTI-NEXT:    push {r7, lr}
+; NOBTI-NEXT:    .pad #160
+; NOBTI-NEXT:    sub sp, #160
+; NOBTI-NEXT:    mov r0, sp
+; NOBTI-NEXT:    bl setjmp
+; NOBTI-NEXT:    movs r0, #0
+; NOBTI-NEXT:    add sp, #160
+; NOBTI-NEXT:    pop {r7, pc}
+entry:
+  %outgoing_jb = alloca [20 x i64], align 8
+  %call = call i32 @setjmp(ptr %outgoing_jb) returns_twice
+  ret i32 0
+}
+
 declare void @bar(i32)
 declare i32 @setjmp(ptr) #0
 

>From 54b08f764e04b0297cc9a3f47c6ac9006b0148dd Mon Sep 17 00:00:00 2001
From: Oliver Stannard <oliver.stannard at arm.com>
Date: Tue, 6 Aug 2024 10:50:51 +0100
Subject: [PATCH 2/2] [ARM] t2CALL_BTI pseudo-inst clobbers LR

The t2CALL_BTI pseudo-instruction expands to a tBL instruction, so needs
the same implicit uses and defs as it.
---
 llvm/lib/Target/ARM/ARMInstrThumb2.td     | 1 +
 llvm/test/CodeGen/ARM/setjmp-bti-basic.ll | 4 +++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td
index e133dbeba365b..61635bd1629eb 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -5849,6 +5849,7 @@ def t2AUT    : PACBTIHintSpaceUseInst<"aut", 0b00101101> {
 def ARMt2CallBTI : SDNode<"ARMISD::t2CALL_BTI", SDT_ARMcall,
                    [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue, SDNPVariadic]>;
 
+let Defs = [LR], Uses = [SP] in
 def t2CALL_BTI : PseudoInst<(outs), (ins pred:$p, thumb_bl_target:$func),
                  IIC_Br, [(ARMt2CallBTI tglobaladdr:$func)]>,
                  Requires<[IsThumb2]>, Sched<[WriteBrL]>;
diff --git a/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll b/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
index f677a691b1804..7fe7015a482ad 100644
--- a/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
+++ b/llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
@@ -79,6 +79,8 @@ define i32 @baz() "branch-target-enforcement" {
 ; BTI-LABEL: baz:
 ; BTI:       @ %bb.0: @ %entry
 ; BTI-NEXT:    bti
+; BTI-NEXT:    .save {r7, lr}
+; BTI-NEXT:    push {r7, lr}
 ; BTI-NEXT:    .pad #160
 ; BTI-NEXT:    sub sp, #160
 ; BTI-NEXT:    mov r0, sp
@@ -86,7 +88,7 @@ define i32 @baz() "branch-target-enforcement" {
 ; BTI-NEXT:    bti
 ; BTI-NEXT:    movs r0, #0
 ; BTI-NEXT:    add sp, #160
-; BTI-NEXT:    bx lr
+; BTI-NEXT:    pop {r7, pc}
 ;
 ; NOBTI-LABEL: baz:
 ; NOBTI:       @ %bb.0: @ %entry

