[clang] [llvm] [RISCV] Add sifive-p470 processor (PR #102022)

Pengcheng Wang via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 5 20:09:41 PDT 2024


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@@ -1371,7 +1371,6 @@ def NoConditionalMoveFusion  : Predicate<"!Subtarget->hasConditionalMoveFusion()
 
 def TuneSiFive7 : SubtargetFeature<"sifive7", "RISCVProcFamily", "SiFive7",
                                    "SiFive 7-Series processors">;
-
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wangpc-pp wrote:

Removed by accident?

https://github.com/llvm/llvm-project/pull/102022


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