[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT new instructions. (PR #101599)
Freddy Ye via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 5 18:31:17 PDT 2024
https://github.com/FreddyLeaf updated https://github.com/llvm/llvm-project/pull/101599
>From 49bda50784dc3bd11b317b278e2fbb1a5bdff38b Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Tue, 30 Jul 2024 10:39:59 +0800
Subject: [PATCH 1/2] Support AVX10.2-SATCVT new instructions.
---
clang/include/clang/Basic/BuiltinsX86.def | 38 +
clang/lib/Headers/CMakeLists.txt | 2 +
clang/lib/Headers/avx10_2_512satcvtintrin.h | 327 ++++
clang/lib/Headers/avx10_2satcvtintrin.h | 448 +++++
clang/lib/Headers/immintrin.h | 2 +
clang/lib/Sema/SemaX86.cpp | 16 +
.../X86/avx10_2_512satcvt-builtins-error.c | 198 ++
.../CodeGen/X86/avx10_2_512satcvt-builtins.c | 379 ++++
.../test/CodeGen/X86/avx10_2satcvt-builtins.c | 603 ++++++
llvm/include/llvm/IR/IntrinsicsX86.td | 112 ++
llvm/lib/Target/X86/X86ISelLowering.cpp | 20 +
llvm/lib/Target/X86/X86ISelLowering.h | 21 +
llvm/lib/Target/X86/X86InstrAVX10.td | 170 ++
llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 82 +
llvm/lib/Target/X86/X86InstrUtils.td | 6 +-
llvm/lib/Target/X86/X86IntrinsicsInfo.h | 72 +
.../X86/avx10_2_512satcvt-intrinsics.ll | 1003 ++++++++++
.../CodeGen/X86/avx10_2satcvt-intrinsics.ll | 1618 +++++++++++++++++
.../MC/Disassembler/X86/avx10.2-satcvt-32.txt | 1363 ++++++++++++++
.../MC/Disassembler/X86/avx10.2-satcvt-64.txt | 1363 ++++++++++++++
llvm/test/MC/X86/avx10.2satcvt-32-att.s | 1362 ++++++++++++++
llvm/test/MC/X86/avx10.2satcvt-32-intel.s | 1362 ++++++++++++++
llvm/test/MC/X86/avx10.2satcvt-64-att.s | 1362 ++++++++++++++
llvm/test/MC/X86/avx10.2satcvt-64-intel.s | 1362 ++++++++++++++
llvm/test/TableGen/x86-fold-tables.inc | 216 +++
25 files changed, 13504 insertions(+), 3 deletions(-)
create mode 100644 clang/lib/Headers/avx10_2_512satcvtintrin.h
create mode 100644 clang/lib/Headers/avx10_2satcvtintrin.h
create mode 100755 clang/test/CodeGen/X86/avx10_2_512satcvt-builtins-error.c
create mode 100755 clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
create mode 100644 clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
create mode 100644 llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
create mode 100644 llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
create mode 100644 llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
create mode 100644 llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
create mode 100644 llvm/test/MC/X86/avx10.2satcvt-32-att.s
create mode 100644 llvm/test/MC/X86/avx10.2satcvt-32-intel.s
create mode 100644 llvm/test/MC/X86/avx10.2satcvt-64-att.s
create mode 100644 llvm/test/MC/X86/avx10.2satcvt-64-intel.s
diff --git a/clang/include/clang/Basic/BuiltinsX86.def b/clang/include/clang/Basic/BuiltinsX86.def
index c49b5c36da4fc..fb55057b8cbc3 100644
--- a/clang/include/clang/Basic/BuiltinsX86.def
+++ b/clang/include/clang/Basic/BuiltinsX86.def
@@ -2158,6 +2158,44 @@ TARGET_BUILTIN(__builtin_ia32_vminmaxps512_round_mask, "V16fV16fV16fIiV16fUsIi",
TARGET_BUILTIN(__builtin_ia32_vminmaxsd_round_mask, "V2dV2dV2dIiV2dUcIi", "nV:128:", "avx10.2-256")
TARGET_BUILTIN(__builtin_ia32_vminmaxsh_round_mask, "V8xV8xV8xIiV8xUcIi", "nV:128:", "avx10.2-256")
TARGET_BUILTIN(__builtin_ia32_vminmaxss_round_mask, "V4fV4fV4fIiV4fUcIi", "nV:128:", "avx10.2-256")
+
+// AVX10.2 SATCVT
+TARGET_BUILTIN(__builtin_ia32_vcvtnebf162ibs128, "V8UsV8y", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtnebf162ibs256, "V16UsV16y", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtnebf162ibs512, "V32UsV32y", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtnebf162iubs128, "V8UsV8y", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtnebf162iubs256, "V16UsV16y", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtnebf162iubs512, "V32UsV32y", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtph2ibs128_mask, "V8UsV8xV8UsUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtph2ibs256_mask, "V16UsV16xV16UsUsIi", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtph2ibs512_mask, "V32UsV32xV32UsUiIi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtph2iubs128_mask, "V8UsV8xV8UsUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtph2iubs256_mask, "V16UsV16xV16UsUsIi", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtph2iubs512_mask, "V32UsV32xV32UsUiIi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtps2ibs128_mask, "V4UiV4fV4UiUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtps2ibs256_mask, "V8UiV8fV8UiUcIi", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtps2ibs512_mask, "V16UiV16fV16UiUsIi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtps2iubs128_mask, "V4UiV4fV4UiUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtps2iubs256_mask, "V8UiV8fV8UiUcIi", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtps2iubs512_mask, "V16UiV16fV16UiUsIi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvttnebf162ibs128, "V8UsV8y", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttnebf162ibs256, "V16UsV16y", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttnebf162ibs512, "V32UsV32y", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvttnebf162iubs128, "V8UsV8y", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttnebf162iubs256, "V16UsV16y", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttnebf162iubs512, "V32UsV32y", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvttph2ibs128_mask, "V8UsV8xV8UsUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttph2ibs256_mask, "V16UsV16xV16UsUsIi", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttph2ibs512_mask, "V32UsV32xV32UsUiIi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvttph2iubs128_mask, "V8UsV8xV8UsUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttph2iubs256_mask, "V16UsV16xV16UsUsIi", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttph2iubs512_mask, "V32UsV32xV32UsUiIi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvttps2ibs128_mask, "V4UiV4fV4UiUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttps2ibs256_mask, "V8UiV8fV8UiUcIi", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttps2ibs512_mask, "V16UiV16fV16UiUsIi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvttps2iubs128_mask, "V4UiV4fV4UiUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttps2iubs256_mask, "V8UiV8fV8UiUcIi", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttps2iubs512_mask, "V16UiV16fV16UiUsIi", "nV:512:", "avx10.2-512")
#undef BUILTIN
#undef TARGET_BUILTIN
#undef TARGET_HEADER_BUILTIN
diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt
index f3d19e38f8f2b..91e106427ba1d 100644
--- a/clang/lib/Headers/CMakeLists.txt
+++ b/clang/lib/Headers/CMakeLists.txt
@@ -149,7 +149,9 @@ set(x86_files
amxintrin.h
avx10_2_512minmaxintrin.h
avx10_2_512niintrin.h
+ avx10_2_512satcvtintrin.h
avx10_2minmaxintrin.h
+ avx10_2satcvtintrin.h
avx10_2niintrin.h
avx2intrin.h
avx512bf16intrin.h
diff --git a/clang/lib/Headers/avx10_2_512satcvtintrin.h b/clang/lib/Headers/avx10_2_512satcvtintrin.h
new file mode 100644
index 0000000000000..0ea645bee22f9
--- /dev/null
+++ b/clang/lib/Headers/avx10_2_512satcvtintrin.h
@@ -0,0 +1,327 @@
+/*===------ avx10_2_512satcvtintrin.h - AVX10_2_512SATCVT intrinsics -------===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===-----------------------------------------------------------------------===
+ */
+#ifndef __IMMINTRIN_H
+#error \
+ "Never use <avx10_2_512satcvtintrin.h> directly; include <immintrin.h> instead."
+#endif // __IMMINTRIN_H
+
+#ifndef __AVX10_2_512SATCVTINTRIN_H
+#define __AVX10_2_512SATCVTINTRIN_H
+
+#define _mm512_ipcvtnebf16_epi8(A) \
+ ((__m512i)__builtin_ia32_vcvtnebf162ibs512((__v32bf)(__m512bh)(A)))
+
+#define _mm512_mask_ipcvtnebf16_epi8(W, U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvtnebf16_epi8(A), \
+ (__v32hi)(__m512i)(W)))
+
+#define _mm512_maskz_ipcvtnebf16_epi8(U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvtnebf16_epi8(A), \
+ (__v32hi)_mm512_setzero_si512()))
+
+#define _mm512_ipcvtnebf16_epu8(A) \
+ ((__m512i)__builtin_ia32_vcvtnebf162iubs512((__v32bf)(__m512bh)(A)))
+
+#define _mm512_mask_ipcvtnebf16_epu8(W, U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvtnebf16_epu8(A), \
+ (__v32hi)(__m512i)(W)))
+
+#define _mm512_maskz_ipcvtnebf16_epu8(U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvtnebf16_epu8(A), \
+ (__v32hi)_mm512_setzero_si512()))
+
+#define _mm512_ipcvttnebf16_epi8(A) \
+ ((__m512i)__builtin_ia32_vcvttnebf162ibs512((__v32bf)(__m512bh)(A)))
+
+#define _mm512_mask_ipcvttnebf16_epi8(W, U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epi8(A), \
+ (__v32hi)(__m512i)(W)))
+
+#define _mm512_maskz_ipcvttnebf16_epi8(U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epi8(A), \
+ (__v32hi)_mm512_setzero_si512()))
+
+#define _mm512_ipcvttnebf16_epu8(A) \
+ ((__m512i)__builtin_ia32_vcvttnebf162iubs512((__v32bf)(__m512bh)(A)))
+
+#define _mm512_mask_ipcvttnebf16_epu8(W, U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epu8(A), \
+ (__v32hi)(__m512i)(W)))
+
+#define _mm512_maskz_ipcvttnebf16_epu8(U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epu8(A), \
+ (__v32hi)_mm512_setzero_si512()))
+
+#define _mm512_ipcvtph_epi8(A) \
+ ((__m512i)__builtin_ia32_vcvtph2ibs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_mask_ipcvtph_epi8(W, U, A) \
+ ((__m512i)__builtin_ia32_vcvtph2ibs512_mask((__v32hf)(__m512h)(A), \
+ (__v32hu)(W), (__mmask32)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_maskz_ipcvtph_epi8(U, A) \
+ ((__m512i)__builtin_ia32_vcvtph2ibs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_ipcvt_roundph_epi8(A, R) \
+ ((__m512i)__builtin_ia32_vcvtph2ibs512_mask((__v32hf)(__m512h)(A), \
+ (__v32hu)_mm512_setzero_si512(), \
+ (__mmask32)-1, (const int)R))
+
+#define _mm512_mask_ipcvt_roundph_epi8(W, U, A, R) \
+ ((__m512i)__builtin_ia32_vcvtph2ibs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)(W), (__mmask32)(U), (const int)R))
+
+#define _mm512_maskz_ipcvt_roundph_epi8(U, A, R) \
+ ((__m512i)__builtin_ia32_vcvtph2ibs512_mask((__v32hf)(__m512h)(A), \
+ (__v32hu)_mm512_setzero_si512(), \
+ (__mmask32)(U), (const int)R))
+
+#define _mm512_ipcvtph_epu8(A) \
+ ((__m512i)__builtin_ia32_vcvtph2iubs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_mask_ipcvtph_epu8(W, U, A) \
+ ((__m512i)__builtin_ia32_vcvtph2iubs512_mask((__v32hf)(__m512h)(A), \
+ (__v32hu)(W), (__mmask32)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_maskz_ipcvtph_epu8(U, A) \
+ ((__m512i)__builtin_ia32_vcvtph2iubs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_ipcvt_roundph_epu8(A, R) \
+ ((__m512i)__builtin_ia32_vcvtph2iubs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)-1, \
+ (const int)R))
+
+#define _mm512_mask_ipcvt_roundph_epu8(W, U, A, R) \
+ ((__m512i)__builtin_ia32_vcvtph2iubs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)(W), (__mmask32)(U), (const int)R))
+
+#define _mm512_maskz_ipcvt_roundph_epu8(U, A, R) \
+ ((__m512i)__builtin_ia32_vcvtph2iubs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)(U), \
+ (const int)R))
+
+#define _mm512_ipcvtps_epi8(A) \
+ ((__m512i)__builtin_ia32_vcvtps2ibs512_mask( \
+ (__v16sf)(__m512)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_mask_ipcvtps_epi8(W, U, A) \
+ ((__m512i)__builtin_ia32_vcvtps2ibs512_mask((__v16sf)(__m512)(A), \
+ (__v16su)(W), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_maskz_ipcvtps_epi8(U, A) \
+ ((__m512i)__builtin_ia32_vcvtps2ibs512_mask( \
+ (__v16sf)(__m512)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_ipcvt_roundps_epi8(A, R) \
+ ((__m512i)__builtin_ia32_vcvtps2ibs512_mask((__v16sf)(__m512)(A), \
+ (__v16su)_mm512_setzero_si512(), \
+ (__mmask16)-1, (const int)R))
+
+#define _mm512_mask_ipcvt_roundps_epi8(W, U, A, R) \
+ ((__m512i)__builtin_ia32_vcvtps2ibs512_mask( \
+ (__v16sf)(__m512)(A), (__v16su)(W), (__mmask16)(U), (const int)R))
+
+#define _mm512_maskz_ipcvt_roundps_epi8(U, A, R) \
+ ((__m512i)__builtin_ia32_vcvtps2ibs512_mask((__v16sf)(__m512)(A), \
+ (__v16su)_mm512_setzero_si512(), \
+ (__mmask16)(U), (const int)R))
+
+#define _mm512_ipcvtps_epu8(A) \
+ ((__m512i)__builtin_ia32_vcvtps2iubs512_mask( \
+ (__v16sf)(__m512)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_mask_ipcvtps_epu8(W, U, A) \
+ ((__m512i)__builtin_ia32_vcvtps2iubs512_mask((__v16sf)(__m512)(A), \
+ (__v16su)(W), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_maskz_ipcvtps_epu8(U, A) \
+ ((__m512i)__builtin_ia32_vcvtps2iubs512_mask( \
+ (__v16sf)(__m512)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_ipcvt_roundps_epu8(A, R) \
+ ((__m512i)__builtin_ia32_vcvtps2iubs512_mask( \
+ (__v16sf)(__m512)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)-1, \
+ (const int)R))
+
+#define _mm512_mask_ipcvt_roundps_epu8(W, U, A, R) \
+ ((__m512i)__builtin_ia32_vcvtps2iubs512_mask( \
+ (__v16sf)(__m512)(A), (__v16su)(W), (__mmask16)(U), (const int)R))
+
+#define _mm512_maskz_ipcvt_roundps_epu8(U, A, R) \
+ ((__m512i)__builtin_ia32_vcvtps2iubs512_mask( \
+ (__v16sf)(__m512)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)(U), \
+ (const int)R))
+
+#define _mm512_ipcvttnebf16_epi8(A) \
+ ((__m512i)__builtin_ia32_vcvttnebf162ibs512((__v32bf)(__m512bh)(A)))
+
+#define _mm512_mask_ipcvttnebf16_epi8(W, U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epi8(A), \
+ (__v32hi)(__m512i)(W)))
+
+#define _mm512_maskz_ipcvttnebf16_epi8(U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epi8(A), \
+ (__v32hi)_mm512_setzero_si512()))
+
+#define _mm512_ipcvttnebf16_epu8(A) \
+ ((__m512i)__builtin_ia32_vcvttnebf162iubs512((__v32bf)(__m512bh)(A)))
+
+#define _mm512_mask_ipcvttnebf16_epu8(W, U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epu8(A), \
+ (__v32hi)(__m512i)(W)))
+
+#define _mm512_maskz_ipcvttnebf16_epu8(U, A) \
+ ((__m512i)__builtin_ia32_selectw_512( \
+ (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epu8(A), \
+ (__v32hi)_mm512_setzero_si512()))
+
+#define _mm512_ipcvttph_epi8(A) \
+ ((__m512i)__builtin_ia32_vcvttph2ibs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_mask_ipcvttph_epi8(W, U, A) \
+ ((__m512i)__builtin_ia32_vcvttph2ibs512_mask((__v32hf)(__m512h)(A), \
+ (__v32hu)(W), (__mmask32)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_maskz_ipcvttph_epi8(U, A) \
+ ((__m512i)__builtin_ia32_vcvttph2ibs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_ipcvtt_roundph_epi8(A, S) \
+ ((__m512i)__builtin_ia32_vcvttph2ibs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)-1, \
+ S))
+
+#define _mm512_mask_ipcvtt_roundph_epi8(W, U, A, S) \
+ ((__m512i)__builtin_ia32_vcvttph2ibs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)(W), (__mmask32)(U), S))
+
+#define _mm512_maskz_ipcvtt_roundph_epi8(U, A, S) \
+ ((__m512i)__builtin_ia32_vcvttph2ibs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)(U), \
+ S))
+
+#define _mm512_ipcvttph_epu8(A) \
+ ((__m512i)__builtin_ia32_vcvttph2iubs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_mask_ipcvttph_epu8(W, U, A) \
+ ((__m512i)__builtin_ia32_vcvttph2iubs512_mask((__v32hf)(__m512h)(A), \
+ (__v32hu)(W), (__mmask32)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_maskz_ipcvttph_epu8(U, A) \
+ ((__m512i)__builtin_ia32_vcvttph2iubs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_ipcvtt_roundph_epu8(A, S) \
+ ((__m512i)__builtin_ia32_vcvttph2iubs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)-1, \
+ S))
+
+#define _mm512_mask_ipcvtt_roundph_epu8(W, U, A, S) \
+ ((__m512i)__builtin_ia32_vcvttph2iubs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)(W), (__mmask32)(U), S))
+
+#define _mm512_maskz_ipcvtt_roundph_epu8(U, A, S) \
+ ((__m512i)__builtin_ia32_vcvttph2iubs512_mask( \
+ (__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)(U), \
+ S))
+
+#define _mm512_ipcvttps_epi8(A) \
+ ((__m512i)__builtin_ia32_vcvttps2ibs512_mask( \
+ (__v16sf)(__m512h)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_mask_ipcvttps_epi8(W, U, A) \
+ ((__m512i)__builtin_ia32_vcvttps2ibs512_mask((__v16sf)(__m512h)(A), \
+ (__v16su)(W), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_maskz_ipcvttps_epi8(U, A) \
+ ((__m512i)__builtin_ia32_vcvttps2ibs512_mask( \
+ (__v16sf)(__m512h)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_ipcvtt_roundps_epi8(A, S) \
+ ((__m512i)__builtin_ia32_vcvttps2ibs512_mask( \
+ (__v16sf)(__m512h)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)-1, \
+ S))
+
+#define _mm512_mask_ipcvtt_roundps_epi8(W, U, A, S) \
+ ((__m512i)__builtin_ia32_vcvttps2ibs512_mask( \
+ (__v16sf)(__m512h)(A), (__v16su)(W), (__mmask16)(U), S))
+
+#define _mm512_maskz_ipcvtt_roundps_epi8(U, A, S) \
+ ((__m512i)__builtin_ia32_vcvttps2ibs512_mask( \
+ (__v16sf)(__m512h)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)(U), \
+ S))
+
+#define _mm512_ipcvttps_epu8(A) \
+ ((__m512i)__builtin_ia32_vcvttps2iubs512_mask( \
+ (__v16sf)(__m512h)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_mask_ipcvttps_epu8(W, U, A) \
+ ((__m512i)__builtin_ia32_vcvttps2iubs512_mask((__v16sf)(__m512h)(A), \
+ (__v16su)(W), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_maskz_ipcvttps_epu8(U, A) \
+ ((__m512i)__builtin_ia32_vcvttps2iubs512_mask( \
+ (__v16sf)(__m512h)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm512_ipcvtt_roundps_epu8(A, S) \
+ ((__m512i)__builtin_ia32_vcvttps2iubs512_mask( \
+ (__v16sf)(__m512h)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)-1, \
+ S))
+
+#define _mm512_mask_ipcvtt_roundps_epu8(W, U, A, S) \
+ ((__m512i)__builtin_ia32_vcvttps2iubs512_mask( \
+ (__v16sf)(__m512h)(A), (__v16su)(W), (__mmask16)(U), S))
+
+#define _mm512_maskz_ipcvtt_roundps_epu8(U, A, S) \
+ ((__m512i)__builtin_ia32_vcvttps2iubs512_mask( \
+ (__v16sf)(__m512h)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)(U), \
+ S))
+
+#endif // __AVX10_2_512SATCVTINTRIN_H
diff --git a/clang/lib/Headers/avx10_2satcvtintrin.h b/clang/lib/Headers/avx10_2satcvtintrin.h
new file mode 100644
index 0000000000000..8ffe49d22d2b3
--- /dev/null
+++ b/clang/lib/Headers/avx10_2satcvtintrin.h
@@ -0,0 +1,448 @@
+/*===----------- avx10_2satcvtintrin.h - AVX10_2SATCVT intrinsics ----------===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===-----------------------------------------------------------------------===
+ */
+#ifndef __IMMINTRIN_H
+#error \
+ "Never use <avx10_2satcvtintrin.h> directly; include <immintrin.h> instead."
+#endif // __IMMINTRIN_H
+
+#ifndef __AVX10_2SATCVTINTRIN_H
+#define __AVX10_2SATCVTINTRIN_H
+
+#define _mm_ipcvtnebf16_epi8(A) \
+ ((__m128i)__builtin_ia32_vcvtnebf162ibs128((__v8bf)(__m128bh)(A)))
+
+#define _mm_mask_ipcvtnebf16_epi8(W, U, A) \
+ ((__m128i)__builtin_ia32_selectw_128( \
+ (__mmask8)(U), (__v8hi)_mm_ipcvtnebf16_epi8(A), \
+ (__v8hi)(__m128i)(W)))
+
+#define _mm_maskz_ipcvtnebf16_epi8(U, A) \
+ ((__m128i)__builtin_ia32_selectw_128( \
+ (__mmask8)(U), (__v8hi)_mm_ipcvtnebf16_epi8(A), \
+ (__v8hi)_mm_setzero_si128()))
+
+#define _mm256_ipcvtnebf16_epi8(A) \
+ ((__m256i)__builtin_ia32_vcvtnebf162ibs256((__v16bf)(__m256bh)(A)))
+
+#define _mm256_mask_ipcvtnebf16_epi8(W, U, A) \
+ ((__m256i)__builtin_ia32_selectw_256( \
+ (__mmask16)(U), (__v16hi)_mm256_ipcvtnebf16_epi8(A), \
+ (__v16hi)(__m256i)(W)))
+
+#define _mm256_maskz_ipcvtnebf16_epi8(U, A) \
+ ((__m256i)__builtin_ia32_selectw_256( \
+ (__mmask16)(U), (__v16hi)_mm256_ipcvtnebf16_epi8(A), \
+ (__v16hi)_mm256_setzero_si256()))
+
+#define _mm_ipcvtnebf16_epu8(A) \
+ ((__m128i)__builtin_ia32_vcvtnebf162iubs128((__v8bf)(__m128bh)(A)))
+
+#define _mm_mask_ipcvtnebf16_epu8(W, U, A) \
+ ((__m128i)__builtin_ia32_selectw_128( \
+ (__mmask8)(U), (__v8hi)_mm_ipcvtnebf16_epu8(A), \
+ (__v8hi)(__m128i)(W)))
+
+#define _mm_maskz_ipcvtnebf16_epu8(U, A) \
+ ((__m128i)__builtin_ia32_selectw_128( \
+ (__mmask8)(U), (__v8hi)_mm_ipcvtnebf16_epu8(A), \
+ (__v8hi)_mm_setzero_si128()))
+
+#define _mm256_ipcvtnebf16_epu8(A) \
+ ((__m256i)__builtin_ia32_vcvtnebf162iubs256((__v16bf)(__m256bh)(A)))
+
+#define _mm256_mask_ipcvtnebf16_epu8(W, U, A) \
+ ((__m256i)__builtin_ia32_selectw_256( \
+ (__mmask16)(U), (__v16hi)_mm256_ipcvtnebf16_epu8(A), \
+ (__v16hi)(__m256i)(W)))
+
+#define _mm256_maskz_ipcvtnebf16_epu8(U, A) \
+ ((__m256i)__builtin_ia32_selectw_256( \
+ (__mmask16)(U), (__v16hi)_mm256_ipcvtnebf16_epu8(A), \
+ (__v16hi)_mm256_setzero_si256()))
+
+#define _mm_ipcvtph_epi8(A) \
+ ((__m128i)__builtin_ia32_vcvtph2ibs128_mask( \
+ (__v8hf)(__m128h)(A), (__v8hu)_mm_setzero_si128(), (__mmask8)-1))
+
+#define _mm_mask_ipcvtph_epi8(W, U, A) \
+ ((__m128i)__builtin_ia32_vcvtph2ibs128_mask((__v8hf)(__m128h)(A), \
+ (__v8hu)(W), (__mmask8)(U)))
+
+#define _mm_maskz_ipcvtph_epi8(U, A) \
+ ((__m128i)__builtin_ia32_vcvtph2ibs128_mask( \
+ (__v8hf)(__m128h)(A), (__v8hu)(_mm_setzero_si128()), (__mmask8)(U)))
+
+#define _mm256_ipcvtph_epi8(A) \
+ ((__m256i)__builtin_ia32_vcvtph2ibs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_mask_ipcvtph_epi8(W, U, A) \
+ ((__m256i)__builtin_ia32_vcvtph2ibs256_mask((__v16hf)(__m256h)(A), \
+ (__v16hu)(W), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_maskz_ipcvtph_epi8(U, A) \
+ ((__m256i)__builtin_ia32_vcvtph2ibs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)(_mm256_setzero_si256()), \
+ (__mmask16)(U), _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_ipcvt_roundph_epi8(A, R) \
+ ((__m256i)__builtin_ia32_vcvtph2ibs256_mask((__v16hf)(__m256h)(A), \
+ (__v16hu)_mm256_setzero_si256(), \
+ (__mmask16)-1, (const int)R))
+
+#define _mm256_mask_ipcvt_roundph_epi8(W, U, A, R) \
+ ((__m256i)__builtin_ia32_vcvtph2ibs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)(W), (__mmask16)(U), (const int)R))
+
+#define _mm256_maskz_ipcvt_roundph_epi8(U, A, R) \
+ ((__m256i)__builtin_ia32_vcvtph2ibs256_mask((__v16hf)(__m256h)(A), \
+ (__v16hu)_mm256_setzero_si256(), \
+ (__mmask16)(U), (const int)R))
+
+#define _mm_ipcvtph_epu8(A) \
+ ((__m128i)__builtin_ia32_vcvtph2iubs128_mask( \
+ (__v8hf)(__m128h)(A), (__v8hu)_mm_setzero_si128(), (__mmask8)-1))
+
+#define _mm_mask_ipcvtph_epu8(W, U, A) \
+ ((__m128i)__builtin_ia32_vcvtph2iubs128_mask((__v8hf)(__m128h)(A), \
+ (__v8hu)(W), (__mmask8)(U)))
+
+#define _mm_maskz_ipcvtph_epu8(U, A) \
+ ((__m128i)__builtin_ia32_vcvtph2iubs128_mask( \
+ (__v8hf)(__m128h)(A), (__v8hu)(_mm_setzero_si128()), (__mmask8)(U)))
+
+#define _mm256_ipcvtph_epu8(A) \
+ ((__m256i)__builtin_ia32_vcvtph2iubs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_mask_ipcvtph_epu8(W, U, A) \
+ ((__m256i)__builtin_ia32_vcvtph2iubs256_mask((__v16hf)(__m256h)(A), \
+ (__v16hu)(W), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_maskz_ipcvtph_epu8(U, A) \
+ ((__m256i)__builtin_ia32_vcvtph2iubs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)(_mm256_setzero_si256()), \
+ (__mmask16)(U), _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_ipcvt_roundph_epu8(A, R) \
+ ((__m256i)__builtin_ia32_vcvtph2iubs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
+ (const int)R))
+
+#define _mm256_mask_ipcvt_roundph_epu8(W, U, A, R) \
+ ((__m256i)__builtin_ia32_vcvtph2iubs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)(W), (__mmask16)(U), (const int)R))
+
+#define _mm256_maskz_ipcvt_roundph_epu8(U, A, R) \
+ ((__m256i)__builtin_ia32_vcvtph2iubs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)(U), \
+ (const int)R))
+
+#define _mm_ipcvtps_epi8(A) \
+ ((__m128i)__builtin_ia32_vcvtps2ibs128_mask( \
+ (__v4sf)(__m128)(A), (__v4su)_mm_setzero_si128(), (__mmask8)-1))
+
+#define _mm_mask_ipcvtps_epi8(W, U, A) \
+ ((__m128i)__builtin_ia32_vcvtps2ibs128_mask((__v4sf)(__m128)(A), \
+ (__v4su)(W), (__mmask8)(U)))
+
+#define _mm_maskz_ipcvtps_epi8(U, A) \
+ ((__m128i)__builtin_ia32_vcvtps2ibs128_mask( \
+ (__v4sf)(__m128)(A), (__v4su)(_mm_setzero_si128()), (__mmask8)(U)))
+
+#define _mm256_ipcvtps_epi8(A) \
+ ((__m256i)__builtin_ia32_vcvtps2ibs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_mask_ipcvtps_epi8(W, U, A) \
+ ((__m256i)__builtin_ia32_vcvtps2ibs256_mask((__v8sf)(__m256)(A), \
+ (__v8su)(W), (__mmask8)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_maskz_ipcvtps_epi8(U, A) \
+ ((__m256i)__builtin_ia32_vcvtps2ibs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)(_mm256_setzero_si256()), (__mmask8)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_ipcvt_roundps_epi8(A, R) \
+ ((__m256i)__builtin_ia32_vcvtps2ibs256_mask((__v8sf)(__m256)(A), \
+ (__v8su)_mm256_setzero_si256(), \
+ (__mmask8)-1, (const int)R))
+
+#define _mm256_mask_ipcvt_roundps_epi8(W, U, A, R) \
+ ((__m256i)__builtin_ia32_vcvtps2ibs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)(W), (__mmask8)(U), (const int)R))
+
+#define _mm256_maskz_ipcvt_roundps_epi8(U, A, R) \
+ ((__m256i)__builtin_ia32_vcvtps2ibs256_mask((__v8sf)(__m256)(A), \
+ (__v8su)_mm256_setzero_si256(), \
+ (__mmask8)(U), (const int)R))
+
+#define _mm_ipcvtps_epu8(A) \
+ ((__m128i)__builtin_ia32_vcvtps2iubs128_mask( \
+ (__v4sf)(__m128)(A), (__v4su)_mm_setzero_si128(), (__mmask8)-1))
+
+#define _mm_mask_ipcvtps_epu8(W, U, A) \
+ ((__m128i)__builtin_ia32_vcvtps2iubs128_mask((__v4sf)(__m128)(A), \
+ (__v4su)(W), (__mmask8)(U)))
+
+#define _mm_maskz_ipcvtps_epu8(U, A) \
+ ((__m128i)__builtin_ia32_vcvtps2iubs128_mask( \
+ (__v4sf)(__m128)(A), (__v4su)(_mm_setzero_si128()), (__mmask8)(U)))
+
+#define _mm256_ipcvtps_epu8(A) \
+ ((__m256i)__builtin_ia32_vcvtps2iubs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_mask_ipcvtps_epu8(W, U, A) \
+ ((__m256i)__builtin_ia32_vcvtps2iubs256_mask((__v8sf)(__m256)(A), \
+ (__v8su)(W), (__mmask8)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_maskz_ipcvtps_epu8(U, A) \
+ ((__m256i)__builtin_ia32_vcvtps2iubs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)(_mm256_setzero_si256()), (__mmask8)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_ipcvt_roundps_epu8(A, R) \
+ ((__m256i)__builtin_ia32_vcvtps2iubs256_mask((__v8sf)(__m256)(A), \
+ (__v8su)_mm256_setzero_si256(), \
+ (__mmask8)-1, (const int)R))
+
+#define _mm256_mask_ipcvt_roundps_epu8(W, U, A, R) \
+ ((__m256i)__builtin_ia32_vcvtps2iubs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)(W), (__mmask8)(U), (const int)R))
+
+#define _mm256_maskz_ipcvt_roundps_epu8(U, A, R) \
+ ((__m256i)__builtin_ia32_vcvtps2iubs256_mask((__v8sf)(__m256)(A), \
+ (__v8su)_mm256_setzero_si256(), \
+ (__mmask8)(U), (const int)R))
+
+#define _mm_ipcvttnebf16_epi8(A) \
+ ((__m128i)__builtin_ia32_vcvttnebf162ibs128((__v8bf)(__m128bh)(A)))
+
+#define _mm_mask_ipcvttnebf16_epi8(W, U, A) \
+ ((__m128i)__builtin_ia32_selectw_128( \
+ (__mmask8)(U), (__v8hi)_mm_ipcvttnebf16_epi8(A), \
+ (__v8hi)(__m128i)(W)))
+
+#define _mm_maskz_ipcvttnebf16_epi8(U, A) \
+ ((__m128i)__builtin_ia32_selectw_128( \
+ (__mmask8)(U), (__v8hi)_mm_ipcvttnebf16_epi8(A), \
+ (__v8hi)_mm_setzero_si128()))
+
+#define _mm256_ipcvttnebf16_epi8(A) \
+ ((__m256i)__builtin_ia32_vcvttnebf162ibs256((__v16bf)(__m256bh)(A)))
+
+#define _mm256_mask_ipcvttnebf16_epi8(W, U, A) \
+ ((__m256i)__builtin_ia32_selectw_256( \
+ (__mmask16)(U), (__v16hi)_mm256_ipcvttnebf16_epi8(A), \
+ (__v16hi)(__m256i)(W)))
+
+#define _mm256_maskz_ipcvttnebf16_epi8(U, A) \
+ ((__m256i)__builtin_ia32_selectw_256( \
+ (__mmask16)(U), (__v16hi)_mm256_ipcvttnebf16_epi8(A), \
+ (__v16hi)_mm256_setzero_si256()))
+
+#define _mm_ipcvttnebf16_epu8(A) \
+ ((__m128i)__builtin_ia32_vcvttnebf162iubs128((__v8bf)(__m128bh)(A)))
+
+#define _mm_mask_ipcvttnebf16_epu8(W, U, A) \
+ ((__m128i)__builtin_ia32_selectw_128( \
+ (__mmask8)(U), (__v8hi)_mm_ipcvttnebf16_epu8(A), \
+ (__v8hi)(__m128i)(W)))
+
+#define _mm_maskz_ipcvttnebf16_epu8(U, A) \
+ ((__m128i)__builtin_ia32_selectw_128( \
+ (__mmask8)(U), (__v8hi)_mm_ipcvttnebf16_epu8(A), \
+ (__v8hi)_mm_setzero_si128()))
+
+#define _mm256_ipcvttnebf16_epu8(A) \
+ ((__m256i)__builtin_ia32_vcvttnebf162iubs256((__v16bf)(__m256bh)(A)))
+
+#define _mm256_mask_ipcvttnebf16_epu8(W, U, A) \
+ ((__m256i)__builtin_ia32_selectw_256( \
+ (__mmask16)(U), (__v16hi)_mm256_ipcvttnebf16_epu8(A), \
+ (__v16hi)(__m256i)(W)))
+
+#define _mm256_maskz_ipcvttnebf16_epu8(U, A) \
+ ((__m256i)__builtin_ia32_selectw_256( \
+ (__mmask16)(U), (__v16hi)_mm256_ipcvttnebf16_epu8(A), \
+ (__v16hi)_mm256_setzero_si256()))
+
+#define _mm_ipcvttph_epi8(A) \
+ ((__m128i)__builtin_ia32_vcvttph2ibs128_mask( \
+ (__v8hf)(__m128h)(A), (__v8hu)_mm_setzero_si128(), (__mmask8)-1))
+
+#define _mm_mask_ipcvttph_epi8(W, U, A) \
+ ((__m128i)__builtin_ia32_vcvttph2ibs128_mask((__v8hf)(__m128h)(A), \
+ (__v8hu)(W), (__mmask8)(U)))
+
+#define _mm_maskz_ipcvttph_epi8(U, A) \
+ ((__m128i)__builtin_ia32_vcvttph2ibs128_mask( \
+ (__v8hf)(__m128h)(A), (__v8hu)(_mm_setzero_si128()), (__mmask8)(U)))
+
+#define _mm256_ipcvttph_epi8(A) \
+ ((__m256i)__builtin_ia32_vcvttph2ibs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_mask_ipcvttph_epi8(W, U, A) \
+ ((__m256i)__builtin_ia32_vcvttph2ibs256_mask((__v16hf)(__m256h)(A), \
+ (__v16hu)(W), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_maskz_ipcvttph_epi8(U, A) \
+ ((__m256i)__builtin_ia32_vcvttph2ibs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)(_mm256_setzero_si256()), \
+ (__mmask16)(U), _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_ipcvtt_roundph_epi8(A, R) \
+ ((__m256i)__builtin_ia32_vcvttph2ibs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
+ (const int)R))
+
+#define _mm256_mask_ipcvtt_roundph_epi8(W, U, A, R) \
+ ((__m256i)__builtin_ia32_vcvttph2ibs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)(W), (__mmask16)(U), (const int)R))
+
+#define _mm256_maskz_ipcvtt_roundph_epi8(U, A, R) \
+ ((__m256i)__builtin_ia32_vcvttph2ibs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)(U), \
+ (const int)R))
+
+#define _mm_ipcvttph_epu8(A) \
+ ((__m128i)__builtin_ia32_vcvttph2iubs128_mask( \
+ (__v8hf)(__m128h)(A), (__v8hu)_mm_setzero_si128(), (__mmask8)-1))
+
+#define _mm_mask_ipcvttph_epu8(W, U, A) \
+ ((__m128i)__builtin_ia32_vcvttph2iubs128_mask((__v8hf)(__m128h)(A), \
+ (__v8hu)(W), (__mmask8)(U)))
+
+#define _mm_maskz_ipcvttph_epu8(U, A) \
+ ((__m128i)__builtin_ia32_vcvttph2iubs128_mask( \
+ (__v8hf)(__m128h)(A), (__v8hu)(_mm_setzero_si128()), (__mmask8)(U)))
+
+#define _mm256_ipcvttph_epu8(A) \
+ ((__m256i)__builtin_ia32_vcvttph2iubs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_mask_ipcvttph_epu8(W, U, A) \
+ ((__m256i)__builtin_ia32_vcvttph2iubs256_mask((__v16hf)(__m256h)(A), \
+ (__v16hu)(W), (__mmask16)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_maskz_ipcvttph_epu8(U, A) \
+ ((__m256i)__builtin_ia32_vcvttph2iubs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)(_mm256_setzero_si256()), \
+ (__mmask16)(U), _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_ipcvtt_roundph_epu8(A, R) \
+ ((__m256i)__builtin_ia32_vcvttph2iubs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
+ (const int)R))
+
+#define _mm256_mask_ipcvtt_roundph_epu8(W, U, A, R) \
+ ((__m256i)__builtin_ia32_vcvttph2iubs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)(W), (__mmask16)(U), (const int)R))
+
+#define _mm256_maskz_ipcvtt_roundph_epu8(U, A, R) \
+ ((__m256i)__builtin_ia32_vcvttph2iubs256_mask( \
+ (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)(U), \
+ (const int)R))
+
+#define _mm_ipcvttps_epi8(A) \
+ ((__m128i)__builtin_ia32_vcvttps2ibs128_mask( \
+ (__v4sf)(__m128)(A), (__v4su)_mm_setzero_si128(), (__mmask8)-1))
+
+#define _mm_mask_ipcvttps_epi8(W, U, A) \
+ ((__m128i)__builtin_ia32_vcvttps2ibs128_mask((__v4sf)(__m128)(A), \
+ (__v4su)(W), (__mmask8)(U)))
+
+#define _mm_maskz_ipcvttps_epi8(U, A) \
+ ((__m128i)__builtin_ia32_vcvttps2ibs128_mask( \
+ (__v4sf)(__m128)(A), (__v4su)(_mm_setzero_si128()), (__mmask8)(U)))
+
+#define _mm256_ipcvttps_epi8(A) \
+ ((__m256i)__builtin_ia32_vcvttps2ibs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_mask_ipcvttps_epi8(W, U, A) \
+ ((__m256i)__builtin_ia32_vcvttps2ibs256_mask((__v8sf)(__m256)(A), \
+ (__v8su)(W), (__mmask8)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_maskz_ipcvttps_epi8(U, A) \
+ ((__m256i)__builtin_ia32_vcvttps2ibs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)(_mm256_setzero_si256()), (__mmask8)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_ipcvtt_roundps_epi8(A, R) \
+ ((__m256i)__builtin_ia32_vcvttps2ibs256_mask((__v8sf)(__m256)(A), \
+ (__v8su)_mm256_setzero_si256(), \
+ (__mmask8)-1, (const int)R))
+
+#define _mm256_mask_ipcvtt_roundps_epi8(W, U, A, R) \
+ ((__m256i)__builtin_ia32_vcvttps2ibs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)(W), (__mmask8)(U), (const int)R))
+
+#define _mm256_maskz_ipcvtt_roundps_epi8(U, A, R) \
+ ((__m256i)__builtin_ia32_vcvttps2ibs256_mask((__v8sf)(__m256)(A), \
+ (__v8su)_mm256_setzero_si256(), \
+ (__mmask8)(U), (const int)R))
+
+#define _mm_ipcvttps_epu8(A) \
+ ((__m128i)__builtin_ia32_vcvttps2iubs128_mask( \
+ (__v4sf)(__m128)(A), (__v4su)_mm_setzero_si128(), (__mmask8)-1))
+
+#define _mm_mask_ipcvttps_epu8(W, U, A) \
+ ((__m128i)__builtin_ia32_vcvttps2iubs128_mask((__v4sf)(__m128)(A), \
+ (__v4su)(W), (__mmask8)(U)))
+
+#define _mm_maskz_ipcvttps_epu8(U, A) \
+ ((__m128i)__builtin_ia32_vcvttps2iubs128_mask( \
+ (__v4sf)(__m128)(A), (__v4su)(_mm_setzero_si128()), (__mmask8)(U)))
+
+#define _mm256_ipcvttps_epu8(A) \
+ ((__m256i)__builtin_ia32_vcvttps2iubs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)-1, \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_mask_ipcvttps_epu8(W, U, A) \
+ ((__m256i)__builtin_ia32_vcvttps2iubs256_mask((__v8sf)(__m256)(A), \
+ (__v8su)(W), (__mmask8)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_maskz_ipcvttps_epu8(U, A) \
+ ((__m256i)__builtin_ia32_vcvttps2iubs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)(_mm256_setzero_si256()), (__mmask8)(U), \
+ _MM_FROUND_CUR_DIRECTION))
+
+#define _mm256_ipcvtt_roundps_epu8(A, R) \
+ ((__m256i)__builtin_ia32_vcvttps2iubs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)-1, \
+ (const int)R))
+
+#define _mm256_mask_ipcvtt_roundps_epu8(W, U, A, R) \
+ ((__m256i)__builtin_ia32_vcvttps2iubs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)(W), (__mmask8)(U), (const int)R))
+
+#define _mm256_maskz_ipcvtt_roundps_epu8(U, A, R) \
+ ((__m256i)__builtin_ia32_vcvttps2iubs256_mask( \
+ (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)(U), \
+ (const int)R))
+#endif // __AVX10_2SATCVTINTRIN_H
diff --git a/clang/lib/Headers/immintrin.h b/clang/lib/Headers/immintrin.h
index 6d46bdee20a0d..f570c5752db4b 100644
--- a/clang/lib/Headers/immintrin.h
+++ b/clang/lib/Headers/immintrin.h
@@ -651,11 +651,13 @@ _storebe_i64(void * __P, long long __D) {
#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX10_2__)
#include <avx10_2minmaxintrin.h>
#include <avx10_2niintrin.h>
+#include <avx10_2satcvtintrin.h>
#endif
#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX10_2_512__)
#include <avx10_2_512minmaxintrin.h>
#include <avx10_2_512niintrin.h>
+#include <avx10_2_512satcvtintrin.h>
#endif
#if !defined(__SCE__) || __has_feature(modules) || defined(__ENQCMD__)
diff --git a/clang/lib/Sema/SemaX86.cpp b/clang/lib/Sema/SemaX86.cpp
index f36b5ea1b01d7..a0756f167deae 100644
--- a/clang/lib/Sema/SemaX86.cpp
+++ b/clang/lib/Sema/SemaX86.cpp
@@ -88,6 +88,14 @@ bool SemaX86::CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) {
case X86::BI__builtin_ia32_vgetexppd256_round_mask:
case X86::BI__builtin_ia32_vgetexpps256_round_mask:
case X86::BI__builtin_ia32_vgetexpph256_round_mask:
+ case X86::BI__builtin_ia32_vcvttph2ibs256_mask:
+ case X86::BI__builtin_ia32_vcvttph2iubs256_mask:
+ case X86::BI__builtin_ia32_vcvttps2ibs256_mask:
+ case X86::BI__builtin_ia32_vcvttps2iubs256_mask:
+ case X86::BI__builtin_ia32_vcvttph2ibs512_mask:
+ case X86::BI__builtin_ia32_vcvttph2iubs512_mask:
+ case X86::BI__builtin_ia32_vcvttps2ibs512_mask:
+ case X86::BI__builtin_ia32_vcvttps2iubs512_mask:
ArgNum = 3;
break;
case X86::BI__builtin_ia32_cmppd512_mask:
@@ -302,6 +310,14 @@ bool SemaX86::CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) {
case X86::BI__builtin_ia32_vcvtph2uqq256_round_mask:
case X86::BI__builtin_ia32_vcvtqq2ph256_round_mask:
case X86::BI__builtin_ia32_vcvtuqq2ph256_round_mask:
+ case X86::BI__builtin_ia32_vcvtph2ibs256_mask:
+ case X86::BI__builtin_ia32_vcvtph2iubs256_mask:
+ case X86::BI__builtin_ia32_vcvtps2ibs256_mask:
+ case X86::BI__builtin_ia32_vcvtps2iubs256_mask:
+ case X86::BI__builtin_ia32_vcvtph2ibs512_mask:
+ case X86::BI__builtin_ia32_vcvtph2iubs512_mask:
+ case X86::BI__builtin_ia32_vcvtps2ibs512_mask:
+ case X86::BI__builtin_ia32_vcvtps2iubs512_mask:
ArgNum = 3;
HasRC = true;
break;
diff --git a/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins-error.c b/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins-error.c
new file mode 100755
index 0000000000000..4aa256b9ad7ca
--- /dev/null
+++ b/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins-error.c
@@ -0,0 +1,198 @@
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=x86_64 -target-feature +avx10.2-512 \
+// RUN: -emit-llvm -Wall -Werror -verify
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=i386 -target-feature +avx10.2-512 \
+// RUN: -emit-llvm -Wall -Werror -verify
+
+#include <immintrin.h>
+
+__m512i test_mm512_ipcvt_roundph_epi8(__m512h __A) {
+ return _mm512_ipcvt_roundph_epi8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_mask_ipcvt_roundph_epi8(__m512i __S, __mmask32 __A, __m512h __B) {
+ return _mm512_mask_ipcvt_roundph_epi8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_maskz_ipcvt_roundph_epi8(__mmask32 __A, __m512h __B) {
+ return _mm512_maskz_ipcvt_roundph_epi8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_ipcvt_roundph_epu8(__m512h __A) {
+ return _mm512_ipcvt_roundph_epu8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_mask_ipcvt_roundph_epu8(__m512i __S, __mmask32 __A, __m512h __B) {
+ return _mm512_mask_ipcvt_roundph_epu8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_maskz_ipcvt_roundph_epu8(__mmask32 __A, __m512h __B) {
+ return _mm512_maskz_ipcvt_roundph_epu8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_ipcvt_roundps_epi8(__m512 __A) {
+ return _mm512_ipcvt_roundps_epi8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_mask_ipcvt_roundps_epi8(__m512i __S, __mmask16 __A, __m512 __B) {
+ return _mm512_mask_ipcvt_roundps_epi8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_maskz_ipcvt_roundps_epi8(__mmask16 __A, __m512 __B) {
+ return _mm512_maskz_ipcvt_roundps_epi8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_ipcvt_roundps_epu8(__m512 __A) {
+ return _mm512_ipcvt_roundps_epu8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_mask_ipcvt_roundps_epu8(__m512i __S, __mmask16 __A, __m512 __B) {
+ return _mm512_mask_ipcvt_roundps_epu8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_maskz_ipcvt_roundps_epu8(__mmask16 __A, __m512 __B) {
+ return _mm512_maskz_ipcvt_roundps_epu8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_ipcvtt_roundph_epi8(__m512h __A) {
+ return _mm512_ipcvtt_roundph_epi8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_mask_ipcvtt_roundph_epi8(__m512i __S, __mmask32 __A, __m512h __B) {
+ return _mm512_mask_ipcvtt_roundph_epi8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_maskz_ipcvtt_roundph_epi8(__mmask32 __A, __m512h __B) {
+ return _mm512_maskz_ipcvtt_roundph_epi8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_ipcvtt_roundph_epu8(__m512h __A) {
+ return _mm512_ipcvtt_roundph_epu8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_mask_ipcvtt_roundph_epu8(__m512i __S, __mmask32 __A, __m512h __B) {
+ return _mm512_mask_ipcvtt_roundph_epu8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_maskz_ipcvtt_roundph_epu8(__mmask32 __A, __m512h __B) {
+ return _mm512_maskz_ipcvtt_roundph_epu8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_ipcvtt_roundps_epi8(__m512 __A) {
+ return _mm512_ipcvtt_roundps_epi8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_mask_ipcvtt_roundps_epi8(__m512i __S, __mmask16 __A, __m512 __B) {
+ return _mm512_mask_ipcvtt_roundps_epi8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_maskz_ipcvtt_roundps_epi8(__mmask16 __A, __m512 __B) {
+ return _mm512_maskz_ipcvtt_roundps_epi8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_ipcvtt_roundps_epu8(__m512 __A) {
+ return _mm512_ipcvtt_roundps_epu8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_mask_ipcvtt_roundps_epu8(__m512i __S, __mmask16 __A, __m512 __B) {
+ return _mm512_mask_ipcvtt_roundps_epu8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m512i test_mm512_maskz_ipcvtt_roundps_epu8(__mmask16 __A, __m512 __B) {
+ return _mm512_maskz_ipcvtt_roundps_epu8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_ipcvt_roundph_epi8(__m256h __A) {
+ return _mm256_ipcvt_roundph_epi8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_mask_ipcvt_roundph_epi8(__m256i __S, __mmask16 __A, __m256h __B) {
+ return _mm256_mask_ipcvt_roundph_epi8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_maskz_ipcvt_roundph_epi8(__mmask16 __A, __m256h __B) {
+ return _mm256_maskz_ipcvt_roundph_epi8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_ipcvt_roundph_epu8(__m256h __A) {
+ return _mm256_ipcvt_roundph_epu8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_mask_ipcvt_roundph_epu8(__m256i __S, __mmask16 __A, __m256h __B) {
+ return _mm256_mask_ipcvt_roundph_epu8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_maskz_ipcvt_roundph_epu8(__mmask16 __A, __m256h __B) {
+ return _mm256_maskz_ipcvt_roundph_epu8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_ipcvt_roundps_epi8(__m256 __A) {
+ return _mm256_ipcvt_roundps_epi8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_mask_ipcvt_roundps_epi8(__m256i __S, __mmask8 __A, __m256 __B) {
+ return _mm256_mask_ipcvt_roundps_epi8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_maskz_ipcvt_roundps_epi8(__mmask8 __A, __m256 __B) {
+ return _mm256_maskz_ipcvt_roundps_epi8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_ipcvt_roundps_epu8(__m256 __A) {
+ return _mm256_ipcvt_roundps_epu8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_mask_ipcvt_roundps_epu8(__m256i __S, __mmask8 __A, __m256 __B) {
+ return _mm256_mask_ipcvt_roundps_epu8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_maskz_ipcvt_roundps_epu8(__mmask8 __A, __m256 __B) {
+ return _mm256_maskz_ipcvt_roundps_epu8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_ipcvtt_roundph_epi8(__m256h __A) {
+ return _mm256_ipcvtt_roundph_epi8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_mask_ipcvtt_roundph_epi8(__m256i __S, __mmask16 __A, __m256h __B) {
+ return _mm256_mask_ipcvtt_roundph_epi8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_maskz_ipcvtt_roundph_epi8(__mmask16 __A, __m256h __B) {
+ return _mm256_maskz_ipcvtt_roundph_epi8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_ipcvtt_roundph_epu8(__m256h __A) {
+ return _mm256_ipcvtt_roundph_epu8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_mask_ipcvtt_roundph_epu8(__m256i __S, __mmask16 __A, __m256h __B) {
+ return _mm256_mask_ipcvtt_roundph_epu8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_maskz_ipcvtt_roundph_epu8(__mmask16 __A, __m256h __B) {
+ return _mm256_maskz_ipcvtt_roundph_epu8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_ipcvtt_roundps_epi8(__m256 __A) {
+ return _mm256_ipcvtt_roundps_epi8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_mask_ipcvtt_roundps_epi8(__m256i __S, __mmask8 __A, __m256 __B) {
+ return _mm256_mask_ipcvtt_roundps_epi8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_maskz_ipcvtt_roundps_epi8(__mmask8 __A, __m256 __B) {
+ return _mm256_maskz_ipcvtt_roundps_epi8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_ipcvtt_roundps_epu8(__m256 __A) {
+ return _mm256_ipcvtt_roundps_epu8(__A, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_mask_ipcvtt_roundps_epu8(__m256i __S, __mmask8 __A, __m256 __B) {
+ return _mm256_mask_ipcvtt_roundps_epu8(__S, __A, __B, 22); // expected-error {{invalid rounding argument}}
+}
+
+__m256i test_mm256_maskz_ipcvtt_roundps_epu8(__mmask8 __A, __m256 __B) {
+ return _mm256_maskz_ipcvtt_roundps_epu8(__A, __B, 22); // expected-error {{invalid rounding argument}}
+}
diff --git a/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c b/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
new file mode 100755
index 0000000000000..bf6acaafcbcb9
--- /dev/null
+++ b/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
@@ -0,0 +1,379 @@
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=x86_64 -target-feature +avx10.2-512 \
+// RUN: -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=i386 -target-feature +avx10.2-512 \
+// RUN: -emit-llvm -o - -Wall -Werror | FileCheck %s
+
+#include <immintrin.h>
+
+__m512i test_mm512_ipcvtnebf16_epi8(__m512bh __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162ibs512
+ return _mm512_ipcvtnebf16_epi8(__A);
+}
+
+__m512i test_mm512_mask_ipcvtnebf16_epi8(__m512i __S, __mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162ibs512
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
+ return _mm512_mask_ipcvtnebf16_epi8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvtnebf16_epi8(__mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtnebf16_epi8
+ // CHECK: @llvm.x86.avx10.vcvtnebf162ibs512
+ // CHECK: zeroinitializer
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
+ return _mm512_maskz_ipcvtnebf16_epi8(__A, __B);
+}
+
+__m512i test_mm512_ipcvtnebf16_epu8(__m512bh __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162iubs512
+ return _mm512_ipcvtnebf16_epu8(__A);
+}
+
+__m512i test_mm512_mask_ipcvtnebf16_epu8(__m512i __S, __mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162iubs512
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
+ return _mm512_mask_ipcvtnebf16_epu8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvtnebf16_epu8(__mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtnebf16_epu8
+ // CHECK: @llvm.x86.avx10.vcvtnebf162iubs512
+ // CHECK: zeroinitializer
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
+ return _mm512_maskz_ipcvtnebf16_epu8(__A, __B);
+}
+
+__m512i test_mm512_ipcvtph_epi8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs512
+ return _mm512_ipcvtph_epi8(__A);
+}
+
+__m512i test_mm512_mask_ipcvtph_epi8(__m512i __S, __mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs512
+ return _mm512_mask_ipcvtph_epi8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvtph_epi8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs512
+ return _mm512_maskz_ipcvtph_epi8(__A, __B);
+}
+
+__m512i test_mm512_ipcvt_roundph_epi8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_ipcvt_roundph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs512
+ return _mm512_ipcvt_roundph_epi8(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_mask_ipcvt_roundph_epi8(__m512i __S, __mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvt_roundph_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs512
+ return _mm512_mask_ipcvt_roundph_epi8(__S, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_maskz_ipcvt_roundph_epi8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvt_roundph_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs512
+ return _mm512_maskz_ipcvt_roundph_epi8(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_ipcvtph_epu8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs512
+ return _mm512_ipcvtph_epu8(__A);
+}
+
+__m512i test_mm512_mask_ipcvtph_epu8(__m512i __S, __mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs512
+ return _mm512_mask_ipcvtph_epu8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvtph_epu8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs512
+ return _mm512_maskz_ipcvtph_epu8(__A, __B);
+}
+
+__m512i test_mm512_ipcvt_roundph_epu8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_ipcvt_roundph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs512
+ return _mm512_ipcvt_roundph_epu8(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_mask_ipcvt_roundph_epu8(__m512i __S, __mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvt_roundph_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs512
+ return _mm512_mask_ipcvt_roundph_epu8(__S, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_maskz_ipcvt_roundph_epu8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvt_roundph_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs512
+ return _mm512_maskz_ipcvt_roundph_epu8(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_ipcvtps_epi8(__m512 __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs512
+ return _mm512_ipcvtps_epi8(__A);
+}
+
+__m512i test_mm512_mask_ipcvtps_epi8(__m512i __S, __mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs512
+ return _mm512_mask_ipcvtps_epi8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvtps_epi8(__mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs512
+ return _mm512_maskz_ipcvtps_epi8(__A, __B);
+}
+
+__m512i test_mm512_ipcvt_roundps_epi8(__m512 __A) {
+ // CHECK-LABEL: @test_mm512_ipcvt_roundps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs512
+ return _mm512_ipcvt_roundps_epi8(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_mask_ipcvt_roundps_epi8(__m512i __S, __mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvt_roundps_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs512
+ return _mm512_mask_ipcvt_roundps_epi8(__S, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_maskz_ipcvt_roundps_epi8(__mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvt_roundps_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs512
+ return _mm512_maskz_ipcvt_roundps_epi8(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_ipcvtps_epu8(__m512 __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs512
+ return _mm512_ipcvtps_epu8(__A);
+}
+
+__m512i test_mm512_mask_ipcvtps_epu8(__m512i __S, __mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs512
+ return _mm512_mask_ipcvtps_epu8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvtps_epu8(__mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs512
+ return _mm512_maskz_ipcvtps_epu8(__A, __B);
+}
+
+__m512i test_mm512_ipcvt_roundps_epu8(__m512 __A) {
+ // CHECK-LABEL: @test_mm512_ipcvt_roundps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs512
+ return _mm512_ipcvt_roundps_epu8(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_mask_ipcvt_roundps_epu8(__m512i __S, __mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvt_roundps_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs512
+ return _mm512_mask_ipcvt_roundps_epu8(__S, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_maskz_ipcvt_roundps_epu8(__mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvt_roundps_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs512
+ return _mm512_maskz_ipcvt_roundps_epu8(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_ipcvttnebf16_epi8(__m512bh __A) {
+ // CHECK-LABEL: @test_mm512_ipcvttnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162ibs512(
+ return _mm512_ipcvttnebf16_epi8(__A);
+}
+
+__m512i test_mm512_mask_ipcvttnebf16_epi8(__m512i __S, __mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvttnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162ibs512(
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
+ return _mm512_mask_ipcvttnebf16_epi8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvttnebf16_epi8(__mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvttnebf16_epi8
+ // CHECK: @llvm.x86.avx10.vcvttnebf162ibs512(
+ // CHECK: zeroinitializer
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
+ return _mm512_maskz_ipcvttnebf16_epi8(__A, __B);
+}
+
+__m512i test_mm512_ipcvttnebf16_epu8(__m512bh __A) {
+ // CHECK-LABEL: @test_mm512_ipcvttnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162iubs512(
+ return _mm512_ipcvttnebf16_epu8(__A);
+}
+
+__m512i test_mm512_mask_ipcvttnebf16_epu8(__m512i __S, __mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvttnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162iubs512(
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
+ return _mm512_mask_ipcvttnebf16_epu8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvttnebf16_epu8(__mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvttnebf16_epu8
+ // CHECK: @llvm.x86.avx10.vcvttnebf162iubs512(
+ // CHECK: zeroinitializer
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
+ return _mm512_maskz_ipcvttnebf16_epu8(__A, __B);
+}
+
+__m512i test_mm512_ipcvttph_epi8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_ipcvttph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs512
+ return _mm512_ipcvttph_epi8(__A);
+}
+
+__m512i test_mm512_mask_ipcvttph_epi8(__m512i __S, __mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvttph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs512
+ return _mm512_mask_ipcvttph_epi8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvttph_epi8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvttph_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs512
+ return _mm512_maskz_ipcvttph_epi8(__A, __B);
+}
+
+__m512i test_mm512_ipcvtt_roundph_epi8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtt_roundph_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs512
+ return _mm512_ipcvtt_roundph_epi8(__A, _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_mask_ipcvtt_roundph_epi8(__m512i __S, __mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtt_roundph_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs512
+ return _mm512_mask_ipcvtt_roundph_epi8(__S, __A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_maskz_ipcvtt_roundph_epi8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtt_roundph_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs512
+ return _mm512_maskz_ipcvtt_roundph_epi8(__A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_ipcvttph_epu8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_ipcvttph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs512
+ return _mm512_ipcvttph_epu8(__A);
+}
+
+__m512i test_mm512_mask_ipcvttph_epu8(__m512i __S, __mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvttph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs512
+ return _mm512_mask_ipcvttph_epu8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvttph_epu8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvttph_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs512
+ return _mm512_maskz_ipcvttph_epu8(__A, __B);
+}
+
+__m512i test_mm512_ipcvtt_roundph_epu8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtt_roundph_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs512
+ return _mm512_ipcvtt_roundph_epu8(__A, _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_mask_ipcvtt_roundph_epu8(__m512i __S, __mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtt_roundph_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs512
+ return _mm512_mask_ipcvtt_roundph_epu8(__S, __A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_maskz_ipcvtt_roundph_epu8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtt_roundph_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs512
+ return _mm512_maskz_ipcvtt_roundph_epu8(__A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_ipcvttps_epi8(__m512 __A) {
+ // CHECK-LABEL: @test_mm512_ipcvttps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs512
+ return _mm512_ipcvttps_epi8(__A);
+}
+
+__m512i test_mm512_mask_ipcvttps_epi8(__m512i __S, __mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvttps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs512
+ return _mm512_mask_ipcvttps_epi8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvttps_epi8(__mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvttps_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs512
+ return _mm512_maskz_ipcvttps_epi8(__A, __B);
+}
+
+__m512i test_mm512_ipcvtt_roundps_epi8(__m512 __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtt_roundps_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs512
+ return _mm512_ipcvtt_roundps_epi8(__A, _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_mask_ipcvtt_roundps_epi8(__m512i __S, __mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtt_roundps_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs512
+ return _mm512_mask_ipcvtt_roundps_epi8(__S, __A, __B, _MM_FROUND_NO_EXC);
+}
+
+
+__m512i test_mm512_maskz_ipcvtt_roundps_epi8(__mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtt_roundps_epi8
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs512
+ return _mm512_maskz_ipcvtt_roundps_epi8(__A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_ipcvttps_epu8(__m512 __A) {
+ // CHECK-LABEL: @test_mm512_ipcvttps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs512
+ return _mm512_ipcvttps_epu8(__A);
+}
+
+__m512i test_mm512_mask_ipcvttps_epu8(__m512i __S, __mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvttps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs512
+ return _mm512_mask_ipcvttps_epu8(__S, __A, __B);
+}
+
+__m512i test_mm512_maskz_ipcvttps_epu8(__mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvttps_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs512
+ return _mm512_maskz_ipcvttps_epu8(__A, __B);
+}
+
+__m512i test_mm512_ipcvtt_roundps_epu8(__m512 __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtt_roundps_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs512
+ return _mm512_ipcvtt_roundps_epu8(__A, _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_mask_ipcvtt_roundps_epu8(__m512i __S, __mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtt_roundps_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs512
+ return _mm512_mask_ipcvtt_roundps_epu8(__S, __A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m512i test_mm512_maskz_ipcvtt_roundps_epu8(__mmask16 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtt_roundps_epu8
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs512
+ return _mm512_maskz_ipcvtt_roundps_epu8(__A, __B, _MM_FROUND_NO_EXC);
+}
diff --git a/clang/test/CodeGen/X86/avx10_2satcvt-builtins.c b/clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
new file mode 100644
index 0000000000000..de9fbd4c81e50
--- /dev/null
+++ b/clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
@@ -0,0 +1,603 @@
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=x86_64 -target-feature +avx10.2-256 \
+// RUN: -Wno-invalid-feature-combination -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=i386 -target-feature +avx10.2-256 \
+// RUN: -Wno-invalid-feature-combination -emit-llvm -o - -Wall -Werror | FileCheck %s
+
+#include <immintrin.h>
+
+__m128i test_mm_ipcvtnebf16_epi8(__m128bh __A) {
+ // CHECK-LABEL: @test_mm_ipcvtnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162ibs128
+ return _mm_ipcvtnebf16_epi8(__A);
+}
+
+__m128i test_mm_mask_ipcvtnebf16_epi8(__m128i __S, __mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvtnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162ibs128
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_mask_ipcvtnebf16_epi8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvtnebf16_epi8(__mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvtnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162ibs128
+ // CHECK: zeroinitializer
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_maskz_ipcvtnebf16_epi8(__A, __B);
+}
+
+__m256i test_mm256_ipcvtnebf16_epi8(__m256bh __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162ibs256
+ return _mm256_ipcvtnebf16_epi8(__A);
+}
+
+__m256i test_mm256_mask_ipcvtnebf16_epi8(__m256i __S, __mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162ibs256
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_mask_ipcvtnebf16_epi8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvtnebf16_epi8(__mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162ibs256
+ // CHECK: zeroinitializer
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_maskz_ipcvtnebf16_epi8(__A, __B);
+}
+
+__m128i test_mm_ipcvtnebf16_epu8(__m128bh __A) {
+ // CHECK-LABEL: @test_mm_ipcvtnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162iubs128
+ return _mm_ipcvtnebf16_epu8(__A);
+}
+
+__m128i test_mm_mask_ipcvtnebf16_epu8(__m128i __S, __mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvtnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162iubs128
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_mask_ipcvtnebf16_epu8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvtnebf16_epu8(__mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvtnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162iubs128
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_maskz_ipcvtnebf16_epu8(__A, __B);
+}
+
+__m256i test_mm256_ipcvtnebf16_epu8(__m256bh __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162iubs256
+ return _mm256_ipcvtnebf16_epu8(__A);
+}
+
+__m256i test_mm256_mask_ipcvtnebf16_epu8(__m256i __S, __mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162iubs256
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_mask_ipcvtnebf16_epu8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvtnebf16_epu8(__mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtnebf162iubs256
+ // CHECK: zeroinitializer
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_maskz_ipcvtnebf16_epu8(__A, __B);
+}
+
+__m128i test_mm_ipcvtph_epi8(__m128h __A) {
+ // CHECK-LABEL: @test_mm_ipcvtph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs128
+ return _mm_ipcvtph_epi8(__A);
+}
+
+__m128i test_mm_mask_ipcvtph_epi8(__m128i __S, __mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvtph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs128
+ return _mm_mask_ipcvtph_epi8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvtph_epi8(__mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvtph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs128
+ return _mm_maskz_ipcvtph_epi8(__A, __B);
+}
+
+__m256i test_mm256_ipcvtph_epi8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs256
+ return _mm256_ipcvtph_epi8(__A);
+}
+
+__m256i test_mm256_mask_ipcvtph_epi8(__m256i __S, __mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs256
+ return _mm256_mask_ipcvtph_epi8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvtph_epi8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs256
+ return _mm256_maskz_ipcvtph_epi8(__A, __B);
+}
+
+__m256i test_mm256_ipcvt_roundph_epi8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_ipcvt_roundph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs256
+ return _mm256_ipcvt_roundph_epi8(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_mask_ipcvt_roundph_epi8(__m256i __S, __mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvt_roundph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs256
+ return _mm256_mask_ipcvt_roundph_epi8(__S, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+__m256i test_mm256_maskz_ipcvt_roundph_epi8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvt_roundph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2ibs256
+ return _mm256_maskz_ipcvt_roundph_epi8(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m128i test_mm_ipcvtph_epu8(__m128h __A) {
+ // CHECK-LABEL: @test_mm_ipcvtph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs128
+ return _mm_ipcvtph_epu8(__A);
+}
+
+__m128i test_mm_mask_ipcvtph_epu8(__m128i __S, __mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvtph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs128
+ return _mm_mask_ipcvtph_epu8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvtph_epu8(__mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvtph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs128
+ return _mm_maskz_ipcvtph_epu8(__A, __B);
+}
+
+__m256i test_mm256_ipcvtph_epu8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs256
+ return _mm256_ipcvtph_epu8(__A);
+}
+
+__m256i test_mm256_mask_ipcvtph_epu8(__m256i __S, __mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs256
+ return _mm256_mask_ipcvtph_epu8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvtph_epu8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs256
+ return _mm256_maskz_ipcvtph_epu8(__A, __B);
+}
+
+__m256i test_mm256_ipcvt_roundph_epu8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_ipcvt_roundph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs256
+ return _mm256_ipcvt_roundph_epu8(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_mask_ipcvt_roundph_epu8(__m256i __S, __mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvt_roundph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs256
+ return _mm256_mask_ipcvt_roundph_epu8(__S, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+__m256i test_mm256_maskz_ipcvt_roundph_epu8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvt_roundph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtph2iubs256
+ return _mm256_maskz_ipcvt_roundph_epu8(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m128i test_mm_ipcvtps_epi8(__m128 __A) {
+ // CHECK-LABEL: @test_mm_ipcvtps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs128
+ return _mm_ipcvtps_epi8(__A);
+}
+
+__m128i test_mm_mask_ipcvtps_epi8(__m128i __S, __mmask8 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvtps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs128
+ return _mm_mask_ipcvtps_epi8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvtps_epi8(__mmask8 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvtps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs128
+ return _mm_maskz_ipcvtps_epi8(__A, __B);
+}
+
+__m256i test_mm256_ipcvtps_epi8(__m256 __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs256
+ return _mm256_ipcvtps_epi8(__A);
+}
+
+__m256i test_mm256_mask_ipcvtps_epi8(__m256i __S, __mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs256
+ return _mm256_mask_ipcvtps_epi8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvtps_epi8(__mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs256
+ return _mm256_maskz_ipcvtps_epi8(__A, __B);
+}
+
+__m256i test_mm256_ipcvt_roundps_epi8(__m256 __A) {
+ // CHECK-LABEL: @test_mm256_ipcvt_roundps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs256
+ return _mm256_ipcvt_roundps_epi8(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_mask_ipcvt_roundps_epi8(__m256i __S, __mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvt_roundps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs256
+ return _mm256_mask_ipcvt_roundps_epi8(__S, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_maskz_ipcvt_roundps_epi8(__mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvt_roundps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2ibs256
+ return _mm256_maskz_ipcvt_roundps_epi8(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m128i test_mm_ipcvtps_epu8(__m128 __A) {
+ // CHECK-LABEL: @test_mm_ipcvtps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs128
+ return _mm_ipcvtps_epu8(__A);
+}
+
+__m128i test_mm_mask_ipcvtps_epu8(__m128i __S, __mmask8 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvtps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs128
+ return _mm_mask_ipcvtps_epu8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvtps_epu8(__mmask8 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvtps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs128
+ return _mm_maskz_ipcvtps_epu8(__A, __B);
+}
+
+__m256i test_mm256_ipcvtps_epu8(__m256 __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs256
+ return _mm256_ipcvtps_epu8(__A);
+}
+
+__m256i test_mm256_mask_ipcvtps_epu8(__m256i __S, __mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs256
+ return _mm256_mask_ipcvtps_epu8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvtps_epu8(__mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs256
+ return _mm256_maskz_ipcvtps_epu8(__A, __B);
+}
+
+__m256i test_mm256_ipcvt_roundps_epu8(__m256 __A) {
+ // CHECK-LABEL: @test_mm256_ipcvt_roundps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs256
+ return _mm256_ipcvt_roundps_epu8(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_mask_ipcvt_roundps_epu8(__m256i __S, __mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvt_roundps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs256
+ return _mm256_mask_ipcvt_roundps_epu8(__S, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_maskz_ipcvt_roundps_epu8(__mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvt_roundps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvtps2iubs256
+ return _mm256_maskz_ipcvt_roundps_epu8(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m128i test_mm_ipcvttnebf16_epi8(__m128bh __A) {
+ // CHECK-LABEL: @test_mm_ipcvttnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162ibs128
+ return _mm_ipcvttnebf16_epi8(__A);
+}
+
+__m128i test_mm_mask_ipcvttnebf16_epi8(__m128i __S, __mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvttnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162ibs128
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_mask_ipcvttnebf16_epi8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvttnebf16_epi8(__mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvttnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162ibs128
+ // CHECK: zeroinitializer
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_maskz_ipcvttnebf16_epi8(__A, __B);
+}
+
+__m256i test_mm256_ipcvttnebf16_epi8(__m256bh __A) {
+ // CHECK-LABEL: @test_mm256_ipcvttnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162ibs256
+ return _mm256_ipcvttnebf16_epi8(__A);
+}
+
+__m256i test_mm256_mask_ipcvttnebf16_epi8(__m256i __S, __mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvttnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162ibs256
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_mask_ipcvttnebf16_epi8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvttnebf16_epi8(__mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvttnebf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162ibs256
+ // CHECK: zeroinitializer
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_maskz_ipcvttnebf16_epi8(__A, __B);
+}
+
+__m128i test_mm_ipcvttnebf16_epu8(__m128bh __A) {
+ // CHECK-LABEL: @test_mm_ipcvttnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162iubs128
+ return _mm_ipcvttnebf16_epu8(__A);
+}
+
+__m128i test_mm_mask_ipcvttnebf16_epu8(__m128i __S, __mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvttnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162iubs128
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_mask_ipcvttnebf16_epu8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvttnebf16_epu8(__mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvttnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162iubs128
+ // CHECK: zeroinitializer
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_maskz_ipcvttnebf16_epu8(__A, __B);
+}
+
+__m256i test_mm256_ipcvttnebf16_epu8(__m256bh __A) {
+ // CHECK-LABEL: @test_mm256_ipcvttnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162iubs256
+ return _mm256_ipcvttnebf16_epu8(__A);
+}
+
+__m256i test_mm256_mask_ipcvttnebf16_epu8(__m256i __S, __mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvttnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162iubs256
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_mask_ipcvttnebf16_epu8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvttnebf16_epu8(__mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvttnebf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttnebf162iubs256
+ // CHECK: zeroinitializer
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_maskz_ipcvttnebf16_epu8(__A, __B);
+}
+
+__m128i test_mm_ipcvttph_epi8(__m128h __A) {
+ // CHECK-LABEL: @test_mm_ipcvttph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs128
+ return _mm_ipcvttph_epi8(__A);
+}
+
+__m128i test_mm_mask_ipcvttph_epi8(__m128i __S, __mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvttph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs128
+ return _mm_mask_ipcvttph_epi8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvttph_epi8(__mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvttph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs128
+ return _mm_maskz_ipcvttph_epi8(__A, __B);
+}
+
+__m256i test_mm256_ipcvttph_epi8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_ipcvttph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs256
+ return _mm256_ipcvttph_epi8(__A);
+}
+
+__m256i test_mm256_mask_ipcvttph_epi8(__m256i __S, __mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvttph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs256
+ return _mm256_mask_ipcvttph_epi8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvttph_epi8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvttph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs256
+ return _mm256_maskz_ipcvttph_epi8(__A, __B);
+}
+
+__m256i test_mm256_ipcvtt_roundph_epi8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtt_roundph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs256
+ return _mm256_ipcvtt_roundph_epi8(__A, _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_mask_ipcvtt_roundph_epi8(__m256i __S, __mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtt_roundph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs256
+ return _mm256_mask_ipcvtt_roundph_epi8(__S, __A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_maskz_ipcvtt_roundph_epi8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtt_roundph_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2ibs256
+ return _mm256_maskz_ipcvtt_roundph_epi8(__A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m128i test_mm_ipcvttph_epu8(__m128h __A) {
+ // CHECK-LABEL: @test_mm_ipcvttph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs128
+ return _mm_ipcvttph_epu8(__A);
+}
+
+__m128i test_mm_mask_ipcvttph_epu8(__m128i __S, __mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvttph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs128
+ return _mm_mask_ipcvttph_epu8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvttph_epu8(__mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvttph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs128
+ return _mm_maskz_ipcvttph_epu8(__A, __B);
+}
+
+__m256i test_mm256_ipcvttph_epu8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_ipcvttph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs256
+ return _mm256_ipcvttph_epu8(__A);
+}
+
+__m256i test_mm256_mask_ipcvttph_epu8(__m256i __S, __mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvttph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs256
+ return _mm256_mask_ipcvttph_epu8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvttph_epu8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvttph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs256
+ return _mm256_maskz_ipcvttph_epu8(__A, __B);
+}
+
+__m256i test_mm256_ipcvtt_roundph_epu8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtt_roundph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs256
+ return _mm256_ipcvtt_roundph_epu8(__A, _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_mask_ipcvtt_roundph_epu8(__m256i __S, __mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtt_roundph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs256
+ return _mm256_mask_ipcvtt_roundph_epu8(__S, __A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_maskz_ipcvtt_roundph_epu8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtt_roundph_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttph2iubs256
+ return _mm256_maskz_ipcvtt_roundph_epu8(__A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m128i test_mm_ipcvttps_epi8(__m128 __A) {
+ // CHECK-LABEL: @test_mm_ipcvttps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs128
+ return _mm_ipcvttps_epi8(__A);
+}
+
+__m128i test_mm_mask_ipcvttps_epi8(__m128i __S, __mmask8 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvttps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs128
+ return _mm_mask_ipcvttps_epi8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvttps_epi8(__mmask8 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvttps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs128
+ return _mm_maskz_ipcvttps_epi8(__A, __B);
+}
+
+__m256i test_mm256_ipcvttps_epi8(__m256 __A) {
+ // CHECK-LABEL: @test_mm256_ipcvttps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs256
+ return _mm256_ipcvttps_epi8(__A);
+}
+
+__m256i test_mm256_mask_ipcvttps_epi8(__m256i __S, __mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvttps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs256
+ return _mm256_mask_ipcvttps_epi8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvttps_epi8(__mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvttps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs256
+ return _mm256_maskz_ipcvttps_epi8(__A, __B);
+}
+
+__m256i test_mm256_ipcvtt_roundps_epi8(__m256 __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtt_roundps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs256
+ return _mm256_ipcvtt_roundps_epi8(__A, _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_mask_ipcvtt_roundps_epi8(__m256i __S, __mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtt_roundps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs256
+ return _mm256_mask_ipcvtt_roundps_epi8(__S, __A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_maskz_ipcvtt_roundps_epi8(__mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtt_roundps_epi8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2ibs256
+ return _mm256_maskz_ipcvtt_roundps_epi8(__A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m128i test_mm_ipcvttps_epu8(__m128 __A) {
+ // CHECK-LABEL: @test_mm_ipcvttps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs128
+ return _mm_ipcvttps_epu8(__A);
+}
+
+__m128i test_mm_mask_ipcvttps_epu8(__m128i __S, __mmask8 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvttps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs128
+ return _mm_mask_ipcvttps_epu8(__S, __A, __B);
+}
+
+__m128i test_mm_maskz_ipcvttps_epu8(__mmask8 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvttps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs128
+ return _mm_maskz_ipcvttps_epu8(__A, __B);
+}
+
+__m256i test_mm256_ipcvttps_epu8(__m256 __A) {
+ // CHECK-LABEL: @test_mm256_ipcvttps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs256
+ return _mm256_ipcvttps_epu8(__A);
+}
+
+__m256i test_mm256_mask_ipcvttps_epu8(__m256i __S, __mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvttps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs256
+ return _mm256_mask_ipcvttps_epu8(__S, __A, __B);
+}
+
+__m256i test_mm256_maskz_ipcvttps_epu8(__mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvttps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs256
+ return _mm256_maskz_ipcvttps_epu8(__A, __B);
+}
+
+__m256i test_mm256_ipcvtt_roundps_epu8(__m256 __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtt_roundps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs256
+ return _mm256_ipcvtt_roundps_epu8(__A, _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_mask_ipcvtt_roundps_epu8(__m256i __S, __mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtt_roundps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs256
+ return _mm256_mask_ipcvtt_roundps_epu8(__S, __A, __B, _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm256_maskz_ipcvtt_roundps_epu8(__mmask8 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtt_roundps_epu8(
+ // CHECK: @llvm.x86.avx10.mask.vcvttps2iubs256
+ return _mm256_maskz_ipcvtt_roundps_epu8(__A, __B, _MM_FROUND_NO_EXC);
+}
diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td
index 7160c8dfa7600..b9095df72c62b 100644
--- a/llvm/include/llvm/IR/IntrinsicsX86.td
+++ b/llvm/include/llvm/IR/IntrinsicsX86.td
@@ -6898,3 +6898,115 @@ def int_x86_avx10_mask_vminmaxss_round : ClangBuiltin<"__builtin_ia32_vminmaxss_
Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty, llvm_v4f32_ty, llvm_i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>]>;
}
+
+//===----------------------------------------------------------------------===//
+let TargetPrefix = "x86" in {
+def int_x86_avx10_vcvtnebf162ibs128 : ClangBuiltin<"__builtin_ia32_vcvtnebf162ibs128">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtnebf162ibs256 : ClangBuiltin<"__builtin_ia32_vcvtnebf162ibs256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtnebf162ibs512 : ClangBuiltin<"__builtin_ia32_vcvtnebf162ibs512">,
+ Intrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtnebf162iubs128 : ClangBuiltin<"__builtin_ia32_vcvtnebf162iubs128">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtnebf162iubs256 : ClangBuiltin<"__builtin_ia32_vcvtnebf162iubs256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtnebf162iubs512 : ClangBuiltin<"__builtin_ia32_vcvtnebf162iubs512">,
+ Intrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtph2ibs128 : ClangBuiltin<"__builtin_ia32_vcvtph2ibs128_mask">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtph2ibs256 : ClangBuiltin<"__builtin_ia32_vcvtph2ibs256_mask">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvtph2ibs512 : ClangBuiltin<"__builtin_ia32_vcvtph2ibs512_mask">,
+ Intrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvtph2iubs128 : ClangBuiltin<"__builtin_ia32_vcvtph2iubs128_mask">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtph2iubs256 : ClangBuiltin<"__builtin_ia32_vcvtph2iubs256_mask">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvtph2iubs512 : ClangBuiltin<"__builtin_ia32_vcvtph2iubs512_mask">,
+ Intrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvtps2ibs128 : ClangBuiltin<"__builtin_ia32_vcvtps2ibs128_mask">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtps2ibs256 : ClangBuiltin<"__builtin_ia32_vcvtps2ibs256_mask">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvtps2ibs512 : ClangBuiltin<"__builtin_ia32_vcvtps2ibs512_mask">,
+ Intrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvtps2iubs128 : ClangBuiltin<"__builtin_ia32_vcvtps2iubs128_mask">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtps2iubs256 : ClangBuiltin<"__builtin_ia32_vcvtps2iubs256_mask">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvtps2iubs512 : ClangBuiltin<"__builtin_ia32_vcvtps2iubs512_mask">,
+ Intrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_vcvttnebf162ibs128 : ClangBuiltin<"__builtin_ia32_vcvttnebf162ibs128">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvttnebf162ibs256 : ClangBuiltin<"__builtin_ia32_vcvttnebf162ibs256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvttnebf162ibs512 : ClangBuiltin<"__builtin_ia32_vcvttnebf162ibs512">,
+ Intrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvttnebf162iubs128 : ClangBuiltin<"__builtin_ia32_vcvttnebf162iubs128">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvttnebf162iubs256 : ClangBuiltin<"__builtin_ia32_vcvttnebf162iubs256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvttnebf162iubs512 : ClangBuiltin<"__builtin_ia32_vcvttnebf162iubs512">,
+ Intrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvttph2ibs128 : ClangBuiltin<"__builtin_ia32_vcvttph2ibs128_mask">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvttph2ibs256 : ClangBuiltin<"__builtin_ia32_vcvttph2ibs256_mask">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvttph2ibs512 : ClangBuiltin<"__builtin_ia32_vcvttph2ibs512_mask">,
+ Intrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvttph2iubs128 : ClangBuiltin<"__builtin_ia32_vcvttph2iubs128_mask">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvttph2iubs256 : ClangBuiltin<"__builtin_ia32_vcvttph2iubs256_mask">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvttph2iubs512 : ClangBuiltin<"__builtin_ia32_vcvttph2iubs512_mask">,
+ Intrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvttps2ibs128 : ClangBuiltin<"__builtin_ia32_vcvttps2ibs128_mask">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvttps2ibs256 : ClangBuiltin<"__builtin_ia32_vcvttps2ibs256_mask">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvttps2ibs512 : ClangBuiltin<"__builtin_ia32_vcvttps2ibs512_mask">,
+ Intrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvttps2iubs128 : ClangBuiltin<"__builtin_ia32_vcvttps2iubs128_mask">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvttps2iubs256 : ClangBuiltin<"__builtin_ia32_vcvttps2iubs256_mask">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+def int_x86_avx10_mask_vcvttps2iubs512 : ClangBuiltin<"__builtin_ia32_vcvttps2iubs512_mask">,
+ Intrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<3>>]>;
+}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index fe1865409a265..c59f838905894 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -34062,6 +34062,26 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
NODE_NAME_CASE(VMINMAX_SAE)
NODE_NAME_CASE(VMINMAXS)
NODE_NAME_CASE(VMINMAXS_SAE)
+ NODE_NAME_CASE(VCVTNEBF162IBS)
+ NODE_NAME_CASE(VCVTNEBF162IUBS)
+ NODE_NAME_CASE(VCVTPH2IBS)
+ NODE_NAME_CASE(VCVTPH2IBS_RND)
+ NODE_NAME_CASE(VCVTPH2IUBS)
+ NODE_NAME_CASE(VCVTPH2IUBS_RND)
+ NODE_NAME_CASE(VCVTPS2IBS)
+ NODE_NAME_CASE(VCVTPS2IBS_RND)
+ NODE_NAME_CASE(VCVTTNEBF162IBS)
+ NODE_NAME_CASE(VCVTTNEBF162IUBS)
+ NODE_NAME_CASE(VCVTPS2IUBS)
+ NODE_NAME_CASE(VCVTPS2IUBS_RND)
+ NODE_NAME_CASE(VCVTTPH2IBS)
+ NODE_NAME_CASE(VCVTTPH2IBS_SAE)
+ NODE_NAME_CASE(VCVTTPH2IUBS)
+ NODE_NAME_CASE(VCVTTPH2IUBS_SAE)
+ NODE_NAME_CASE(VCVTTPS2IBS)
+ NODE_NAME_CASE(VCVTTPS2IBS_SAE)
+ NODE_NAME_CASE(VCVTTPS2IUBS)
+ NODE_NAME_CASE(VCVTTPS2IUBS_SAE)
NODE_NAME_CASE(AESENC128KL)
NODE_NAME_CASE(AESDEC128KL)
NODE_NAME_CASE(AESENC256KL)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index 7642a528fb22e..fd16747f90fb4 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -600,6 +600,27 @@ namespace llvm {
VMINMAXS,
VMINMAXS_SAE,
+ VCVTNEBF162IBS,
+ VCVTNEBF162IUBS,
+ VCVTPH2IBS,
+ VCVTPH2IBS_RND,
+ VCVTPH2IUBS,
+ VCVTPH2IUBS_RND,
+ VCVTPS2IBS,
+ VCVTPS2IBS_RND,
+ VCVTTNEBF162IBS,
+ VCVTTNEBF162IUBS,
+ VCVTPS2IUBS,
+ VCVTPS2IUBS_RND,
+ VCVTTPH2IBS,
+ VCVTTPH2IBS_SAE,
+ VCVTTPH2IUBS,
+ VCVTTPH2IUBS_SAE,
+ VCVTTPS2IBS,
+ VCVTTPS2IBS_SAE,
+ VCVTTPS2IUBS,
+ VCVTTPS2IUBS_SAE,
+
MPSADBW,
// Compress and expand.
diff --git a/llvm/lib/Target/X86/X86InstrAVX10.td b/llvm/lib/Target/X86/X86InstrAVX10.td
index 920317ded15c6..dab97577bb2c4 100644
--- a/llvm/lib/Target/X86/X86InstrAVX10.td
+++ b/llvm/lib/Target/X86/X86InstrAVX10.td
@@ -417,3 +417,173 @@ defm VMINMAXSH : avx10_minmax_scalar<"vminmaxsh", v8f16x_info, X86vminmaxs, X86v
AVX512PSIi8Base, VEX_LIG, EVEX, VVVV, EVEX_CD8<16, CD8VT1>, TA;
defm VMINMAXSS : avx10_minmax_scalar<"vminmaxss", v4f32x_info, X86vminmaxs, X86vminmaxsSae>,
AVX512AIi8Base, VEX_LIG, EVEX, VVVV, EVEX_CD8<32, CD8VT1>;
+
+//-------------------------------------------------
+// AVX10 SATCVT instructions
+//-------------------------------------------------
+
+multiclass avx10_sat_cvt_rmb<bits<8> Opc, string OpStr, X86FoldableSchedWrite sched,
+ X86VectorVTInfo DestInfo,
+ X86VectorVTInfo SrcInfo,
+ SDNode MaskNode> {
+ defm rr: AVX512_maskable<Opc, MRMSrcReg, DestInfo, (outs DestInfo.RC:$dst),
+ (ins SrcInfo.RC:$src), OpStr, "$src", "$src",
+ (DestInfo.VT (MaskNode SrcInfo.RC:$src))>, Sched<[sched]>;
+ defm rm: AVX512_maskable<Opc, MRMSrcMem, DestInfo, (outs DestInfo.RC:$dst),
+ (ins SrcInfo.MemOp:$src), OpStr, "$src", "$src",
+ (DestInfo.VT (MaskNode (SrcInfo.VT
+ (SrcInfo.LdFrag addr:$src))))>,
+ Sched<[sched.Folded, sched.ReadAfterFold]>;
+ defm rmb: AVX512_maskable<Opc, MRMSrcMem, DestInfo, (outs DestInfo.RC:$dst),
+ (ins SrcInfo.ScalarMemOp:$src), OpStr,
+ "${src}"#SrcInfo.BroadcastStr, "${src}"#SrcInfo.BroadcastStr,
+ (DestInfo.VT (MaskNode (SrcInfo.VT
+ (SrcInfo.BroadcastLdFrag addr:$src))))>, EVEX_B,
+ Sched<[sched.Folded, sched.ReadAfterFold]>;
+}
+
+// Conversion with rounding control (RC)
+multiclass avx10_sat_cvt_rc<bits<8> Opc, string OpStr, X86SchedWriteWidths sched,
+ AVX512VLVectorVTInfo DestInfo, AVX512VLVectorVTInfo SrcInfo,
+ SDNode MaskNode> {
+ let Uses = [MXCSR] in
+ defm Zrrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info512,
+ (outs DestInfo.info512.RC:$dst),
+ (ins SrcInfo.info512.RC:$src, AVX512RC:$rc),
+ OpStr, "$rc, $src", "$src, $rc",
+ (DestInfo.info512.VT (MaskNode
+ SrcInfo.info512.RC:$src, (i32 timm:$rc)))>,
+ Sched<[sched.ZMM]>, EVEX, EVEX_RC, EVEX_B;
+ let Predicates = [HasAVX10_2], hasEVEX_U = 1 in {
+ defm Z256rrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info256,
+ (outs DestInfo.info256.RC:$dst),
+ (ins SrcInfo.info256.RC:$src, AVX512RC:$rc),
+ OpStr, "$rc, $src", "$src, $rc",
+ (DestInfo.info256.VT (MaskNode
+ SrcInfo.info256.RC:$src, (i32 timm:$rc)))>,
+ Sched<[sched.YMM]>, EVEX, EVEX_RC, EVEX_B;
+ }
+}
+
+// Conversion with SAE
+multiclass
+ avx10_sat_cvt_sae<bits<8> Opc, string OpStr, X86SchedWriteWidths sched,
+ AVX512VLVectorVTInfo DestInfo, AVX512VLVectorVTInfo SrcInfo,
+ SDNode Node> {
+ let Uses = [MXCSR] in
+ defm Zrrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info512,
+ (outs DestInfo.info512.RC:$dst),
+ (ins SrcInfo.info512.RC:$src),
+ OpStr, "{sae}, $src", "$src, {sae}",
+ (DestInfo.info512.VT (Node SrcInfo.info512.RC:$src))>,
+ Sched<[sched.ZMM]>, EVEX, EVEX_B;
+ let Predicates = [HasAVX10_2], hasEVEX_U = 1 in {
+ defm Z256rrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info256,
+ (outs DestInfo.info256.RC:$dst),
+ (ins SrcInfo.info256.RC:$src),
+ OpStr, "{sae}, $src", "$src, {sae}",
+ (DestInfo.info256.VT (Node SrcInfo.info256.RC:$src))>,
+ Sched<[sched.YMM]>, EVEX, EVEX_B;
+ }
+}
+
+multiclass avx10_sat_cvt_base<bits<8> Opc, string OpStr, X86SchedWriteWidths sched,
+ SDNode MaskNode, AVX512VLVectorVTInfo DestInfo,
+ AVX512VLVectorVTInfo SrcInfo> {
+ let Predicates = [HasAVX10_2_512] in
+ defm Z : avx10_sat_cvt_rmb<Opc, OpStr, sched.ZMM,
+ DestInfo.info512, SrcInfo.info512,
+ MaskNode>,
+ EVEX, EVEX_V512;
+ let Predicates = [HasAVX10_2] in {
+ defm Z256
+ : avx10_sat_cvt_rmb<Opc, OpStr, sched.YMM,
+ DestInfo.info256, SrcInfo.info256,
+ MaskNode>,
+ EVEX, EVEX_V256;
+ defm Z128
+ : avx10_sat_cvt_rmb<Opc, OpStr, sched.XMM,
+ DestInfo.info128, SrcInfo.info128,
+ MaskNode>,
+ EVEX, EVEX_V128;
+ }
+}
+
+defm VCVTNEBF162IBS : avx10_sat_cvt_base<0x69, "vcvtnebf162ibs",
+ SchedWriteVecIMul, X86vcvtnebf162ibs,
+ avx512vl_i16_info, avx512vl_bf16_info>,
+ AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+defm VCVTNEBF162IUBS : avx10_sat_cvt_base<0x6b, "vcvtnebf162iubs",
+ SchedWriteVecIMul, X86vcvtnebf162iubs,
+ avx512vl_i16_info, avx512vl_bf16_info>,
+ AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+
+defm VCVTPH2IBS : avx10_sat_cvt_base<0x69, "vcvtph2ibs", SchedWriteVecIMul,
+ X86vcvtph2ibs, avx512vl_i16_info,
+ avx512vl_f16_info>, AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+defm VCVTPH2IBS : avx10_sat_cvt_rc<0x69, "vcvtph2ibs", SchedWriteVecIMul,
+ avx512vl_i16_info, avx512vl_f16_info,
+ X86vcvtph2ibsRnd>,
+ AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+
+defm VCVTPH2IUBS : avx10_sat_cvt_base<0x6b, "vcvtph2iubs", SchedWriteVecIMul,
+ X86vcvtph2iubs, avx512vl_i16_info,
+ avx512vl_f16_info>, AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+defm VCVTPH2IUBS : avx10_sat_cvt_rc<0x6b, "vcvtph2iubs", SchedWriteVecIMul,
+ avx512vl_i16_info, avx512vl_f16_info,
+ X86vcvtph2iubsRnd>,
+ AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+
+defm VCVTPS2IBS : avx10_sat_cvt_base<0x69, "vcvtps2ibs", SchedWriteVecIMul,
+ X86vcvtps2ibs, avx512vl_i32_info,
+ avx512vl_f32_info>, AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
+defm VCVTPS2IBS : avx10_sat_cvt_rc<0x69, "vcvtps2ibs", SchedWriteVecIMul,
+ avx512vl_i32_info, avx512vl_f32_info,
+ X86vcvtps2ibsRnd>,
+ AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
+
+defm VCVTPS2IUBS : avx10_sat_cvt_base<0x6b, "vcvtps2iubs", SchedWriteVecIMul,
+ X86vcvtps2iubs, avx512vl_i32_info,
+ avx512vl_f32_info>, AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
+defm VCVTPS2IUBS : avx10_sat_cvt_rc<0x6b, "vcvtps2iubs", SchedWriteVecIMul,
+ avx512vl_i32_info, avx512vl_f32_info,
+ X86vcvtps2iubsRnd>,
+ AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
+
+
+defm VCVTTNEBF162IBS : avx10_sat_cvt_base<0x68, "vcvttnebf162ibs",
+ SchedWriteVecIMul, X86vcvttnebf162ibs,
+ avx512vl_i16_info, avx512vl_bf16_info>,
+ AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+defm VCVTTNEBF162IUBS : avx10_sat_cvt_base<0x6a, "vcvttnebf162iubs",
+ SchedWriteVecIMul, X86vcvttnebf162iubs,
+ avx512vl_i16_info, avx512vl_bf16_info>,
+ AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+
+defm VCVTTPH2IBS : avx10_sat_cvt_base<0x68, "vcvttph2ibs", SchedWriteVecIMul,
+ X86vcvttph2ibs, avx512vl_i16_info,
+ avx512vl_f16_info>, AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+defm VCVTTPH2IBS : avx10_sat_cvt_sae<0x68, "vcvttph2ibs", SchedWriteVecIMul,
+ avx512vl_i16_info, avx512vl_f16_info, X86vcvttph2ibsSAE>,
+ AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+defm VCVTTPH2IUBS : avx10_sat_cvt_base<0x6a, "vcvttph2iubs", SchedWriteVecIMul,
+ X86vcvttph2iubs, avx512vl_i16_info, avx512vl_f16_info>,
+ AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+defm VCVTTPH2IUBS : avx10_sat_cvt_sae<0x6a, "vcvttph2iubs", SchedWriteVecIMul,
+ avx512vl_i16_info, avx512vl_f16_info, X86vcvttph2iubsSAE>,
+ AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+
+
+defm VCVTTPS2IBS : avx10_sat_cvt_base<0x68, "vcvttps2ibs", SchedWriteVecIMul,
+ X86vcvttps2ibs, avx512vl_i32_info, avx512vl_f32_info>,
+ AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
+defm VCVTTPS2IBS : avx10_sat_cvt_sae<0x68, "vcvttps2ibs", SchedWriteVecIMul,
+ avx512vl_i32_info, avx512vl_f32_info, X86vcvttps2ibsSAE>,
+ AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
+
+defm VCVTTPS2IUBS : avx10_sat_cvt_base<0x6a, "vcvttps2iubs", SchedWriteVecIMul,
+ X86vcvttps2iubs, avx512vl_i32_info, avx512vl_f32_info>,
+ AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
+defm VCVTTPS2IUBS : avx10_sat_cvt_sae<0x6a, "vcvttps2iubs", SchedWriteVecIMul,
+ avx512vl_i32_info, avx512vl_f32_info, X86vcvttps2iubsSAE>,
+ AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
index 11b75240b2504..f94ef51ca2076 100644
--- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
+++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
@@ -821,6 +821,88 @@ def X86vpdpbuuds : SDNode<"X86ISD::VPDPBUUDS", SDTVnni>;
def X86Vmpsadbw : SDNode<"X86ISD::MPSADBW", SDTX86PSADBW>;
+def SDTAVX10SATCVT_BF162I : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, bf16>
+]>;
+
+def SDTAVX10SATCVT_PH2I : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, f16>
+]>;
+
+def SDTAVX10SATCVT_PS2I : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, i32>, SDTCVecEltisVT<1, f32>
+]>;
+
+def SDTAVX10SATCVT_PH2I_ROUND : SDTypeProfile<1, 2, [
+ SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, f16>, SDTCisInt<2>
+]>;
+
+def SDTAVX10SATCVT_PS2I_RND : SDTypeProfile<1, 2, [
+ SDTCVecEltisVT<0, i32>, SDTCVecEltisVT<1, f32>, SDTCisInt<2>
+]>;
+
+def SDTAVX10SATCVT_PH2I_SAE : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, f16>,
+ SDTCisSameNumEltsAs<0, 1>
+]>;
+
+def SDTAVX10SATCVT_PS2I_SAE : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, i32>, SDTCVecEltisVT<1, f32>,
+ SDTCisSameNumEltsAs<0, 1>
+]>;
+
+def X86vcvtnebf162ibs
+ : SDNode<"X86ISD::VCVTNEBF162IBS", SDTAVX10SATCVT_BF162I>;
+
+def X86vcvtnebf162iubs
+ : SDNode<"X86ISD::VCVTNEBF162IUBS", SDTAVX10SATCVT_BF162I>;
+
+def X86vcvtph2ibs : SDNode<"X86ISD::VCVTPH2IBS", SDTAVX10SATCVT_PH2I>;
+
+def X86vcvtph2ibsRnd
+ : SDNode<"X86ISD::VCVTPH2IBS_RND", SDTAVX10SATCVT_PH2I_ROUND>;
+
+def X86vcvtph2iubs : SDNode<"X86ISD::VCVTPH2IUBS", SDTAVX10SATCVT_PH2I>;
+
+def X86vcvtph2iubsRnd
+ : SDNode<"X86ISD::VCVTPH2IUBS_RND", SDTAVX10SATCVT_PH2I_ROUND>;
+
+def X86vcvtps2ibs : SDNode<"X86ISD::VCVTPS2IBS", SDTAVX10SATCVT_PS2I>;
+
+def X86vcvtps2ibsRnd
+ : SDNode<"X86ISD::VCVTPS2IBS_RND", SDTAVX10SATCVT_PS2I_RND>;
+
+def X86vcvtps2iubs : SDNode<"X86ISD::VCVTPS2IUBS", SDTAVX10SATCVT_PS2I>;
+
+def X86vcvtps2iubsRnd
+ : SDNode<"X86ISD::VCVTPS2IUBS_RND", SDTAVX10SATCVT_PS2I_RND>;
+
+def X86vcvttnebf162ibs
+ : SDNode<"X86ISD::VCVTTNEBF162IBS", SDTAVX10SATCVT_BF162I>;
+
+def X86vcvttnebf162iubs
+ : SDNode<"X86ISD::VCVTTNEBF162IUBS", SDTAVX10SATCVT_BF162I>;
+
+def X86vcvttph2ibs : SDNode<"X86ISD::VCVTTPH2IBS", SDTAVX10SATCVT_PH2I>;
+
+def X86vcvttph2ibsSAE
+ : SDNode<"X86ISD::VCVTTPH2IBS_SAE", SDTAVX10SATCVT_PH2I_SAE>;
+
+def X86vcvttph2iubs : SDNode<"X86ISD::VCVTTPH2IUBS", SDTAVX10SATCVT_PH2I>;
+
+def X86vcvttph2iubsSAE
+ : SDNode<"X86ISD::VCVTTPH2IUBS_SAE", SDTAVX10SATCVT_PH2I_SAE>;
+
+def X86vcvttps2ibs : SDNode<"X86ISD::VCVTTPS2IBS", SDTAVX10SATCVT_PS2I>;
+
+def X86vcvttps2ibsSAE
+ : SDNode<"X86ISD::VCVTTPS2IBS_SAE", SDTAVX10SATCVT_PS2I_SAE>;
+
+def X86vcvttps2iubs : SDNode<"X86ISD::VCVTTPS2IUBS", SDTAVX10SATCVT_PS2I>;
+
+def X86vcvttps2iubsSAE
+ : SDNode<"X86ISD::VCVTTPS2IUBS_SAE", SDTAVX10SATCVT_PS2I_SAE>;
+
//===----------------------------------------------------------------------===//
// SSE pattern fragments
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/X86/X86InstrUtils.td b/llvm/lib/Target/X86/X86InstrUtils.td
index 8387b76a40cdd..531268b41da96 100644
--- a/llvm/lib/Target/X86/X86InstrUtils.td
+++ b/llvm/lib/Target/X86/X86InstrUtils.td
@@ -313,7 +313,7 @@ def v32i16_info : X86VectorVTInfo<32, i16, VR512, "w">;
def v16i32_info : X86VectorVTInfo<16, i32, VR512, "d">;
def v8i64_info : X86VectorVTInfo<8, i64, VR512, "q">;
def v32f16_info : X86VectorVTInfo<32, f16, VR512, "ph">;
-def v32bf16_info: X86VectorVTInfo<32, bf16, VR512, "pbf">;
+def v32bf16_info: X86VectorVTInfo<32, bf16, VR512, "pbf16">;
def v16f32_info : X86VectorVTInfo<16, f32, VR512, "ps">;
def v8f64_info : X86VectorVTInfo<8, f64, VR512, "pd">;
@@ -323,7 +323,7 @@ def v16i16x_info : X86VectorVTInfo<16, i16, VR256X, "w">;
def v8i32x_info : X86VectorVTInfo<8, i32, VR256X, "d">;
def v4i64x_info : X86VectorVTInfo<4, i64, VR256X, "q">;
def v16f16x_info : X86VectorVTInfo<16, f16, VR256X, "ph">;
-def v16bf16x_info: X86VectorVTInfo<16, bf16, VR256X, "pbf">;
+def v16bf16x_info: X86VectorVTInfo<16, bf16, VR256X, "pbf16">;
def v8f32x_info : X86VectorVTInfo<8, f32, VR256X, "ps">;
def v4f64x_info : X86VectorVTInfo<4, f64, VR256X, "pd">;
@@ -332,7 +332,7 @@ def v8i16x_info : X86VectorVTInfo<8, i16, VR128X, "w">;
def v4i32x_info : X86VectorVTInfo<4, i32, VR128X, "d">;
def v2i64x_info : X86VectorVTInfo<2, i64, VR128X, "q">;
def v8f16x_info : X86VectorVTInfo<8, f16, VR128X, "ph">;
-def v8bf16x_info : X86VectorVTInfo<8, bf16, VR128X, "pbf">;
+def v8bf16x_info : X86VectorVTInfo<8, bf16, VR128X, "pbf16">;
def v4f32x_info : X86VectorVTInfo<4, f32, VR128X, "ps">;
def v2f64x_info : X86VectorVTInfo<2, f64, VR128X, "pd">;
diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
index a7473e495330b..7caa1a654d5e5 100644
--- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h
+++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
@@ -408,6 +408,18 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86ISD::CVTP2UI, X86ISD::CVTP2UI_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtph2dq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtph2ibs128, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPH2IBS, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtph2ibs256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPH2IBS, X86ISD::VCVTPH2IBS_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtph2ibs512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPH2IBS, X86ISD::VCVTPH2IBS_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtph2iubs128, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPH2IUBS, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtph2iubs256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPH2IUBS, X86ISD::VCVTPH2IUBS_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtph2iubs512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPH2IUBS, X86ISD::VCVTPH2IUBS_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtph2pd256, INTR_TYPE_1OP_MASK_SAE,
ISD::FP_EXTEND, X86ISD::VFPEXT_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvtph2psx256, INTR_TYPE_1OP_MASK_SAE,
@@ -424,6 +436,18 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtps2dq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtps2ibs128, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPS2IBS, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtps2ibs256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPS2IBS, X86ISD::VCVTPS2IBS_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtps2ibs512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPS2IBS, X86ISD::VCVTPS2IBS_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtps2iubs128, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPS2IUBS, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtps2iubs256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPS2IUBS, X86ISD::VCVTPS2IUBS_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtps2iubs512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTPS2IUBS, X86ISD::VCVTPS2IUBS_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtps2pd256, INTR_TYPE_1OP_MASK_SAE,
ISD::FP_EXTEND, X86ISD::VFPEXT_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvtps2phx256, INTR_TYPE_1OP_MASK,
@@ -444,6 +468,18 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86ISD::CVTTP2UI, X86ISD::CVTTP2UI_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttph2dq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTTP2SI, X86ISD::CVTTP2SI_SAE),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttph2ibs128, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTTPH2IBS, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttph2ibs256, INTR_TYPE_1OP_MASK_SAE,
+ X86ISD::VCVTTPH2IBS, X86ISD::VCVTTPH2IBS_SAE),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttph2ibs512, INTR_TYPE_1OP_MASK_SAE,
+ X86ISD::VCVTTPH2IBS, X86ISD::VCVTTPH2IBS_SAE),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttph2iubs128, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTTPH2IUBS, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttph2iubs256, INTR_TYPE_1OP_MASK_SAE,
+ X86ISD::VCVTTPH2IUBS, X86ISD::VCVTTPH2IUBS_SAE),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttph2iubs512, INTR_TYPE_1OP_MASK_SAE,
+ X86ISD::VCVTTPH2IUBS, X86ISD::VCVTTPH2IUBS_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttph2qq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTTP2SI, X86ISD::CVTTP2SI_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttph2udq256, INTR_TYPE_1OP_MASK,
@@ -456,6 +492,18 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86ISD::CVTTP2SI, X86ISD::CVTTP2SI_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttps2dq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTTP2SI, X86ISD::CVTTP2SI_SAE),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttps2ibs128, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTTPS2IBS, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttps2ibs256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTTPS2IBS, X86ISD::VCVTTPS2IBS_SAE),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttps2ibs512, INTR_TYPE_1OP_MASK_SAE,
+ X86ISD::VCVTTPS2IBS, X86ISD::VCVTTPS2IBS_SAE),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttps2iubs128, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTTPS2IUBS, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttps2iubs256, INTR_TYPE_1OP_MASK_SAE,
+ X86ISD::VCVTTPS2IUBS, X86ISD::VCVTTPS2IUBS_SAE),
+ X86_INTRINSIC_DATA(avx10_mask_vcvttps2iubs512, INTR_TYPE_1OP_MASK_SAE,
+ X86ISD::VCVTTPS2IUBS, X86ISD::VCVTTPS2IUBS_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttps2qq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTTP2SI, X86ISD::CVTTP2SI_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttps2udq256, INTR_TYPE_1OP_MASK,
@@ -546,6 +594,30 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86ISD::FADD_RND),
X86_INTRINSIC_DATA(avx10_vaddps256, INTR_TYPE_2OP, ISD::FADD,
X86ISD::FADD_RND),
+ X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs128, INTR_TYPE_1OP,
+ X86ISD::VCVTNEBF162IBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs256, INTR_TYPE_1OP,
+ X86ISD::VCVTNEBF162IBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs512, INTR_TYPE_1OP,
+ X86ISD::VCVTNEBF162IBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtnebf162iubs128, INTR_TYPE_1OP,
+ X86ISD::VCVTNEBF162IUBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtnebf162iubs256, INTR_TYPE_1OP,
+ X86ISD::VCVTNEBF162IUBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtnebf162iubs512, INTR_TYPE_1OP,
+ X86ISD::VCVTNEBF162IUBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvttnebf162ibs128, INTR_TYPE_1OP,
+ X86ISD::VCVTTNEBF162IBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvttnebf162ibs256, INTR_TYPE_1OP,
+ X86ISD::VCVTTNEBF162IBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvttnebf162ibs512, INTR_TYPE_1OP,
+ X86ISD::VCVTTNEBF162IBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvttnebf162iubs128, INTR_TYPE_1OP,
+ X86ISD::VCVTTNEBF162IUBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvttnebf162iubs256, INTR_TYPE_1OP,
+ X86ISD::VCVTTNEBF162IUBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvttnebf162iubs512, INTR_TYPE_1OP,
+ X86ISD::VCVTTNEBF162IUBS, 0),
X86_INTRINSIC_DATA(avx10_vdivpd256, INTR_TYPE_2OP, ISD::FDIV,
X86ISD::FDIV_RND),
X86_INTRINSIC_DATA(avx10_vdivph256, INTR_TYPE_2OP, ISD::FDIV,
diff --git a/llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
new file mode 100644
index 0000000000000..19860530c030a
--- /dev/null
+++ b/llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
@@ -0,0 +1,1003 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64 --show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc < %s -verify-machineinstrs -mtriple=i686 --show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=CHECK,X86
+
+define dso_local <8 x i64> @test_mm512_ipcvtnebf16_epi8(<32 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtnebf16_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtnebf162ibs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162ibs512(<32 x bfloat> %__A)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvtnebf16_epi8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvtnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162ibs512(<32 x bfloat> %__B)
+ %2 = bitcast i32 %__A to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %0
+ %4 = bitcast <32 x i16> %3 to <8 x i64>
+ ret <8 x i64> %4
+}
+
+declare <32 x i16> @llvm.x86.avx10.vcvtnebf162ibs512(<32 x bfloat>)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtnebf16_epi8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvtnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162ibs512(<32 x bfloat> %__B)
+ %1 = bitcast i32 %__A to <32 x i1>
+ %2 = select <32 x i1> %1, <32 x i16> %0, <32 x i16> zeroinitializer
+ %3 = bitcast <32 x i16> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvtnebf16_epu8(<32 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtnebf16_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtnebf162iubs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162iubs512(<32 x bfloat> %__A)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvtnebf16_epu8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvtnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162iubs512(<32 x bfloat> %__B)
+ %2 = bitcast i32 %__A to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %0
+ %4 = bitcast <32 x i16> %3 to <8 x i64>
+ ret <8 x i64> %4
+}
+
+declare <32 x i16> @llvm.x86.avx10.vcvtnebf162iubs512(<32 x bfloat>)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtnebf16_epu8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvtnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162iubs512(<32 x bfloat> %__B)
+ %1 = bitcast i32 %__A to <32 x i1>
+ %2 = select <32 x i1> %1, <32 x i16> %0, <32 x i16> zeroinitializer
+ %3 = bitcast <32 x i16> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvtph_epi8(<32 x half> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtph_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtph2ibs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7c,0x48,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2ibs512(<32 x half> %__A, <32 x i16> zeroinitializer, i32 -1, i32 4)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvtph_epi8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvtph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2ibs512(<32 x half> %__B, <32 x i16> %0, i32 %__A, i32 4)
+ %2 = bitcast <32 x i16> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+declare <32 x i16> @llvm.x86.avx10.mask.vcvtph2ibs512(<32 x half>, <32 x i16>, i32, i32)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtph_epi8(i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvtph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2ibs512(<32 x half> %__B, <32 x i16> zeroinitializer, i32 %__A, i32 4)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvt_roundph_epi8(<32 x half> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvt_roundph_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtph2ibs {rz-sae}, %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7c,0x78,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2ibs512(<32 x half> %__A, <32 x i16> zeroinitializer, i32 -1, i32 11)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvt_roundph_epi8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvt_roundph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2ibs {rz-sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x79,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvt_roundph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2ibs {rz-sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x79,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2ibs512(<32 x half> %__B, <32 x i16> %0, i32 %__A, i32 11)
+ %2 = bitcast <32 x i16> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvt_roundph_epi8(i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvt_roundph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2ibs {rz-sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xf9,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvt_roundph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2ibs {rz-sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xf9,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2ibs512(<32 x half> %__B, <32 x i16> zeroinitializer, i32 %__A, i32 11)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvtph_epu8(<32 x half> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtph_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtph2iubs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7c,0x48,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2iubs512(<32 x half> %__A, <32 x i16> zeroinitializer, i32 -1, i32 4)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvtph_epu8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvtph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2iubs512( <32 x half> %__B, <32 x i16> %0, i32 %__A, i32 4)
+ %2 = bitcast <32 x i16> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtph_epu8(i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvtph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2iubs512(<32 x half> %__B, <32 x i16> zeroinitializer, i32 %__A, i32 4)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvt_roundph_epu8(<32 x half> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvt_roundph_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtph2iubs {rz-sae}, %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7c,0x78,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2iubs512(<32 x half> %__A, <32 x i16> zeroinitializer, i32 -1, i32 11)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvt_roundph_epu8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvt_roundph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2iubs {rz-sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x79,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvt_roundph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2iubs {rz-sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x79,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2iubs512(<32 x half> %__B, <32 x i16> %0, i32 %__A, i32 11)
+ %2 = bitcast <32 x i16> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+declare <32 x i16> @llvm.x86.avx10.mask.vcvtph2iubs512(<32 x half>, <32 x i16>, i32, i32)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvt_roundph_epu8(i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvt_roundph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2iubs {rz-sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xf9,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvt_roundph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2iubs {rz-sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xf9,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvtph2iubs512(<32 x half> %__B, <32 x i16> zeroinitializer, i32 %__A, i32 11)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvtps_epi8(<16 x float> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtps_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtps2ibs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7d,0x48,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2ibs512(<16 x float> %__A, <16 x i32> zeroinitializer, i16 -1, i32 4)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvtps_epi8(<8 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvtps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <16 x i32>
+ %1 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2ibs512(<16 x float> %__B, <16 x i32> %0, i16 %__A, i32 4)
+ %2 = bitcast <16 x i32> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+declare <16 x i32> @llvm.x86.avx10.mask.vcvtps2ibs512(<16 x float>, <16 x i32>, i16, i32)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtps_epi8(i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvtps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2ibs512(<16 x float> %__B, <16 x i32> zeroinitializer, i16 %__A, i32 4)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvt_roundps_epi8(<16 x float> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvt_roundps_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtps2ibs {rz-sae}, %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7d,0x78,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2ibs512(<16 x float> %__A, <16 x i32> zeroinitializer, i16 -1, i32 11)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvt_roundps_epi8(<8 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvt_roundps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2ibs {rz-sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x79,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvt_roundps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2ibs {rz-sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x79,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <16 x i32>
+ %1 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2ibs512(<16 x float> %__B, <16 x i32> %0, i16 %__A, i32 11)
+ %2 = bitcast <16 x i32> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvt_roundps_epi8(i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvt_roundps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2ibs {rz-sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xf9,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvt_roundps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2ibs {rz-sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xf9,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2ibs512(<16 x float> %__B, <16 x i32> zeroinitializer, i16 %__A, i32 11)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvtps_epu8(<16 x float> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtps_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtps2iubs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7d,0x48,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2iubs512(<16 x float> %__A, <16 x i32> zeroinitializer, i16 -1, i32 4)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvtps_epu8(<8 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvtps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <16 x i32>
+ %1 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2iubs512(<16 x float> %__B, <16 x i32> %0, i16 %__A, i32 4)
+ %2 = bitcast <16 x i32> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtps_epu8(i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvtps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2iubs512(<16 x float> %__B, <16 x i32> zeroinitializer, i16 %__A, i32 4)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvt_roundps_epu8(<16 x float> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvt_roundps_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtps2iubs {rz-sae}, %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7d,0x78,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2iubs512(<16 x float> %__A, <16 x i32> zeroinitializer, i16 -1, i32 11)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvt_roundps_epu8(<8 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvt_roundps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2iubs {rz-sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x79,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvt_roundps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2iubs {rz-sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x79,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <16 x i32>
+ %1 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2iubs512(<16 x float> %__B, <16 x i32> %0, i16 %__A, i32 11)
+ %2 = bitcast <16 x i32> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+declare <16 x i32> @llvm.x86.avx10.mask.vcvtps2iubs512(<16 x float>, <16 x i32>, i16, i32)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvt_roundps_epu8(i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvt_roundps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2iubs {rz-sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xf9,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvt_roundps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2iubs {rz-sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xf9,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvtps2iubs512(<16 x float> %__B, <16 x i32> zeroinitializer, i16 %__A, i32 11)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvttnebf16_epi8(<32 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvttnebf16_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttnebf162ibs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162ibs512(<32 x bfloat> %__A)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvttnebf16_epi8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvttnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvttnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162ibs512(<32 x bfloat> %__B)
+ %2 = bitcast i32 %__A to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %0
+ %4 = bitcast <32 x i16> %3 to <8 x i64>
+ ret <8 x i64> %4
+}
+
+declare <32 x i16> @llvm.x86.avx10.vcvttnebf162ibs512(<32 x bfloat>)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvttnebf16_epi8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvttnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvttnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162ibs512(<32 x bfloat> %__B)
+ %1 = bitcast i32 %__A to <32 x i1>
+ %2 = select <32 x i1> %1, <32 x i16> %0, <32 x i16> zeroinitializer
+ %3 = bitcast <32 x i16> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvttnebf16_epu8(<32 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvttnebf16_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttnebf162iubs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162iubs512(<32 x bfloat> %__A)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvttnebf16_epu8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvttnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvttnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162iubs512(<32 x bfloat> %__B)
+ %2 = bitcast i32 %__A to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %0
+ %4 = bitcast <32 x i16> %3 to <8 x i64>
+ ret <8 x i64> %4
+}
+
+declare <32 x i16> @llvm.x86.avx10.vcvttnebf162iubs512(<32 x bfloat>)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvttnebf16_epu8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvttnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvttnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162iubs512(<32 x bfloat> %__B)
+ %1 = bitcast i32 %__A to <32 x i1>
+ %2 = select <32 x i1> %1, <32 x i16> %0, <32 x i16> zeroinitializer
+ %3 = bitcast <32 x i16> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvttph_epi8(<32 x half> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvttph_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttph2ibs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7c,0x48,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2ibs512(<32 x half> %__A, <32 x i16> zeroinitializer, i32 -1, i32 4)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvttph_epi8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvttph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvttph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2ibs512(<32 x half> %__B, <32 x i16> %0, i32 %__A, i32 4)
+ %2 = bitcast <32 x i16> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvttph_epi8(i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvttph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvttph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2ibs512(<32 x half> %__B, <32 x i16> zeroinitializer, i32 %__A, i32 4)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvtt_roundph_epi8(<32 x half> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtt_roundph_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttph2ibs {sae}, %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7c,0x18,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2ibs512(<32 x half> %__A, <32 x i16> zeroinitializer, i32 -1, i32 8)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvtt_roundph_epi8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtt_roundph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2ibs {sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x19,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvtt_roundph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2ibs {sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x19,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2ibs512(<32 x half> %__B, <32 x i16> %0, i32 %__A, i32 8)
+ %2 = bitcast <32 x i16> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+declare <32 x i16> @llvm.x86.avx10.mask.vcvttph2ibs512(<32 x half>, <32 x i16>, i32, i32)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtt_roundph_epi8(i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtt_roundph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2ibs {sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x99,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvtt_roundph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2ibs {sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x99,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2ibs512(<32 x half> %__B, <32 x i16> zeroinitializer, i32 %__A, i32 8)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvttph_epu8(<32 x half> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvttph_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttph2iubs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7c,0x48,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2iubs512(<32 x half> %__A, <32 x i16> zeroinitializer, i32 -1, i32 4)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvttph_epu8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvttph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvttph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x49,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2iubs512(<32 x half> %__B, <32 x i16> %0, i32 %__A, i32 4)
+ %2 = bitcast <32 x i16> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvttph_epu8(i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvttph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvttph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2iubs512(<32 x half> %__B, <32 x i16> zeroinitializer, i32 %__A, i32 4)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvtt_roundph_epu8(<32 x half> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtt_roundph_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttph2iubs {sae}, %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7c,0x18,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2iubs512(<32 x half> %__A, <32 x i16> zeroinitializer, i32 -1, i32 8)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvtt_roundph_epu8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtt_roundph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2iubs {sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x19,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvtt_roundph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2iubs {sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x19,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <32 x i16>
+ %1 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2iubs512(<32 x half> %__B, <32 x i16> %0, i32 %__A, i32 8)
+ %2 = bitcast <32 x i16> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+declare <32 x i16> @llvm.x86.avx10.mask.vcvttph2iubs512(<32 x half>, <32 x i16>, i32, i32)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtt_roundph_epu8(i32 noundef %__A, <32 x half> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtt_roundph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2iubs {sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x99,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvtt_roundph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2iubs {sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x99,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx10.mask.vcvttph2iubs512(<32 x half> %__B, <32 x i16> zeroinitializer, i32 %__A, i32 8)
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvttps_epi8(<16 x float> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvttps_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttps2ibs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7d,0x48,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2ibs512(<16 x float> %__A, <16 x i32> zeroinitializer, i16 -1, i32 4)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvttps_epi8(<8 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvttps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvttps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <16 x i32>
+ %1 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2ibs512(<16 x float> %__B, <16 x i32> %0, i16 %__A, i32 4)
+ %2 = bitcast <16 x i32> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvttps_epi8(i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvttps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvttps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2ibs512(<16 x float> %__B, <16 x i32> zeroinitializer, i16 %__A, i32 4)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvtt_roundps_epi8(<16 x float> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtt_roundps_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttps2ibs {sae}, %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7d,0x18,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2ibs512(<16 x float> %__A, <16 x i32> zeroinitializer, i16 -1, i32 8)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvtt_roundps_epi8(<8 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtt_roundps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2ibs {sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x19,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvtt_roundps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2ibs {sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x19,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <16 x i32>
+ %1 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2ibs512(<16 x float> %__B, <16 x i32> %0, i16 %__A, i32 8)
+ %2 = bitcast <16 x i32> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+declare <16 x i32> @llvm.x86.avx10.mask.vcvttps2ibs512(<16 x float>, <16 x i32>, i16, i32)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtt_roundps_epi8(i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtt_roundps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2ibs {sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x99,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvtt_roundps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2ibs {sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x99,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2ibs512(<16 x float> %__B, <16 x i32> zeroinitializer, i16 %__A, i32 8)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvttps_epu8(<16 x float> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvttps_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttps2iubs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7d,0x48,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2iubs512(<16 x float> %__A, <16 x i32> zeroinitializer, i16 -1, i32 4)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvttps_epu8(<8 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvttps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvttps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x49,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <16 x i32>
+ %1 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2iubs512(<16 x float> %__B, <16 x i32> %0, i16 %__A, i32 4)
+ %2 = bitcast <16 x i32> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvttps_epu8(i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvttps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvttps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xc9,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2iubs512(<16 x float> %__B, <16 x i32> zeroinitializer, i16 %__A, i32 4)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_ipcvtt_roundps_epu8(<16 x float> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtt_roundps_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttps2iubs {sae}, %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7d,0x18,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2iubs512(<16 x float> %__A, <16 x i32> zeroinitializer, i16 -1, i32 8)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define dso_local <8 x i64> @test_mm512_mask_ipcvtt_roundps_epu8(<8 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtt_roundps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2iubs {sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x19,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_mask_ipcvtt_roundps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2iubs {sae}, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x19,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <8 x i64> %__S to <16 x i32>
+ %1 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2iubs512(<16 x float> %__B, <16 x i32> %0, i16 %__A, i32 8)
+ %2 = bitcast <16 x i32> %1 to <8 x i64>
+ ret <8 x i64> %2
+}
+
+declare <16 x i32> @llvm.x86.avx10.mask.vcvttps2iubs512(<16 x float>, <16 x i32>, i16, i32)
+
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtt_roundps_epu8(i16 noundef zeroext %__A, <16 x float> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtt_roundps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2iubs {sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x99,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm512_maskz_ipcvtt_roundps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2iubs {sae}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x99,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i32> @llvm.x86.avx10.mask.vcvttps2iubs512(<16 x float> %__B, <16 x i32> zeroinitializer, i16 %__A, i32 8)
+ %1 = bitcast <16 x i32> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
diff --git a/llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
new file mode 100644
index 0000000000000..e16aa9d2de319
--- /dev/null
+++ b/llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
@@ -0,0 +1,1618 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64 --show-mc-encoding -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc < %s -verify-machineinstrs -mtriple=i686 --show-mc-encoding -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=CHECK,X86
+
+define dso_local <2 x i64> @test_mm_ipcvtnebf16_epi8(<8 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvtnebf16_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtnebf162ibs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162ibs128(<8 x bfloat> %__A)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvtnebf16_epi8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvtnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvtnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <8 x i16>
+ %1 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162ibs128(<8 x bfloat> %__B)
+ %2 = bitcast i8 %__A to <8 x i1>
+ %3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %0
+ %4 = bitcast <8 x i16> %3 to <2 x i64>
+ ret <2 x i64> %4
+}
+
+declare <8 x i16> @llvm.x86.avx10.vcvtnebf162ibs128(<8 x bfloat>)
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvtnebf16_epi8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvtnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvtnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162ibs128(<8 x bfloat> %__B)
+ %1 = bitcast i8 %__A to <8 x i1>
+ %2 = select <8 x i1> %1, <8 x i16> %0, <8 x i16> zeroinitializer
+ %3 = bitcast <8 x i16> %2 to <2 x i64>
+ ret <2 x i64> %3
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvtnebf16_epi8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvtnebf16_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtnebf162ibs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162ibs256(<16 x bfloat> %__A)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvtnebf16_epi8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvtnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvtnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162ibs256(<16 x bfloat> %__B)
+ %2 = bitcast i16 %__A to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %0
+ %4 = bitcast <16 x i16> %3 to <4 x i64>
+ ret <4 x i64> %4
+}
+
+declare <16 x i16> @llvm.x86.avx10.vcvtnebf162ibs256(<16 x bfloat>)
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtnebf16_epi8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvtnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvtnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162ibs256(<16 x bfloat> %__B)
+ %1 = bitcast i16 %__A to <16 x i1>
+ %2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer
+ %3 = bitcast <16 x i16> %2 to <4 x i64>
+ ret <4 x i64> %3
+}
+
+define dso_local <2 x i64> @test_mm_ipcvtnebf16_epu8(<8 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvtnebf16_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtnebf162iubs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162iubs128(<8 x bfloat> %__A)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvtnebf16_epu8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvtnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvtnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <8 x i16>
+ %1 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162iubs128(<8 x bfloat> %__B)
+ %2 = bitcast i8 %__A to <8 x i1>
+ %3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %0
+ %4 = bitcast <8 x i16> %3 to <2 x i64>
+ ret <2 x i64> %4
+}
+
+declare <8 x i16> @llvm.x86.avx10.vcvtnebf162iubs128(<8 x bfloat>)
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvtnebf16_epu8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvtnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvtnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162iubs128(<8 x bfloat> %__B)
+ %1 = bitcast i8 %__A to <8 x i1>
+ %2 = select <8 x i1> %1, <8 x i16> %0, <8 x i16> zeroinitializer
+ %3 = bitcast <8 x i16> %2 to <2 x i64>
+ ret <2 x i64> %3
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvtnebf16_epu8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvtnebf16_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtnebf162iubs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162iubs256(<16 x bfloat> %__A)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvtnebf16_epu8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvtnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvtnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162iubs256(<16 x bfloat> %__B)
+ %2 = bitcast i16 %__A to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %0
+ %4 = bitcast <16 x i16> %3 to <4 x i64>
+ ret <4 x i64> %4
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtnebf16_epu8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvtnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtnebf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvtnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtnebf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162iubs256(<16 x bfloat> %__B)
+ %1 = bitcast i16 %__A to <16 x i1>
+ %2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer
+ %3 = bitcast <16 x i16> %2 to <4 x i64>
+ ret <4 x i64> %3
+}
+
+declare <16 x i16> @llvm.x86.avx10.vcvtnebf162iubs256(<16 x bfloat>)
+
+define dso_local <2 x i64> @test_mm_ipcvtph_epi8(<8 x half> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvtph_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtph2ibs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x08,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvtph2ibs128(<8 x half> %__A, <8 x i16> zeroinitializer, i8 -1)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvtph_epi8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x half> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvtph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2ibs %xmm1, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvtph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2ibs %xmm1, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <8 x i16>
+ %1 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvtph2ibs128(<8 x half> %__B, <8 x i16> zeroinitializer, i8 %__A)
+ %2 = bitcast <8 x i16> %1 to <2 x i64>
+ ret <2 x i64> %2
+}
+
+declare <8 x i16> @llvm.x86.avx10.mask.vcvtph2ibs128(<8 x half>, <8 x i16>, i8)
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvtph_epi8(i8 noundef zeroext %__A, <8 x half> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvtph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvtph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvtph2ibs128(<8 x half> %__B, <8 x i16> zeroinitializer, i8 %__A)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvtph_epi8(<16 x half> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvtph_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtph2ibs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7c,0x28,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2ibs256(<16 x half> %__A, <16 x i16> zeroinitializer, i16 -1, i32 4)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvtph_epi8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x half> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvtph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvtph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2ibs256(<16 x half> %__B, <16 x i16> %0, i16 %__A, i32 4)
+ %2 = bitcast <16 x i16> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtph_epi8(i16 noundef zeroext %__A, <16 x half> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvtph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvtph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2ibs256(<16 x half> %__B, <16 x i16> zeroinitializer, i16 %__A, i32 4)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvtph_epi8_round(<16 x half> noundef %__A) {
+; CHECK-LABEL: test_mm256_ipcvtph_epi8_round:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtph2ibs {rz-sae}, %ymm0, %ymm0 # encoding: [0x62,0xf5,0x78,0x78,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2ibs256(<16 x half> %__A, <16 x i16> zeroinitializer, i16 -1, i32 11)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvtph_epi8_round(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x half> noundef %__B) {
+; X64-LABEL: test_mm256_mask_ipcvtph_epi8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2ibs {rz-sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x78,0x79,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvtph_epi8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2ibs {rz-sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x78,0x79,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2ibs256(<16 x half> %__B, <16 x i16> %0, i16 %__A, i32 11)
+ %2 = bitcast <16 x i16> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtph_epi8_round(i16 noundef zeroext %__A, <16 x half> noundef %__B) {
+; X64-LABEL: test_mm256_maskz_ipcvtph_epi8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2ibs {rz-sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x78,0xf9,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvtph_epi8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2ibs {rz-sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x78,0xf9,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2ibs256(<16 x half> %__B, <16 x i16> zeroinitializer, i16 %__A, i32 11)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+declare <16 x i16> @llvm.x86.avx10.mask.vcvtph2ibs256(<16 x half>, <16 x i16>, i16, i32)
+
+define dso_local <2 x i64> @test_mm_ipcvtph_epu8(<8 x half> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvtph_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtph2iubs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x08,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvtph2iubs128(<8 x half> %__A, <8 x i16> zeroinitializer, i8 -1)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvtph_epu8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x half> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvtph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x09,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvtph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x09,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <8 x i16>
+ %1 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvtph2iubs128(<8 x half> %__B, <8 x i16> %0, i8 %__A)
+ %2 = bitcast <8 x i16> %1 to <2 x i64>
+ ret <2 x i64> %2
+}
+
+declare <8 x i16> @llvm.x86.avx10.mask.vcvtph2iubs128(<8 x half>, <8 x i16>, i8)
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvtph_epu8(i8 noundef zeroext %__A, <8 x half> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvtph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvtph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvtph2iubs128(<8 x half> %__B, <8 x i16> zeroinitializer, i8 %__A)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvtph_epu8(<16 x half> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvtph_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtph2iubs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7c,0x28,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2iubs256(<16 x half> %__A, <16 x i16> zeroinitializer, i16 -1, i32 4)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvtph_epu8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x half> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvtph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvtph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2iubs256(<16 x half> %__B, <16 x i16> %0, i16 %__A, i32 4)
+ %2 = bitcast <16 x i16> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtph_epu8(i16 noundef zeroext %__A, <16 x half> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvtph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvtph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2iubs256(<16 x half> %__B, <16 x i16> zeroinitializer, i16 %__A, i32 4)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvtph_epu8_round(<16 x half> noundef %__A) {
+; CHECK-LABEL: test_mm256_ipcvtph_epu8_round:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtph2iubs {rz-sae}, %ymm0, %ymm0 # encoding: [0x62,0xf5,0x78,0x78,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2iubs256(<16 x half> %__A, <16 x i16> zeroinitializer, i16 -1, i32 11)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvtph_epu8_round(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x half> noundef %__B) {
+; X64-LABEL: test_mm256_mask_ipcvtph_epu8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2iubs {rz-sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x78,0x79,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvtph_epu8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2iubs {rz-sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x78,0x79,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2iubs256(<16 x half> %__B, <16 x i16> %0, i16 %__A, i32 11)
+ %2 = bitcast <16 x i16> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtph_epu8_round(i16 noundef zeroext %__A, <16 x half> noundef %__B) {
+; X64-LABEL: test_mm256_maskz_ipcvtph_epu8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtph2iubs {rz-sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x78,0xf9,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvtph_epu8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtph2iubs {rz-sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x78,0xf9,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvtph2iubs256(<16 x half> %__B, <16 x i16> zeroinitializer, i16 %__A, i32 11)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+declare <16 x i16> @llvm.x86.avx10.mask.vcvtph2iubs256(<16 x half>, <16 x i16>, i16, i32)
+
+define dso_local <2 x i64> @test_mm_ipcvtps_epi8(<4 x float> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvtps_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtps2ibs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7d,0x08,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvtps2ibs128(<4 x float> %__A, <4 x i32> zeroinitializer, i8 -1)
+ %1 = bitcast <4 x i32> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvtps_epi8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <4 x float> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvtps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvtps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <4 x i32>
+ %1 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvtps2ibs128(<4 x float> %__B, <4 x i32> %0, i8 %__A)
+ %2 = bitcast <4 x i32> %1 to <2 x i64>
+ ret <2 x i64> %2
+}
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvtps_epi8(i8 noundef zeroext %__A, <4 x float> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvtps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvtps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvtps2ibs128(<4 x float> %__B, <4 x i32> zeroinitializer, i8 %__A)
+ %1 = bitcast <4 x i32> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+declare <4 x i32> @llvm.x86.avx10.mask.vcvtps2ibs128(<4 x float>, <4 x i32>, i8)
+
+define dso_local <4 x i64> @test_mm256_ipcvtps_epi8(<8 x float> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvtps_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtps2ibs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7d,0x28,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2ibs256(<8 x float> %__A, <8 x i32> zeroinitializer, i8 -1, i32 4)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvtps_epi8(<4 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x float> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvtps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x29,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvtps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x29,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <8 x i32>
+ %1 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2ibs256(<8 x float> %__B, <8 x i32> %0, i8 %__A, i32 4)
+ %2 = bitcast <8 x i32> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtps_epi8(i8 noundef zeroext %__A, <8 x float> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvtps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvtps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2ibs256(<8 x float> %__B, <8 x i32> zeroinitializer, i8 %__A, i32 4)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvtps_epi8_round(<8 x float> noundef %__A) {
+; CHECK-LABEL: test_mm256_ipcvtps_epi8_round:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtps2ibs {rz-sae}, %ymm0, %ymm0 # encoding: [0x62,0xf5,0x79,0x78,0x69,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2ibs256(<8 x float> %__A, <8 x i32> zeroinitializer, i8 -1, i32 11)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvtps_epi8_round(<4 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x float> noundef %__B) {
+; X64-LABEL: test_mm256_mask_ipcvtps_epi8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2ibs {rz-sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x79,0x79,0x69,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvtps_epi8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2ibs {rz-sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x79,0x79,0x69,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <8 x i32>
+ %1 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2ibs256(<8 x float> %__B, <8 x i32> %0, i8 %__A, i32 11)
+ %2 = bitcast <8 x i32> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtps_epi8_round(i8 noundef zeroext %__A, <8 x float> noundef %__B) {
+; X64-LABEL: test_mm256_maskz_ipcvtps_epi8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2ibs {rz-sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x79,0xf9,0x69,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvtps_epi8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2ibs {rz-sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x79,0xf9,0x69,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2ibs256(<8 x float> %__B, <8 x i32> zeroinitializer, i8 %__A, i32 11)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+declare <8 x i32> @llvm.x86.avx10.mask.vcvtps2ibs256(<8 x float>, <8 x i32>, i8, i32)
+
+define dso_local <2 x i64> @test_mm_ipcvtps_epu8(<4 x float> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvtps_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtps2iubs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7d,0x08,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvtps2iubs128(<4 x float> %__A, <4 x i32> zeroinitializer, i8 -1)
+ %1 = bitcast <4 x i32> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvtps_epu8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <4 x float> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvtps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvtps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <4 x i32>
+ %1 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvtps2iubs128(<4 x float> %__B, <4 x i32> %0, i8 %__A)
+ %2 = bitcast <4 x i32> %1 to <2 x i64>
+ ret <2 x i64> %2
+}
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvtps_epu8(i8 noundef zeroext %__A, <4 x float> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvtps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvtps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvtps2iubs128(<4 x float> %__B, <4 x i32> zeroinitializer, i8 %__A)
+ %1 = bitcast <4 x i32> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+declare <4 x i32> @llvm.x86.avx10.mask.vcvtps2iubs128(<4 x float>, <4 x i32>, i8)
+
+define dso_local <4 x i64> @test_mm256_ipcvtps_epu8(<8 x float> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvtps_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtps2iubs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7d,0x28,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2iubs256(<8 x float> %__A, <8 x i32> zeroinitializer, i8 -1, i32 4)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvtps_epu8(<4 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x float> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvtps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x29,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvtps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x29,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <8 x i32>
+ %1 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2iubs256(<8 x float> %__B, <8 x i32> %0, i8 %__A, i32 4)
+ %2 = bitcast <8 x i32> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtps_epu8(i8 noundef zeroext %__A, <8 x float> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvtps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvtps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2iubs256(<8 x float> %__B, <8 x i32> zeroinitializer, i8 %__A, i32 4)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvtps_epu8_round(<8 x float> noundef %__A) {
+; CHECK-LABEL: test_mm256_ipcvtps_epu8_round:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtps2iubs {rz-sae}, %ymm0, %ymm0 # encoding: [0x62,0xf5,0x79,0x78,0x6b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2iubs256(<8 x float> %__A, <8 x i32> zeroinitializer, i8 -1, i32 11)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvtps_epu8_round(<4 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x float> noundef %__B) {
+; X64-LABEL: test_mm256_mask_ipcvtps_epu8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2iubs {rz-sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x79,0x79,0x6b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvtps_epu8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2iubs {rz-sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x79,0x79,0x6b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <8 x i32>
+ %1 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2iubs256(<8 x float> %__B, <8 x i32> %0, i8 %__A, i32 11)
+ %2 = bitcast <8 x i32> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtps_epu8_round(i8 noundef zeroext %__A, <8 x float> noundef %__B) {
+; X64-LABEL: test_mm256_maskz_ipcvtps_epu8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtps2iubs {rz-sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x79,0xf9,0x6b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvtps_epu8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtps2iubs {rz-sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x79,0xf9,0x6b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvtps2iubs256(<8 x float> %__B, <8 x i32> zeroinitializer, i8 %__A, i32 11)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+declare <8 x i32> @llvm.x86.avx10.mask.vcvtps2iubs256(<8 x float>, <8 x i32>, i8, i32)
+
+define dso_local <2 x i64> @test_mm_ipcvttnebf16_epi8(<8 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvttnebf16_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttnebf162ibs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162ibs128(<8 x bfloat> %__A)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvttnebf16_epi8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvttnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvttnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <8 x i16>
+ %1 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162ibs128(<8 x bfloat> %__B)
+ %2 = bitcast i8 %__A to <8 x i1>
+ %3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %0
+ %4 = bitcast <8 x i16> %3 to <2 x i64>
+ ret <2 x i64> %4
+}
+
+declare <8 x i16> @llvm.x86.avx10.vcvttnebf162ibs128(<8 x bfloat>)
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvttnebf16_epi8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvttnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvttnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162ibs128(<8 x bfloat> %__B)
+ %1 = bitcast i8 %__A to <8 x i1>
+ %2 = select <8 x i1> %1, <8 x i16> %0, <8 x i16> zeroinitializer
+ %3 = bitcast <8 x i16> %2 to <2 x i64>
+ ret <2 x i64> %3
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvttnebf16_epi8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvttnebf16_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttnebf162ibs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162ibs256(<16 x bfloat> %__A)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvttnebf16_epi8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvttnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvttnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162ibs256(<16 x bfloat> %__B)
+ %2 = bitcast i16 %__A to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %0
+ %4 = bitcast <16 x i16> %3 to <4 x i64>
+ ret <4 x i64> %4
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttnebf16_epi8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvttnebf16_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvttnebf16_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162ibs256(<16 x bfloat> %__B)
+ %1 = bitcast i16 %__A to <16 x i1>
+ %2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer
+ %3 = bitcast <16 x i16> %2 to <4 x i64>
+ ret <4 x i64> %3
+}
+
+declare <16 x i16> @llvm.x86.avx10.vcvttnebf162ibs256(<16 x bfloat>)
+
+define dso_local <2 x i64> @test_mm_ipcvttnebf16_epu8(<8 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvttnebf16_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttnebf162iubs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162iubs128(<8 x bfloat> %__A)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvttnebf16_epu8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvttnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvttnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <8 x i16>
+ %1 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162iubs128(<8 x bfloat> %__B)
+ %2 = bitcast i8 %__A to <8 x i1>
+ %3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %0
+ %4 = bitcast <8 x i16> %3 to <2 x i64>
+ ret <2 x i64> %4
+}
+
+declare <8 x i16> @llvm.x86.avx10.vcvttnebf162iubs128(<8 x bfloat>)
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvttnebf16_epu8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvttnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvttnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162iubs128(<8 x bfloat> %__B)
+ %1 = bitcast i8 %__A to <8 x i1>
+ %2 = select <8 x i1> %1, <8 x i16> %0, <8 x i16> zeroinitializer
+ %3 = bitcast <8 x i16> %2 to <2 x i64>
+ ret <2 x i64> %3
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvttnebf16_epu8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvttnebf16_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttnebf162iubs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162iubs256(<16 x bfloat> %__A)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvttnebf16_epu8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvttnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvttnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162iubs256(<16 x bfloat> %__B)
+ %2 = bitcast i16 %__A to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %0
+ %4 = bitcast <16 x i16> %3 to <4 x i64>
+ ret <4 x i64> %4
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttnebf16_epu8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvttnebf16_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttnebf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvttnebf16_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttnebf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162iubs256(<16 x bfloat> %__B)
+ %1 = bitcast i16 %__A to <16 x i1>
+ %2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer
+ %3 = bitcast <16 x i16> %2 to <4 x i64>
+ ret <4 x i64> %3
+}
+
+declare <16 x i16> @llvm.x86.avx10.vcvttnebf162iubs256(<16 x bfloat>)
+
+define dso_local <2 x i64> @test_mm_ipcvttph_epi8(<8 x half> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvttph_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttph2ibs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x08,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvttph2ibs128(<8 x half> %__A, <8 x i16> zeroinitializer, i8 -1)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvttph_epi8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x half> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvttph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x09,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvttph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x09,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <8 x i16>
+ %1 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvttph2ibs128(<8 x half> %__B, <8 x i16> %0, i8 %__A)
+ %2 = bitcast <8 x i16> %1 to <2 x i64>
+ ret <2 x i64> %2
+}
+
+declare <8 x i16> @llvm.x86.avx10.mask.vcvttph2ibs128(<8 x half>, <8 x i16>, i8)
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvttph_epi8(i8 noundef zeroext %__A, <8 x half> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvttph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvttph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvttph2ibs128(<8 x half> %__B, <8 x i16> zeroinitializer, i8 %__A)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvttph_epi8(<16 x half> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvttph_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttph2ibs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7c,0x28,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2ibs256(<16 x half> %__A, <16 x i16> zeroinitializer, i16 -1, i32 4)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvttph_epi8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x half> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvttph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvttph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2ibs256(<16 x half> %__B, <16 x i16> %0, i16 %__A, i32 4)
+ %2 = bitcast <16 x i16> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttph_epi8(i16 noundef zeroext %__A, <16 x half> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvttph_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvttph_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2ibs256(<16 x half> %__B, <16 x i16> zeroinitializer, i16 %__A, i32 4)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvttph_epi8_round(<16 x half> noundef %__A) {
+; CHECK-LABEL: test_mm256_ipcvttph_epi8_round:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttph2ibs {sae}, %ymm0, %ymm0 # encoding: [0x62,0xf5,0x78,0x18,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2ibs256(<16 x half> %__A, <16 x i16> zeroinitializer, i16 -1, i32 8)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvttph_epi8_round(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x half> noundef %__B) {
+; X64-LABEL: test_mm256_mask_ipcvttph_epi8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2ibs {sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x78,0x19,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvttph_epi8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2ibs {sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x78,0x19,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2ibs256(<16 x half> %__B, <16 x i16> %0, i16 %__A, i32 8)
+ %2 = bitcast <16 x i16> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttph_epi8_round(i16 noundef zeroext %__A, <16 x half> noundef %__B) {
+; X64-LABEL: test_mm256_maskz_ipcvttph_epi8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2ibs {sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x78,0x99,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvttph_epi8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2ibs {sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x78,0x99,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2ibs256(<16 x half> %__B, <16 x i16> zeroinitializer, i16 %__A, i32 8)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+declare <16 x i16> @llvm.x86.avx10.mask.vcvttph2ibs256(<16 x half>, <16 x i16>, i16, i32)
+
+define dso_local <2 x i64> @test_mm_ipcvttph_epu8(<8 x half> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvttph_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttph2iubs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x08,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvttph2iubs128(<8 x half> %__A, <8 x i16> zeroinitializer, i8 -1)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvttph_epu8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x half> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvttph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2iubs %xmm1, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvttph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2iubs %xmm1, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <8 x i16>
+ %1 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvttph2iubs128(<8 x half> %__B, <8 x i16> zeroinitializer, i8 %__A)
+ %2 = bitcast <8 x i16> %1 to <2 x i64>
+ ret <2 x i64> %2
+}
+
+declare <8 x i16> @llvm.x86.avx10.mask.vcvttph2iubs128(<8 x half>, <8 x i16>, i8)
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvttph_epu8(i8 noundef zeroext %__A, <8 x half> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvttph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvttph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx10.mask.vcvttph2iubs128(<8 x half> %__B, <8 x i16> zeroinitializer, i8 %__A)
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvttph_epu8(<16 x half> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvttph_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttph2iubs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7c,0x28,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2iubs256(<16 x half> %__A, <16 x i16> zeroinitializer, i16 -1, i32 4)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvttph_epu8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x half> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvttph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvttph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7c,0x29,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2iubs256(<16 x half> %__B, <16 x i16> %0, i16 %__A, i32 4)
+ %2 = bitcast <16 x i16> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttph_epu8(i16 noundef zeroext %__A, <16 x half> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvttph_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvttph_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2iubs256(<16 x half> %__B, <16 x i16> zeroinitializer, i16 %__A, i32 4)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvttph_epu8_round(<16 x half> noundef %__A) {
+; CHECK-LABEL: test_mm256_ipcvttph_epu8_round:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttph2iubs {sae}, %ymm0, %ymm0 # encoding: [0x62,0xf5,0x78,0x18,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2iubs256(<16 x half> %__A, <16 x i16> zeroinitializer, i16 -1, i32 8)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvttph_epu8_round(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x half> noundef %__B) {
+; X64-LABEL: test_mm256_mask_ipcvttph_epu8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2iubs {sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x78,0x19,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvttph_epu8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2iubs {sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x78,0x19,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <16 x i16>
+ %1 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2iubs256(<16 x half> %__B, <16 x i16> %0, i16 %__A, i32 8)
+ %2 = bitcast <16 x i16> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttph_epu8_round(i16 noundef zeroext %__A, <16 x half> noundef %__B) {
+; X64-LABEL: test_mm256_maskz_ipcvttph_epu8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttph2iubs {sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x78,0x99,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvttph_epu8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttph2iubs {sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x78,0x99,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx10.mask.vcvttph2iubs256(<16 x half> %__B, <16 x i16> zeroinitializer, i16 %__A, i32 8)
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+declare <16 x i16> @llvm.x86.avx10.mask.vcvttph2iubs256(<16 x half>, <16 x i16>, i16, i32)
+
+define dso_local <2 x i64> @test_mm_ipcvttps_epi8(<4 x float> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvttps_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttps2ibs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7d,0x08,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvttps2ibs128(<4 x float> %__A, <4 x i32> zeroinitializer, i8 -1)
+ %1 = bitcast <4 x i32> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvttps_epi8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <4 x float> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvttps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvttps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <4 x i32>
+ %1 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvttps2ibs128(<4 x float> %__B, <4 x i32> %0, i8 %__A)
+ %2 = bitcast <4 x i32> %1 to <2 x i64>
+ ret <2 x i64> %2
+}
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvttps_epi8(i8 noundef zeroext %__A, <4 x float> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvttps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvttps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvttps2ibs128(<4 x float> %__B, <4 x i32> zeroinitializer, i8 %__A)
+ %1 = bitcast <4 x i32> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+declare <4 x i32> @llvm.x86.avx10.mask.vcvttps2ibs128(<4 x float>, <4 x i32>, i8)
+
+define dso_local <4 x i64> @test_mm256_ipcvttps_epi8(<8 x float> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvttps_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttps2ibs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7d,0x28,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2ibs256(<8 x float> %__A, <8 x i32> zeroinitializer, i8 -1, i32 4)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvttps_epi8(<4 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x float> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvttps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x29,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvttps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x29,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <8 x i32>
+ %1 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2ibs256(<8 x float> %__B, <8 x i32> %0, i8 %__A, i32 4)
+ %2 = bitcast <8 x i32> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttps_epi8(i8 noundef zeroext %__A, <8 x float> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvttps_epi8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvttps_epi8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2ibs256(<8 x float> %__B, <8 x i32> zeroinitializer, i8 %__A, i32 4)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvttps_epi8_round(<8 x float> noundef %__A) {
+; CHECK-LABEL: test_mm256_ipcvttps_epi8_round:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttps2ibs {sae}, %ymm0, %ymm0 # encoding: [0x62,0xf5,0x79,0x18,0x68,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2ibs256(<8 x float> %__A, <8 x i32> zeroinitializer, i8 -1, i32 8)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvttps_epi8_round(<4 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x float> noundef %__B) {
+; X64-LABEL: test_mm256_mask_ipcvttps_epi8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2ibs {sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x79,0x19,0x68,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvttps_epi8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2ibs {sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x79,0x19,0x68,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <8 x i32>
+ %1 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2ibs256(<8 x float> %__B, <8 x i32> %0, i8 %__A, i32 8)
+ %2 = bitcast <8 x i32> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttps_epi8_round(i8 noundef zeroext %__A, <8 x float> noundef %__B) {
+; X64-LABEL: test_mm256_maskz_ipcvttps_epi8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2ibs {sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x79,0x99,0x68,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvttps_epi8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2ibs {sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x79,0x99,0x68,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2ibs256(<8 x float> %__B, <8 x i32> zeroinitializer, i8 %__A, i32 8)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+declare <8 x i32> @llvm.x86.avx10.mask.vcvttps2ibs256(<8 x float>, <8 x i32>, i8, i32)
+
+define dso_local <2 x i64> @test_mm_ipcvttps_epu8(<4 x float> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvttps_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttps2iubs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7d,0x08,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvttps2iubs128(<4 x float> %__A, <4 x i32> zeroinitializer, i8 -1)
+ %1 = bitcast <4 x i32> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define dso_local <2 x i64> @test_mm_mask_ipcvttps_epu8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <4 x float> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvttps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_mask_ipcvttps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x09,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <2 x i64> %__S to <4 x i32>
+ %1 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvttps2iubs128(<4 x float> %__B, <4 x i32> %0, i8 %__A)
+ %2 = bitcast <4 x i32> %1 to <2 x i64>
+ ret <2 x i64> %2
+}
+
+define dso_local <2 x i64> @test_mm_maskz_ipcvttps_epu8(i8 noundef zeroext %__A, <4 x float> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvttps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm_maskz_ipcvttps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0x89,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <4 x i32> @llvm.x86.avx10.mask.vcvttps2iubs128(<4 x float> %__B, <4 x i32> zeroinitializer, i8 %__A)
+ %1 = bitcast <4 x i32> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+declare <4 x i32> @llvm.x86.avx10.mask.vcvttps2iubs128(<4 x float>, <4 x i32>, i8)
+
+define dso_local <4 x i64> @test_mm256_ipcvttps_epu8(<8 x float> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvttps_epu8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttps2iubs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7d,0x28,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2iubs256(<8 x float> %__A, <8 x i32> zeroinitializer, i8 -1, i32 4)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvttps_epu8(<4 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x float> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvttps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x29,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvttps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7d,0x29,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <8 x i32>
+ %1 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2iubs256(<8 x float> %__B, <8 x i32> %0, i8 %__A, i32 4)
+ %2 = bitcast <8 x i32> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttps_epu8(i8 noundef zeroext %__A, <8 x float> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvttps_epu8:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvttps_epu8:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7d,0xa9,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2iubs256(<8 x float> %__B, <8 x i32> zeroinitializer, i8 %__A, i32 4)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_ipcvttps_epu8_round(<8 x float> noundef %__A) {
+; CHECK-LABEL: test_mm256_ipcvttps_epu8_round:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvttps2iubs {sae}, %ymm0, %ymm0 # encoding: [0x62,0xf5,0x79,0x18,0x6a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2iubs256(<8 x float> %__A, <8 x i32> zeroinitializer, i8 -1, i32 8)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define dso_local <4 x i64> @test_mm256_mask_ipcvttps_epu8_round(<4 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x float> noundef %__B) {
+; X64-LABEL: test_mm256_mask_ipcvttps_epu8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2iubs {sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x79,0x19,0x6a,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_mask_ipcvttps_epu8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2iubs {sae}, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x79,0x19,0x6a,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = bitcast <4 x i64> %__S to <8 x i32>
+ %1 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2iubs256(<8 x float> %__B, <8 x i32> %0, i8 %__A, i32 8)
+ %2 = bitcast <8 x i32> %1 to <4 x i64>
+ ret <4 x i64> %2
+}
+
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttps_epu8_round(i8 noundef zeroext %__A, <8 x float> noundef %__B) {
+; X64-LABEL: test_mm256_maskz_ipcvttps_epu8_round:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvttps2iubs {sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x79,0x99,0x6a,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_mm256_maskz_ipcvttps_epu8_round:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvttps2iubs {sae}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x79,0x99,0x6a,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i32> @llvm.x86.avx10.mask.vcvttps2iubs256(<8 x float> %__B, <8 x i32> zeroinitializer, i8 %__A, i32 8)
+ %1 = bitcast <8 x i32> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+declare <8 x i32> @llvm.x86.avx10.mask.vcvttps2iubs256(<8 x float>, <8 x i32>, i8, i32)
diff --git a/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt b/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
new file mode 100644
index 0000000000000..67e8f36fa1241
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
@@ -0,0 +1,1363 @@
+# RUN: llvm-mc --disassemble %s -triple=i386 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=i386 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT: vcvtnebf162ibs %xmm3, %xmm2
+# INTEL: vcvtnebf162ibs xmm2, xmm3
+0x62,0xf5,0x7f,0x08,0x69,0xd3
+
+# ATT: vcvtnebf162ibs %xmm3, %xmm2 {%k7}
+# INTEL: vcvtnebf162ibs xmm2 {k7}, xmm3
+0x62,0xf5,0x7f,0x0f,0x69,0xd3
+
+# ATT: vcvtnebf162ibs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtnebf162ibs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7f,0x8f,0x69,0xd3
+
+# ATT: vcvtnebf162ibs %zmm3, %zmm2
+# INTEL: vcvtnebf162ibs zmm2, zmm3
+0x62,0xf5,0x7f,0x48,0x69,0xd3
+
+# ATT: vcvtnebf162ibs %zmm3, %zmm2 {%k7}
+# INTEL: vcvtnebf162ibs zmm2 {k7}, zmm3
+0x62,0xf5,0x7f,0x4f,0x69,0xd3
+
+# ATT: vcvtnebf162ibs %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtnebf162ibs zmm2 {k7} {z}, zmm3
+0x62,0xf5,0x7f,0xcf,0x69,0xd3
+
+# ATT: vcvtnebf162ibs %ymm3, %ymm2
+# INTEL: vcvtnebf162ibs ymm2, ymm3
+0x62,0xf5,0x7f,0x28,0x69,0xd3
+
+# ATT: vcvtnebf162ibs %ymm3, %ymm2 {%k7}
+# INTEL: vcvtnebf162ibs ymm2 {k7}, ymm3
+0x62,0xf5,0x7f,0x2f,0x69,0xd3
+
+# ATT: vcvtnebf162ibs %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtnebf162ibs ymm2 {k7} {z}, ymm3
+0x62,0xf5,0x7f,0xaf,0x69,0xd3
+
+# ATT: vcvtnebf162ibs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162ibs (%eax){1to8}, %xmm2
+# INTEL: vcvtnebf162ibs xmm2, word ptr [eax]{1to8}
+0x62,0xf5,0x7f,0x18,0x69,0x10
+
+# ATT: vcvtnebf162ibs -512(,%ebp,2), %xmm2
+# INTEL: vcvtnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7f,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7f,0x8f,0x69,0x51,0x7f
+
+# ATT: vcvtnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvtnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x7f,0x9f,0x69,0x52,0x80
+
+# ATT: vcvtnebf162ibs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162ibs (%eax){1to16}, %ymm2
+# INTEL: vcvtnebf162ibs ymm2, word ptr [eax]{1to16}
+0x62,0xf5,0x7f,0x38,0x69,0x10
+
+# ATT: vcvtnebf162ibs -1024(,%ebp,2), %ymm2
+# INTEL: vcvtnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7f,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7f,0xaf,0x69,0x51,0x7f
+
+# ATT: vcvtnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvtnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x7f,0xbf,0x69,0x52,0x80
+
+# ATT: vcvtnebf162ibs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvtnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvtnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162ibs (%eax){1to32}, %zmm2
+# INTEL: vcvtnebf162ibs zmm2, word ptr [eax]{1to32}
+0x62,0xf5,0x7f,0x58,0x69,0x10
+
+# ATT: vcvtnebf162ibs -2048(,%ebp,2), %zmm2
+# INTEL: vcvtnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7f,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvtnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7f,0xcf,0x69,0x51,0x7f
+
+# ATT: vcvtnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvtnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x7f,0xdf,0x69,0x52,0x80
+
+# ATT: vcvtnebf162iubs %xmm3, %xmm2
+# INTEL: vcvtnebf162iubs xmm2, xmm3
+0x62,0xf5,0x7f,0x08,0x6b,0xd3
+
+# ATT: vcvtnebf162iubs %xmm3, %xmm2 {%k7}
+# INTEL: vcvtnebf162iubs xmm2 {k7}, xmm3
+0x62,0xf5,0x7f,0x0f,0x6b,0xd3
+
+# ATT: vcvtnebf162iubs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtnebf162iubs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7f,0x8f,0x6b,0xd3
+
+# ATT: vcvtnebf162iubs %zmm3, %zmm2
+# INTEL: vcvtnebf162iubs zmm2, zmm3
+0x62,0xf5,0x7f,0x48,0x6b,0xd3
+
+# ATT: vcvtnebf162iubs %zmm3, %zmm2 {%k7}
+# INTEL: vcvtnebf162iubs zmm2 {k7}, zmm3
+0x62,0xf5,0x7f,0x4f,0x6b,0xd3
+
+# ATT: vcvtnebf162iubs %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtnebf162iubs zmm2 {k7} {z}, zmm3
+0x62,0xf5,0x7f,0xcf,0x6b,0xd3
+
+# ATT: vcvtnebf162iubs %ymm3, %ymm2
+# INTEL: vcvtnebf162iubs ymm2, ymm3
+0x62,0xf5,0x7f,0x28,0x6b,0xd3
+
+# ATT: vcvtnebf162iubs %ymm3, %ymm2 {%k7}
+# INTEL: vcvtnebf162iubs ymm2 {k7}, ymm3
+0x62,0xf5,0x7f,0x2f,0x6b,0xd3
+
+# ATT: vcvtnebf162iubs %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtnebf162iubs ymm2 {k7} {z}, ymm3
+0x62,0xf5,0x7f,0xaf,0x6b,0xd3
+
+# ATT: vcvtnebf162iubs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162iubs (%eax){1to8}, %xmm2
+# INTEL: vcvtnebf162iubs xmm2, word ptr [eax]{1to8}
+0x62,0xf5,0x7f,0x18,0x6b,0x10
+
+# ATT: vcvtnebf162iubs -512(,%ebp,2), %xmm2
+# INTEL: vcvtnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7f,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7f,0x8f,0x6b,0x51,0x7f
+
+# ATT: vcvtnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvtnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x7f,0x9f,0x6b,0x52,0x80
+
+# ATT: vcvtnebf162iubs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162iubs (%eax){1to16}, %ymm2
+# INTEL: vcvtnebf162iubs ymm2, word ptr [eax]{1to16}
+0x62,0xf5,0x7f,0x38,0x6b,0x10
+
+# ATT: vcvtnebf162iubs -1024(,%ebp,2), %ymm2
+# INTEL: vcvtnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7f,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7f,0xaf,0x6b,0x51,0x7f
+
+# ATT: vcvtnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvtnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x7f,0xbf,0x6b,0x52,0x80
+
+# ATT: vcvtnebf162iubs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvtnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvtnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162iubs (%eax){1to32}, %zmm2
+# INTEL: vcvtnebf162iubs zmm2, word ptr [eax]{1to32}
+0x62,0xf5,0x7f,0x58,0x6b,0x10
+
+# ATT: vcvtnebf162iubs -2048(,%ebp,2), %zmm2
+# INTEL: vcvtnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7f,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvtnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7f,0xcf,0x6b,0x51,0x7f
+
+# ATT: vcvtnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvtnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x7f,0xdf,0x6b,0x52,0x80
+
+# ATT: vcvtph2ibs %xmm3, %xmm2
+# INTEL: vcvtph2ibs xmm2, xmm3
+0x62,0xf5,0x7c,0x08,0x69,0xd3
+
+# ATT: vcvtph2ibs %xmm3, %xmm2 {%k7}
+# INTEL: vcvtph2ibs xmm2 {k7}, xmm3
+0x62,0xf5,0x7c,0x0f,0x69,0xd3
+
+# ATT: vcvtph2ibs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtph2ibs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7c,0x8f,0x69,0xd3
+
+# ATT: vcvtph2ibs %zmm3, %zmm2
+# INTEL: vcvtph2ibs zmm2, zmm3
+0x62,0xf5,0x7c,0x48,0x69,0xd3
+
+# ATT: vcvtph2ibs {rn-sae}, %zmm3, %zmm2
+# INTEL: vcvtph2ibs zmm2, zmm3, {rn-sae}
+0x62,0xf5,0x7c,0x18,0x69,0xd3
+
+# ATT: vcvtph2ibs %zmm3, %zmm2 {%k7}
+# INTEL: vcvtph2ibs zmm2 {k7}, zmm3
+0x62,0xf5,0x7c,0x4f,0x69,0xd3
+
+# ATT: vcvtph2ibs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtph2ibs zmm2 {k7} {z}, zmm3, {rz-sae}
+0x62,0xf5,0x7c,0xff,0x69,0xd3
+
+# ATT: vcvtph2ibs %ymm3, %ymm2
+# INTEL: vcvtph2ibs ymm2, ymm3
+0x62,0xf5,0x7c,0x28,0x69,0xd3
+
+# ATT: vcvtph2ibs {rn-sae}, %ymm3, %ymm2
+# INTEL: vcvtph2ibs ymm2, ymm3, {rn-sae}
+0x62,0xf5,0x78,0x18,0x69,0xd3
+
+# ATT: vcvtph2ibs %ymm3, %ymm2 {%k7}
+# INTEL: vcvtph2ibs ymm2 {k7}, ymm3
+0x62,0xf5,0x7c,0x2f,0x69,0xd3
+
+# ATT: vcvtph2ibs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtph2ibs ymm2 {k7} {z}, ymm3, {rz-sae}
+0x62,0xf5,0x78,0xff,0x69,0xd3
+
+# ATT: vcvtph2ibs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtph2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtph2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2ibs (%eax){1to8}, %xmm2
+# INTEL: vcvtph2ibs xmm2, word ptr [eax]{1to8}
+0x62,0xf5,0x7c,0x18,0x69,0x10
+
+# ATT: vcvtph2ibs -512(,%ebp,2), %xmm2
+# INTEL: vcvtph2ibs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7c,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtph2ibs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtph2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7c,0x8f,0x69,0x51,0x7f
+
+# ATT: vcvtph2ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvtph2ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x7c,0x9f,0x69,0x52,0x80
+
+# ATT: vcvtph2ibs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtph2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtph2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2ibs (%eax){1to16}, %ymm2
+# INTEL: vcvtph2ibs ymm2, word ptr [eax]{1to16}
+0x62,0xf5,0x7c,0x38,0x69,0x10
+
+# ATT: vcvtph2ibs -1024(,%ebp,2), %ymm2
+# INTEL: vcvtph2ibs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7c,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtph2ibs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtph2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7c,0xaf,0x69,0x51,0x7f
+
+# ATT: vcvtph2ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvtph2ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x7c,0xbf,0x69,0x52,0x80
+
+# ATT: vcvtph2ibs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvtph2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvtph2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2ibs (%eax){1to32}, %zmm2
+# INTEL: vcvtph2ibs zmm2, word ptr [eax]{1to32}
+0x62,0xf5,0x7c,0x58,0x69,0x10
+
+# ATT: vcvtph2ibs -2048(,%ebp,2), %zmm2
+# INTEL: vcvtph2ibs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7c,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtph2ibs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvtph2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7c,0xcf,0x69,0x51,0x7f
+
+# ATT: vcvtph2ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvtph2ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x7c,0xdf,0x69,0x52,0x80
+
+# ATT: vcvtph2iubs %xmm3, %xmm2
+# INTEL: vcvtph2iubs xmm2, xmm3
+0x62,0xf5,0x7c,0x08,0x6b,0xd3
+
+# ATT: vcvtph2iubs %xmm3, %xmm2 {%k7}
+# INTEL: vcvtph2iubs xmm2 {k7}, xmm3
+0x62,0xf5,0x7c,0x0f,0x6b,0xd3
+
+# ATT: vcvtph2iubs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtph2iubs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7c,0x8f,0x6b,0xd3
+
+# ATT: vcvtph2iubs %zmm3, %zmm2
+# INTEL: vcvtph2iubs zmm2, zmm3
+0x62,0xf5,0x7c,0x48,0x6b,0xd3
+
+# ATT: vcvtph2iubs {rn-sae}, %zmm3, %zmm2
+# INTEL: vcvtph2iubs zmm2, zmm3, {rn-sae}
+0x62,0xf5,0x7c,0x18,0x6b,0xd3
+
+# ATT: vcvtph2iubs %zmm3, %zmm2 {%k7}
+# INTEL: vcvtph2iubs zmm2 {k7}, zmm3
+0x62,0xf5,0x7c,0x4f,0x6b,0xd3
+
+# ATT: vcvtph2iubs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtph2iubs zmm2 {k7} {z}, zmm3, {rz-sae}
+0x62,0xf5,0x7c,0xff,0x6b,0xd3
+
+# ATT: vcvtph2iubs %ymm3, %ymm2
+# INTEL: vcvtph2iubs ymm2, ymm3
+0x62,0xf5,0x7c,0x28,0x6b,0xd3
+
+# ATT: vcvtph2iubs {rn-sae}, %ymm3, %ymm2
+# INTEL: vcvtph2iubs ymm2, ymm3, {rn-sae}
+0x62,0xf5,0x78,0x18,0x6b,0xd3
+
+# ATT: vcvtph2iubs %ymm3, %ymm2 {%k7}
+# INTEL: vcvtph2iubs ymm2 {k7}, ymm3
+0x62,0xf5,0x7c,0x2f,0x6b,0xd3
+
+# ATT: vcvtph2iubs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtph2iubs ymm2 {k7} {z}, ymm3, {rz-sae}
+0x62,0xf5,0x78,0xff,0x6b,0xd3
+
+# ATT: vcvtph2iubs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtph2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtph2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2iubs (%eax){1to8}, %xmm2
+# INTEL: vcvtph2iubs xmm2, word ptr [eax]{1to8}
+0x62,0xf5,0x7c,0x18,0x6b,0x10
+
+# ATT: vcvtph2iubs -512(,%ebp,2), %xmm2
+# INTEL: vcvtph2iubs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7c,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtph2iubs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtph2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7c,0x8f,0x6b,0x51,0x7f
+
+# ATT: vcvtph2iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvtph2iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x7c,0x9f,0x6b,0x52,0x80
+
+# ATT: vcvtph2iubs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtph2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtph2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2iubs (%eax){1to16}, %ymm2
+# INTEL: vcvtph2iubs ymm2, word ptr [eax]{1to16}
+0x62,0xf5,0x7c,0x38,0x6b,0x10
+
+# ATT: vcvtph2iubs -1024(,%ebp,2), %ymm2
+# INTEL: vcvtph2iubs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7c,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtph2iubs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtph2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7c,0xaf,0x6b,0x51,0x7f
+
+# ATT: vcvtph2iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvtph2iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x7c,0xbf,0x6b,0x52,0x80
+
+# ATT: vcvtph2iubs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvtph2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvtph2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2iubs (%eax){1to32}, %zmm2
+# INTEL: vcvtph2iubs zmm2, word ptr [eax]{1to32}
+0x62,0xf5,0x7c,0x58,0x6b,0x10
+
+# ATT: vcvtph2iubs -2048(,%ebp,2), %zmm2
+# INTEL: vcvtph2iubs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7c,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtph2iubs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvtph2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7c,0xcf,0x6b,0x51,0x7f
+
+# ATT: vcvtph2iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvtph2iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x7c,0xdf,0x6b,0x52,0x80
+
+# ATT: vcvtps2ibs %xmm3, %xmm2
+# INTEL: vcvtps2ibs xmm2, xmm3
+0x62,0xf5,0x7d,0x08,0x69,0xd3
+
+# ATT: vcvtps2ibs %xmm3, %xmm2 {%k7}
+# INTEL: vcvtps2ibs xmm2 {k7}, xmm3
+0x62,0xf5,0x7d,0x0f,0x69,0xd3
+
+# ATT: vcvtps2ibs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtps2ibs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7d,0x8f,0x69,0xd3
+
+# ATT: vcvtps2ibs %zmm3, %zmm2
+# INTEL: vcvtps2ibs zmm2, zmm3
+0x62,0xf5,0x7d,0x48,0x69,0xd3
+
+# ATT: vcvtps2ibs {rn-sae}, %zmm3, %zmm2
+# INTEL: vcvtps2ibs zmm2, zmm3, {rn-sae}
+0x62,0xf5,0x7d,0x18,0x69,0xd3
+
+# ATT: vcvtps2ibs %zmm3, %zmm2 {%k7}
+# INTEL: vcvtps2ibs zmm2 {k7}, zmm3
+0x62,0xf5,0x7d,0x4f,0x69,0xd3
+
+# ATT: vcvtps2ibs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtps2ibs zmm2 {k7} {z}, zmm3, {rz-sae}
+0x62,0xf5,0x7d,0xff,0x69,0xd3
+
+# ATT: vcvtps2ibs %ymm3, %ymm2
+# INTEL: vcvtps2ibs ymm2, ymm3
+0x62,0xf5,0x7d,0x28,0x69,0xd3
+
+# ATT: vcvtps2ibs {rn-sae}, %ymm3, %ymm2
+# INTEL: vcvtps2ibs ymm2, ymm3, {rn-sae}
+0x62,0xf5,0x79,0x18,0x69,0xd3
+
+# ATT: vcvtps2ibs %ymm3, %ymm2 {%k7}
+# INTEL: vcvtps2ibs ymm2 {k7}, ymm3
+0x62,0xf5,0x7d,0x2f,0x69,0xd3
+
+# ATT: vcvtps2ibs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtps2ibs ymm2 {k7} {z}, ymm3, {rz-sae}
+0x62,0xf5,0x79,0xff,0x69,0xd3
+
+# ATT: vcvtps2ibs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtps2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtps2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2ibs (%eax){1to4}, %xmm2
+# INTEL: vcvtps2ibs xmm2, dword ptr [eax]{1to4}
+0x62,0xf5,0x7d,0x18,0x69,0x10
+
+# ATT: vcvtps2ibs -512(,%ebp,2), %xmm2
+# INTEL: vcvtps2ibs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7d,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtps2ibs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtps2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7d,0x8f,0x69,0x51,0x7f
+
+# ATT: vcvtps2ibs -512(%edx){1to4}, %xmm2 {%k7} {z}
+# INTEL: vcvtps2ibs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+0x62,0xf5,0x7d,0x9f,0x69,0x52,0x80
+
+# ATT: vcvtps2ibs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtps2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtps2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2ibs (%eax){1to8}, %ymm2
+# INTEL: vcvtps2ibs ymm2, dword ptr [eax]{1to8}
+0x62,0xf5,0x7d,0x38,0x69,0x10
+
+# ATT: vcvtps2ibs -1024(,%ebp,2), %ymm2
+# INTEL: vcvtps2ibs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7d,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtps2ibs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtps2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7d,0xaf,0x69,0x51,0x7f
+
+# ATT: vcvtps2ibs -512(%edx){1to8}, %ymm2 {%k7} {z}
+# INTEL: vcvtps2ibs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+0x62,0xf5,0x7d,0xbf,0x69,0x52,0x80
+
+# ATT: vcvtps2ibs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvtps2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvtps2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2ibs (%eax){1to16}, %zmm2
+# INTEL: vcvtps2ibs zmm2, dword ptr [eax]{1to16}
+0x62,0xf5,0x7d,0x58,0x69,0x10
+
+# ATT: vcvtps2ibs -2048(,%ebp,2), %zmm2
+# INTEL: vcvtps2ibs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7d,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtps2ibs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvtps2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7d,0xcf,0x69,0x51,0x7f
+
+# ATT: vcvtps2ibs -512(%edx){1to16}, %zmm2 {%k7} {z}
+# INTEL: vcvtps2ibs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+0x62,0xf5,0x7d,0xdf,0x69,0x52,0x80
+
+# ATT: vcvtps2iubs %xmm3, %xmm2
+# INTEL: vcvtps2iubs xmm2, xmm3
+0x62,0xf5,0x7d,0x08,0x6b,0xd3
+
+# ATT: vcvtps2iubs %xmm3, %xmm2 {%k7}
+# INTEL: vcvtps2iubs xmm2 {k7}, xmm3
+0x62,0xf5,0x7d,0x0f,0x6b,0xd3
+
+# ATT: vcvtps2iubs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtps2iubs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7d,0x8f,0x6b,0xd3
+
+# ATT: vcvtps2iubs %zmm3, %zmm2
+# INTEL: vcvtps2iubs zmm2, zmm3
+0x62,0xf5,0x7d,0x48,0x6b,0xd3
+
+# ATT: vcvtps2iubs {rn-sae}, %zmm3, %zmm2
+# INTEL: vcvtps2iubs zmm2, zmm3, {rn-sae}
+0x62,0xf5,0x7d,0x18,0x6b,0xd3
+
+# ATT: vcvtps2iubs %zmm3, %zmm2 {%k7}
+# INTEL: vcvtps2iubs zmm2 {k7}, zmm3
+0x62,0xf5,0x7d,0x4f,0x6b,0xd3
+
+# ATT: vcvtps2iubs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtps2iubs zmm2 {k7} {z}, zmm3, {rz-sae}
+0x62,0xf5,0x7d,0xff,0x6b,0xd3
+
+# ATT: vcvtps2iubs %ymm3, %ymm2
+# INTEL: vcvtps2iubs ymm2, ymm3
+0x62,0xf5,0x7d,0x28,0x6b,0xd3
+
+# ATT: vcvtps2iubs {rn-sae}, %ymm3, %ymm2
+# INTEL: vcvtps2iubs ymm2, ymm3, {rn-sae}
+0x62,0xf5,0x79,0x18,0x6b,0xd3
+
+# ATT: vcvtps2iubs %ymm3, %ymm2 {%k7}
+# INTEL: vcvtps2iubs ymm2 {k7}, ymm3
+0x62,0xf5,0x7d,0x2f,0x6b,0xd3
+
+# ATT: vcvtps2iubs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtps2iubs ymm2 {k7} {z}, ymm3, {rz-sae}
+0x62,0xf5,0x79,0xff,0x6b,0xd3
+
+# ATT: vcvtps2iubs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtps2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtps2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2iubs (%eax){1to4}, %xmm2
+# INTEL: vcvtps2iubs xmm2, dword ptr [eax]{1to4}
+0x62,0xf5,0x7d,0x18,0x6b,0x10
+
+# ATT: vcvtps2iubs -512(,%ebp,2), %xmm2
+# INTEL: vcvtps2iubs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7d,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtps2iubs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtps2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7d,0x8f,0x6b,0x51,0x7f
+
+# ATT: vcvtps2iubs -512(%edx){1to4}, %xmm2 {%k7} {z}
+# INTEL: vcvtps2iubs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+0x62,0xf5,0x7d,0x9f,0x6b,0x52,0x80
+
+# ATT: vcvtps2iubs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtps2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtps2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2iubs (%eax){1to8}, %ymm2
+# INTEL: vcvtps2iubs ymm2, dword ptr [eax]{1to8}
+0x62,0xf5,0x7d,0x38,0x6b,0x10
+
+# ATT: vcvtps2iubs -1024(,%ebp,2), %ymm2
+# INTEL: vcvtps2iubs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7d,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtps2iubs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtps2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7d,0xaf,0x6b,0x51,0x7f
+
+# ATT: vcvtps2iubs -512(%edx){1to8}, %ymm2 {%k7} {z}
+# INTEL: vcvtps2iubs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+0x62,0xf5,0x7d,0xbf,0x6b,0x52,0x80
+
+# ATT: vcvtps2iubs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvtps2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvtps2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2iubs (%eax){1to16}, %zmm2
+# INTEL: vcvtps2iubs zmm2, dword ptr [eax]{1to16}
+0x62,0xf5,0x7d,0x58,0x6b,0x10
+
+# ATT: vcvtps2iubs -2048(,%ebp,2), %zmm2
+# INTEL: vcvtps2iubs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7d,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtps2iubs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvtps2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7d,0xcf,0x6b,0x51,0x7f
+
+# ATT: vcvtps2iubs -512(%edx){1to16}, %zmm2 {%k7} {z}
+# INTEL: vcvtps2iubs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+0x62,0xf5,0x7d,0xdf,0x6b,0x52,0x80
+
+# ATT: vcvttnebf162ibs %xmm3, %xmm2
+# INTEL: vcvttnebf162ibs xmm2, xmm3
+0x62,0xf5,0x7f,0x08,0x68,0xd3
+
+# ATT: vcvttnebf162ibs %xmm3, %xmm2 {%k7}
+# INTEL: vcvttnebf162ibs xmm2 {k7}, xmm3
+0x62,0xf5,0x7f,0x0f,0x68,0xd3
+
+# ATT: vcvttnebf162ibs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvttnebf162ibs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7f,0x8f,0x68,0xd3
+
+# ATT: vcvttnebf162ibs %zmm3, %zmm2
+# INTEL: vcvttnebf162ibs zmm2, zmm3
+0x62,0xf5,0x7f,0x48,0x68,0xd3
+
+# ATT: vcvttnebf162ibs %zmm3, %zmm2 {%k7}
+# INTEL: vcvttnebf162ibs zmm2 {k7}, zmm3
+0x62,0xf5,0x7f,0x4f,0x68,0xd3
+
+# ATT: vcvttnebf162ibs %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvttnebf162ibs zmm2 {k7} {z}, zmm3
+0x62,0xf5,0x7f,0xcf,0x68,0xd3
+
+# ATT: vcvttnebf162ibs %ymm3, %ymm2
+# INTEL: vcvttnebf162ibs ymm2, ymm3
+0x62,0xf5,0x7f,0x28,0x68,0xd3
+
+# ATT: vcvttnebf162ibs %ymm3, %ymm2 {%k7}
+# INTEL: vcvttnebf162ibs ymm2 {k7}, ymm3
+0x62,0xf5,0x7f,0x2f,0x68,0xd3
+
+# ATT: vcvttnebf162ibs %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvttnebf162ibs ymm2 {k7} {z}, ymm3
+0x62,0xf5,0x7f,0xaf,0x68,0xd3
+
+# ATT: vcvttnebf162ibs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvttnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvttnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162ibs (%eax){1to8}, %xmm2
+# INTEL: vcvttnebf162ibs xmm2, word ptr [eax]{1to8}
+0x62,0xf5,0x7f,0x18,0x68,0x10
+
+# ATT: vcvttnebf162ibs -512(,%ebp,2), %xmm2
+# INTEL: vcvttnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7f,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvttnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7f,0x8f,0x68,0x51,0x7f
+
+# ATT: vcvttnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvttnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x7f,0x9f,0x68,0x52,0x80
+
+# ATT: vcvttnebf162ibs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvttnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvttnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162ibs (%eax){1to16}, %ymm2
+# INTEL: vcvttnebf162ibs ymm2, word ptr [eax]{1to16}
+0x62,0xf5,0x7f,0x38,0x68,0x10
+
+# ATT: vcvttnebf162ibs -1024(,%ebp,2), %ymm2
+# INTEL: vcvttnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7f,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvttnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7f,0xaf,0x68,0x51,0x7f
+
+# ATT: vcvttnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvttnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x7f,0xbf,0x68,0x52,0x80
+
+# ATT: vcvttnebf162ibs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvttnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvttnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162ibs (%eax){1to32}, %zmm2
+# INTEL: vcvttnebf162ibs zmm2, word ptr [eax]{1to32}
+0x62,0xf5,0x7f,0x58,0x68,0x10
+
+# ATT: vcvttnebf162ibs -2048(,%ebp,2), %zmm2
+# INTEL: vcvttnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7f,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvttnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7f,0xcf,0x68,0x51,0x7f
+
+# ATT: vcvttnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvttnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x7f,0xdf,0x68,0x52,0x80
+
+# ATT: vcvttnebf162iubs %xmm3, %xmm2
+# INTEL: vcvttnebf162iubs xmm2, xmm3
+0x62,0xf5,0x7f,0x08,0x6a,0xd3
+
+# ATT: vcvttnebf162iubs %xmm3, %xmm2 {%k7}
+# INTEL: vcvttnebf162iubs xmm2 {k7}, xmm3
+0x62,0xf5,0x7f,0x0f,0x6a,0xd3
+
+# ATT: vcvttnebf162iubs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvttnebf162iubs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7f,0x8f,0x6a,0xd3
+
+# ATT: vcvttnebf162iubs %zmm3, %zmm2
+# INTEL: vcvttnebf162iubs zmm2, zmm3
+0x62,0xf5,0x7f,0x48,0x6a,0xd3
+
+# ATT: vcvttnebf162iubs %zmm3, %zmm2 {%k7}
+# INTEL: vcvttnebf162iubs zmm2 {k7}, zmm3
+0x62,0xf5,0x7f,0x4f,0x6a,0xd3
+
+# ATT: vcvttnebf162iubs %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvttnebf162iubs zmm2 {k7} {z}, zmm3
+0x62,0xf5,0x7f,0xcf,0x6a,0xd3
+
+# ATT: vcvttnebf162iubs %ymm3, %ymm2
+# INTEL: vcvttnebf162iubs ymm2, ymm3
+0x62,0xf5,0x7f,0x28,0x6a,0xd3
+
+# ATT: vcvttnebf162iubs %ymm3, %ymm2 {%k7}
+# INTEL: vcvttnebf162iubs ymm2 {k7}, ymm3
+0x62,0xf5,0x7f,0x2f,0x6a,0xd3
+
+# ATT: vcvttnebf162iubs %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvttnebf162iubs ymm2 {k7} {z}, ymm3
+0x62,0xf5,0x7f,0xaf,0x6a,0xd3
+
+# ATT: vcvttnebf162iubs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvttnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvttnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162iubs (%eax){1to8}, %xmm2
+# INTEL: vcvttnebf162iubs xmm2, word ptr [eax]{1to8}
+0x62,0xf5,0x7f,0x18,0x6a,0x10
+
+# ATT: vcvttnebf162iubs -512(,%ebp,2), %xmm2
+# INTEL: vcvttnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7f,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvttnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7f,0x8f,0x6a,0x51,0x7f
+
+# ATT: vcvttnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvttnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x7f,0x9f,0x6a,0x52,0x80
+
+# ATT: vcvttnebf162iubs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvttnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvttnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162iubs (%eax){1to16}, %ymm2
+# INTEL: vcvttnebf162iubs ymm2, word ptr [eax]{1to16}
+0x62,0xf5,0x7f,0x38,0x6a,0x10
+
+# ATT: vcvttnebf162iubs -1024(,%ebp,2), %ymm2
+# INTEL: vcvttnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7f,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvttnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7f,0xaf,0x6a,0x51,0x7f
+
+# ATT: vcvttnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvttnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x7f,0xbf,0x6a,0x52,0x80
+
+# ATT: vcvttnebf162iubs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvttnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvttnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162iubs (%eax){1to32}, %zmm2
+# INTEL: vcvttnebf162iubs zmm2, word ptr [eax]{1to32}
+0x62,0xf5,0x7f,0x58,0x6a,0x10
+
+# ATT: vcvttnebf162iubs -2048(,%ebp,2), %zmm2
+# INTEL: vcvttnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7f,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvttnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7f,0xcf,0x6a,0x51,0x7f
+
+# ATT: vcvttnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvttnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x7f,0xdf,0x6a,0x52,0x80
+
+# ATT: vcvttph2ibs %xmm3, %xmm2
+# INTEL: vcvttph2ibs xmm2, xmm3
+0x62,0xf5,0x7c,0x08,0x68,0xd3
+
+# ATT: vcvttph2ibs %xmm3, %xmm2 {%k7}
+# INTEL: vcvttph2ibs xmm2 {k7}, xmm3
+0x62,0xf5,0x7c,0x0f,0x68,0xd3
+
+# ATT: vcvttph2ibs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvttph2ibs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7c,0x8f,0x68,0xd3
+
+# ATT: vcvttph2ibs %zmm3, %zmm2
+# INTEL: vcvttph2ibs zmm2, zmm3
+0x62,0xf5,0x7c,0x48,0x68,0xd3
+
+# ATT: vcvttph2ibs {sae}, %zmm3, %zmm2
+# INTEL: vcvttph2ibs zmm2, zmm3, {sae}
+0x62,0xf5,0x7c,0x18,0x68,0xd3
+
+# ATT: vcvttph2ibs %zmm3, %zmm2 {%k7}
+# INTEL: vcvttph2ibs zmm2 {k7}, zmm3
+0x62,0xf5,0x7c,0x4f,0x68,0xd3
+
+# ATT: vcvttph2ibs {sae}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvttph2ibs zmm2 {k7} {z}, zmm3, {sae}
+0x62,0xf5,0x7c,0x9f,0x68,0xd3
+
+# ATT: vcvttph2ibs %ymm3, %ymm2
+# INTEL: vcvttph2ibs ymm2, ymm3
+0x62,0xf5,0x7c,0x28,0x68,0xd3
+
+# ATT: vcvttph2ibs {sae}, %ymm3, %ymm2
+# INTEL: vcvttph2ibs ymm2, ymm3, {sae}
+0x62,0xf5,0x78,0x18,0x68,0xd3
+
+# ATT: vcvttph2ibs %ymm3, %ymm2 {%k7}
+# INTEL: vcvttph2ibs ymm2 {k7}, ymm3
+0x62,0xf5,0x7c,0x2f,0x68,0xd3
+
+# ATT: vcvttph2ibs {sae}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvttph2ibs ymm2 {k7} {z}, ymm3, {sae}
+0x62,0xf5,0x78,0x9f,0x68,0xd3
+
+# ATT: vcvttph2ibs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvttph2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvttph2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2ibs (%eax){1to8}, %xmm2
+# INTEL: vcvttph2ibs xmm2, word ptr [eax]{1to8}
+0x62,0xf5,0x7c,0x18,0x68,0x10
+
+# ATT: vcvttph2ibs -512(,%ebp,2), %xmm2
+# INTEL: vcvttph2ibs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7c,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttph2ibs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvttph2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7c,0x8f,0x68,0x51,0x7f
+
+# ATT: vcvttph2ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvttph2ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x7c,0x9f,0x68,0x52,0x80
+
+# ATT: vcvttph2ibs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvttph2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvttph2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2ibs (%eax){1to16}, %ymm2
+# INTEL: vcvttph2ibs ymm2, word ptr [eax]{1to16}
+0x62,0xf5,0x7c,0x38,0x68,0x10
+
+# ATT: vcvttph2ibs -1024(,%ebp,2), %ymm2
+# INTEL: vcvttph2ibs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7c,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttph2ibs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvttph2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7c,0xaf,0x68,0x51,0x7f
+
+# ATT: vcvttph2ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvttph2ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x7c,0xbf,0x68,0x52,0x80
+
+# ATT: vcvttph2ibs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvttph2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvttph2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2ibs (%eax){1to32}, %zmm2
+# INTEL: vcvttph2ibs zmm2, word ptr [eax]{1to32}
+0x62,0xf5,0x7c,0x58,0x68,0x10
+
+# ATT: vcvttph2ibs -2048(,%ebp,2), %zmm2
+# INTEL: vcvttph2ibs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7c,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttph2ibs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvttph2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7c,0xcf,0x68,0x51,0x7f
+
+# ATT: vcvttph2ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvttph2ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x7c,0xdf,0x68,0x52,0x80
+
+# ATT: vcvttph2iubs %xmm3, %xmm2
+# INTEL: vcvttph2iubs xmm2, xmm3
+0x62,0xf5,0x7c,0x08,0x6a,0xd3
+
+# ATT: vcvttph2iubs %xmm3, %xmm2 {%k7}
+# INTEL: vcvttph2iubs xmm2 {k7}, xmm3
+0x62,0xf5,0x7c,0x0f,0x6a,0xd3
+
+# ATT: vcvttph2iubs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvttph2iubs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7c,0x8f,0x6a,0xd3
+
+# ATT: vcvttph2iubs %zmm3, %zmm2
+# INTEL: vcvttph2iubs zmm2, zmm3
+0x62,0xf5,0x7c,0x48,0x6a,0xd3
+
+# ATT: vcvttph2iubs {sae}, %zmm3, %zmm2
+# INTEL: vcvttph2iubs zmm2, zmm3, {sae}
+0x62,0xf5,0x7c,0x18,0x6a,0xd3
+
+# ATT: vcvttph2iubs %zmm3, %zmm2 {%k7}
+# INTEL: vcvttph2iubs zmm2 {k7}, zmm3
+0x62,0xf5,0x7c,0x4f,0x6a,0xd3
+
+# ATT: vcvttph2iubs {sae}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvttph2iubs zmm2 {k7} {z}, zmm3, {sae}
+0x62,0xf5,0x7c,0x9f,0x6a,0xd3
+
+# ATT: vcvttph2iubs %ymm3, %ymm2
+# INTEL: vcvttph2iubs ymm2, ymm3
+0x62,0xf5,0x7c,0x28,0x6a,0xd3
+
+# ATT: vcvttph2iubs {sae}, %ymm3, %ymm2
+# INTEL: vcvttph2iubs ymm2, ymm3, {sae}
+0x62,0xf5,0x78,0x18,0x6a,0xd3
+
+# ATT: vcvttph2iubs %ymm3, %ymm2 {%k7}
+# INTEL: vcvttph2iubs ymm2 {k7}, ymm3
+0x62,0xf5,0x7c,0x2f,0x6a,0xd3
+
+# ATT: vcvttph2iubs {sae}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvttph2iubs ymm2 {k7} {z}, ymm3, {sae}
+0x62,0xf5,0x78,0x9f,0x6a,0xd3
+
+# ATT: vcvttph2iubs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvttph2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvttph2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2iubs (%eax){1to8}, %xmm2
+# INTEL: vcvttph2iubs xmm2, word ptr [eax]{1to8}
+0x62,0xf5,0x7c,0x18,0x6a,0x10
+
+# ATT: vcvttph2iubs -512(,%ebp,2), %xmm2
+# INTEL: vcvttph2iubs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7c,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttph2iubs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvttph2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7c,0x8f,0x6a,0x51,0x7f
+
+# ATT: vcvttph2iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvttph2iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x7c,0x9f,0x6a,0x52,0x80
+
+# ATT: vcvttph2iubs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvttph2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvttph2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2iubs (%eax){1to16}, %ymm2
+# INTEL: vcvttph2iubs ymm2, word ptr [eax]{1to16}
+0x62,0xf5,0x7c,0x38,0x6a,0x10
+
+# ATT: vcvttph2iubs -1024(,%ebp,2), %ymm2
+# INTEL: vcvttph2iubs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7c,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttph2iubs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvttph2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7c,0xaf,0x6a,0x51,0x7f
+
+# ATT: vcvttph2iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvttph2iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x7c,0xbf,0x6a,0x52,0x80
+
+# ATT: vcvttph2iubs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvttph2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7c,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvttph2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7c,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2iubs (%eax){1to32}, %zmm2
+# INTEL: vcvttph2iubs zmm2, word ptr [eax]{1to32}
+0x62,0xf5,0x7c,0x58,0x6a,0x10
+
+# ATT: vcvttph2iubs -2048(,%ebp,2), %zmm2
+# INTEL: vcvttph2iubs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7c,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttph2iubs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvttph2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7c,0xcf,0x6a,0x51,0x7f
+
+# ATT: vcvttph2iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvttph2iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x7c,0xdf,0x6a,0x52,0x80
+
+# ATT: vcvttps2ibs %xmm3, %xmm2
+# INTEL: vcvttps2ibs xmm2, xmm3
+0x62,0xf5,0x7d,0x08,0x68,0xd3
+
+# ATT: vcvttps2ibs %xmm3, %xmm2 {%k7}
+# INTEL: vcvttps2ibs xmm2 {k7}, xmm3
+0x62,0xf5,0x7d,0x0f,0x68,0xd3
+
+# ATT: vcvttps2ibs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvttps2ibs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7d,0x8f,0x68,0xd3
+
+# ATT: vcvttps2ibs %zmm3, %zmm2
+# INTEL: vcvttps2ibs zmm2, zmm3
+0x62,0xf5,0x7d,0x48,0x68,0xd3
+
+# ATT: vcvttps2ibs {sae}, %zmm3, %zmm2
+# INTEL: vcvttps2ibs zmm2, zmm3, {sae}
+0x62,0xf5,0x7d,0x18,0x68,0xd3
+
+# ATT: vcvttps2ibs %zmm3, %zmm2 {%k7}
+# INTEL: vcvttps2ibs zmm2 {k7}, zmm3
+0x62,0xf5,0x7d,0x4f,0x68,0xd3
+
+# ATT: vcvttps2ibs {sae}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvttps2ibs zmm2 {k7} {z}, zmm3, {sae}
+0x62,0xf5,0x7d,0x9f,0x68,0xd3
+
+# ATT: vcvttps2ibs %ymm3, %ymm2
+# INTEL: vcvttps2ibs ymm2, ymm3
+0x62,0xf5,0x7d,0x28,0x68,0xd3
+
+# ATT: vcvttps2ibs {sae}, %ymm3, %ymm2
+# INTEL: vcvttps2ibs ymm2, ymm3, {sae}
+0x62,0xf5,0x79,0x18,0x68,0xd3
+
+# ATT: vcvttps2ibs %ymm3, %ymm2 {%k7}
+# INTEL: vcvttps2ibs ymm2 {k7}, ymm3
+0x62,0xf5,0x7d,0x2f,0x68,0xd3
+
+# ATT: vcvttps2ibs {sae}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvttps2ibs ymm2 {k7} {z}, ymm3, {sae}
+0x62,0xf5,0x79,0x9f,0x68,0xd3
+
+# ATT: vcvttps2ibs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvttps2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvttps2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2ibs (%eax){1to4}, %xmm2
+# INTEL: vcvttps2ibs xmm2, dword ptr [eax]{1to4}
+0x62,0xf5,0x7d,0x18,0x68,0x10
+
+# ATT: vcvttps2ibs -512(,%ebp,2), %xmm2
+# INTEL: vcvttps2ibs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7d,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttps2ibs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvttps2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7d,0x8f,0x68,0x51,0x7f
+
+# ATT: vcvttps2ibs -512(%edx){1to4}, %xmm2 {%k7} {z}
+# INTEL: vcvttps2ibs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+0x62,0xf5,0x7d,0x9f,0x68,0x52,0x80
+
+# ATT: vcvttps2ibs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvttps2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvttps2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2ibs (%eax){1to8}, %ymm2
+# INTEL: vcvttps2ibs ymm2, dword ptr [eax]{1to8}
+0x62,0xf5,0x7d,0x38,0x68,0x10
+
+# ATT: vcvttps2ibs -1024(,%ebp,2), %ymm2
+# INTEL: vcvttps2ibs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7d,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttps2ibs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvttps2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7d,0xaf,0x68,0x51,0x7f
+
+# ATT: vcvttps2ibs -512(%edx){1to8}, %ymm2 {%k7} {z}
+# INTEL: vcvttps2ibs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+0x62,0xf5,0x7d,0xbf,0x68,0x52,0x80
+
+# ATT: vcvttps2ibs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvttps2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvttps2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2ibs (%eax){1to16}, %zmm2
+# INTEL: vcvttps2ibs zmm2, dword ptr [eax]{1to16}
+0x62,0xf5,0x7d,0x58,0x68,0x10
+
+# ATT: vcvttps2ibs -2048(,%ebp,2), %zmm2
+# INTEL: vcvttps2ibs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7d,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttps2ibs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvttps2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7d,0xcf,0x68,0x51,0x7f
+
+# ATT: vcvttps2ibs -512(%edx){1to16}, %zmm2 {%k7} {z}
+# INTEL: vcvttps2ibs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+0x62,0xf5,0x7d,0xdf,0x68,0x52,0x80
+
+# ATT: vcvttps2iubs %xmm3, %xmm2
+# INTEL: vcvttps2iubs xmm2, xmm3
+0x62,0xf5,0x7d,0x08,0x6a,0xd3
+
+# ATT: vcvttps2iubs %xmm3, %xmm2 {%k7}
+# INTEL: vcvttps2iubs xmm2 {k7}, xmm3
+0x62,0xf5,0x7d,0x0f,0x6a,0xd3
+
+# ATT: vcvttps2iubs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvttps2iubs xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7d,0x8f,0x6a,0xd3
+
+# ATT: vcvttps2iubs %zmm3, %zmm2
+# INTEL: vcvttps2iubs zmm2, zmm3
+0x62,0xf5,0x7d,0x48,0x6a,0xd3
+
+# ATT: vcvttps2iubs {sae}, %zmm3, %zmm2
+# INTEL: vcvttps2iubs zmm2, zmm3, {sae}
+0x62,0xf5,0x7d,0x18,0x6a,0xd3
+
+# ATT: vcvttps2iubs %zmm3, %zmm2 {%k7}
+# INTEL: vcvttps2iubs zmm2 {k7}, zmm3
+0x62,0xf5,0x7d,0x4f,0x6a,0xd3
+
+# ATT: vcvttps2iubs {sae}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvttps2iubs zmm2 {k7} {z}, zmm3, {sae}
+0x62,0xf5,0x7d,0x9f,0x6a,0xd3
+
+# ATT: vcvttps2iubs %ymm3, %ymm2
+# INTEL: vcvttps2iubs ymm2, ymm3
+0x62,0xf5,0x7d,0x28,0x6a,0xd3
+
+# ATT: vcvttps2iubs {sae}, %ymm3, %ymm2
+# INTEL: vcvttps2iubs ymm2, ymm3, {sae}
+0x62,0xf5,0x79,0x18,0x6a,0xd3
+
+# ATT: vcvttps2iubs %ymm3, %ymm2 {%k7}
+# INTEL: vcvttps2iubs ymm2 {k7}, ymm3
+0x62,0xf5,0x7d,0x2f,0x6a,0xd3
+
+# ATT: vcvttps2iubs {sae}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvttps2iubs ymm2 {k7} {z}, ymm3, {sae}
+0x62,0xf5,0x79,0x9f,0x6a,0xd3
+
+# ATT: vcvttps2iubs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvttps2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvttps2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2iubs (%eax){1to4}, %xmm2
+# INTEL: vcvttps2iubs xmm2, dword ptr [eax]{1to4}
+0x62,0xf5,0x7d,0x18,0x6a,0x10
+
+# ATT: vcvttps2iubs -512(,%ebp,2), %xmm2
+# INTEL: vcvttps2iubs xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7d,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttps2iubs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvttps2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7d,0x8f,0x6a,0x51,0x7f
+
+# ATT: vcvttps2iubs -512(%edx){1to4}, %xmm2 {%k7} {z}
+# INTEL: vcvttps2iubs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+0x62,0xf5,0x7d,0x9f,0x6a,0x52,0x80
+
+# ATT: vcvttps2iubs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvttps2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvttps2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2iubs (%eax){1to8}, %ymm2
+# INTEL: vcvttps2iubs ymm2, dword ptr [eax]{1to8}
+0x62,0xf5,0x7d,0x38,0x6a,0x10
+
+# ATT: vcvttps2iubs -1024(,%ebp,2), %ymm2
+# INTEL: vcvttps2iubs ymm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7d,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttps2iubs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvttps2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7d,0xaf,0x6a,0x51,0x7f
+
+# ATT: vcvttps2iubs -512(%edx){1to8}, %ymm2 {%k7} {z}
+# INTEL: vcvttps2iubs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+0x62,0xf5,0x7d,0xbf,0x6a,0x52,0x80
+
+# ATT: vcvttps2iubs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvttps2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7d,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvttps2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7d,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2iubs (%eax){1to16}, %zmm2
+# INTEL: vcvttps2iubs zmm2, dword ptr [eax]{1to16}
+0x62,0xf5,0x7d,0x58,0x6a,0x10
+
+# ATT: vcvttps2iubs -2048(,%ebp,2), %zmm2
+# INTEL: vcvttps2iubs zmm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7d,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttps2iubs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvttps2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7d,0xcf,0x6a,0x51,0x7f
+
+# ATT: vcvttps2iubs -512(%edx){1to16}, %zmm2 {%k7} {z}
+# INTEL: vcvttps2iubs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+0x62,0xf5,0x7d,0xdf,0x6a,0x52,0x80
+
diff --git a/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt b/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
new file mode 100644
index 0000000000000..fc9ac1cbc53bd
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
@@ -0,0 +1,1363 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT: vcvtnebf162ibs %xmm23, %xmm22
+# INTEL: vcvtnebf162ibs xmm22, xmm23
+0x62,0xa5,0x7f,0x08,0x69,0xf7
+
+# ATT: vcvtnebf162ibs %xmm23, %xmm22 {%k7}
+# INTEL: vcvtnebf162ibs xmm22 {k7}, xmm23
+0x62,0xa5,0x7f,0x0f,0x69,0xf7
+
+# ATT: vcvtnebf162ibs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtnebf162ibs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7f,0x8f,0x69,0xf7
+
+# ATT: vcvtnebf162ibs %zmm23, %zmm22
+# INTEL: vcvtnebf162ibs zmm22, zmm23
+0x62,0xa5,0x7f,0x48,0x69,0xf7
+
+# ATT: vcvtnebf162ibs %zmm23, %zmm22 {%k7}
+# INTEL: vcvtnebf162ibs zmm22 {k7}, zmm23
+0x62,0xa5,0x7f,0x4f,0x69,0xf7
+
+# ATT: vcvtnebf162ibs %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtnebf162ibs zmm22 {k7} {z}, zmm23
+0x62,0xa5,0x7f,0xcf,0x69,0xf7
+
+# ATT: vcvtnebf162ibs %ymm23, %ymm22
+# INTEL: vcvtnebf162ibs ymm22, ymm23
+0x62,0xa5,0x7f,0x28,0x69,0xf7
+
+# ATT: vcvtnebf162ibs %ymm23, %ymm22 {%k7}
+# INTEL: vcvtnebf162ibs ymm22 {k7}, ymm23
+0x62,0xa5,0x7f,0x2f,0x69,0xf7
+
+# ATT: vcvtnebf162ibs %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtnebf162ibs ymm22 {k7} {z}, ymm23
+0x62,0xa5,0x7f,0xaf,0x69,0xf7
+
+# ATT: vcvtnebf162ibs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162ibs (%rip){1to8}, %xmm22
+# INTEL: vcvtnebf162ibs xmm22, word ptr [rip]{1to8}
+0x62,0xe5,0x7f,0x18,0x69,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtnebf162ibs -512(,%rbp,2), %xmm22
+# INTEL: vcvtnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7f,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7f,0x8f,0x69,0x71,0x7f
+
+# ATT: vcvtnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvtnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x7f,0x9f,0x69,0x72,0x80
+
+# ATT: vcvtnebf162ibs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162ibs (%rip){1to16}, %ymm22
+# INTEL: vcvtnebf162ibs ymm22, word ptr [rip]{1to16}
+0x62,0xe5,0x7f,0x38,0x69,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtnebf162ibs -1024(,%rbp,2), %ymm22
+# INTEL: vcvtnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7f,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7f,0xaf,0x69,0x71,0x7f
+
+# ATT: vcvtnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvtnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x7f,0xbf,0x69,0x72,0x80
+
+# ATT: vcvtnebf162ibs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvtnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvtnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162ibs (%rip){1to32}, %zmm22
+# INTEL: vcvtnebf162ibs zmm22, word ptr [rip]{1to32}
+0x62,0xe5,0x7f,0x58,0x69,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtnebf162ibs -2048(,%rbp,2), %zmm22
+# INTEL: vcvtnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7f,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvtnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7f,0xcf,0x69,0x71,0x7f
+
+# ATT: vcvtnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvtnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x7f,0xdf,0x69,0x72,0x80
+
+# ATT: vcvtnebf162iubs %xmm23, %xmm22
+# INTEL: vcvtnebf162iubs xmm22, xmm23
+0x62,0xa5,0x7f,0x08,0x6b,0xf7
+
+# ATT: vcvtnebf162iubs %xmm23, %xmm22 {%k7}
+# INTEL: vcvtnebf162iubs xmm22 {k7}, xmm23
+0x62,0xa5,0x7f,0x0f,0x6b,0xf7
+
+# ATT: vcvtnebf162iubs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtnebf162iubs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7f,0x8f,0x6b,0xf7
+
+# ATT: vcvtnebf162iubs %zmm23, %zmm22
+# INTEL: vcvtnebf162iubs zmm22, zmm23
+0x62,0xa5,0x7f,0x48,0x6b,0xf7
+
+# ATT: vcvtnebf162iubs %zmm23, %zmm22 {%k7}
+# INTEL: vcvtnebf162iubs zmm22 {k7}, zmm23
+0x62,0xa5,0x7f,0x4f,0x6b,0xf7
+
+# ATT: vcvtnebf162iubs %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtnebf162iubs zmm22 {k7} {z}, zmm23
+0x62,0xa5,0x7f,0xcf,0x6b,0xf7
+
+# ATT: vcvtnebf162iubs %ymm23, %ymm22
+# INTEL: vcvtnebf162iubs ymm22, ymm23
+0x62,0xa5,0x7f,0x28,0x6b,0xf7
+
+# ATT: vcvtnebf162iubs %ymm23, %ymm22 {%k7}
+# INTEL: vcvtnebf162iubs ymm22 {k7}, ymm23
+0x62,0xa5,0x7f,0x2f,0x6b,0xf7
+
+# ATT: vcvtnebf162iubs %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtnebf162iubs ymm22 {k7} {z}, ymm23
+0x62,0xa5,0x7f,0xaf,0x6b,0xf7
+
+# ATT: vcvtnebf162iubs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162iubs (%rip){1to8}, %xmm22
+# INTEL: vcvtnebf162iubs xmm22, word ptr [rip]{1to8}
+0x62,0xe5,0x7f,0x18,0x6b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtnebf162iubs -512(,%rbp,2), %xmm22
+# INTEL: vcvtnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7f,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7f,0x8f,0x6b,0x71,0x7f
+
+# ATT: vcvtnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvtnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x7f,0x9f,0x6b,0x72,0x80
+
+# ATT: vcvtnebf162iubs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162iubs (%rip){1to16}, %ymm22
+# INTEL: vcvtnebf162iubs ymm22, word ptr [rip]{1to16}
+0x62,0xe5,0x7f,0x38,0x6b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtnebf162iubs -1024(,%rbp,2), %ymm22
+# INTEL: vcvtnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7f,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7f,0xaf,0x6b,0x71,0x7f
+
+# ATT: vcvtnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvtnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x7f,0xbf,0x6b,0x72,0x80
+
+# ATT: vcvtnebf162iubs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvtnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvtnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtnebf162iubs (%rip){1to32}, %zmm22
+# INTEL: vcvtnebf162iubs zmm22, word ptr [rip]{1to32}
+0x62,0xe5,0x7f,0x58,0x6b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtnebf162iubs -2048(,%rbp,2), %zmm22
+# INTEL: vcvtnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7f,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvtnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7f,0xcf,0x6b,0x71,0x7f
+
+# ATT: vcvtnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvtnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x7f,0xdf,0x6b,0x72,0x80
+
+# ATT: vcvtph2ibs %xmm23, %xmm22
+# INTEL: vcvtph2ibs xmm22, xmm23
+0x62,0xa5,0x7c,0x08,0x69,0xf7
+
+# ATT: vcvtph2ibs %xmm23, %xmm22 {%k7}
+# INTEL: vcvtph2ibs xmm22 {k7}, xmm23
+0x62,0xa5,0x7c,0x0f,0x69,0xf7
+
+# ATT: vcvtph2ibs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtph2ibs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7c,0x8f,0x69,0xf7
+
+# ATT: vcvtph2ibs %zmm23, %zmm22
+# INTEL: vcvtph2ibs zmm22, zmm23
+0x62,0xa5,0x7c,0x48,0x69,0xf7
+
+# ATT: vcvtph2ibs {rn-sae}, %zmm23, %zmm22
+# INTEL: vcvtph2ibs zmm22, zmm23, {rn-sae}
+0x62,0xa5,0x7c,0x18,0x69,0xf7
+
+# ATT: vcvtph2ibs %zmm23, %zmm22 {%k7}
+# INTEL: vcvtph2ibs zmm22 {k7}, zmm23
+0x62,0xa5,0x7c,0x4f,0x69,0xf7
+
+# ATT: vcvtph2ibs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtph2ibs zmm22 {k7} {z}, zmm23, {rz-sae}
+0x62,0xa5,0x7c,0xff,0x69,0xf7
+
+# ATT: vcvtph2ibs %ymm23, %ymm22
+# INTEL: vcvtph2ibs ymm22, ymm23
+0x62,0xa5,0x7c,0x28,0x69,0xf7
+
+# ATT: vcvtph2ibs {rn-sae}, %ymm23, %ymm22
+# INTEL: vcvtph2ibs ymm22, ymm23, {rn-sae}
+0x62,0xa5,0x78,0x18,0x69,0xf7
+
+# ATT: vcvtph2ibs %ymm23, %ymm22 {%k7}
+# INTEL: vcvtph2ibs ymm22 {k7}, ymm23
+0x62,0xa5,0x7c,0x2f,0x69,0xf7
+
+# ATT: vcvtph2ibs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtph2ibs ymm22 {k7} {z}, ymm23, {rz-sae}
+0x62,0xa5,0x78,0xff,0x69,0xf7
+
+# ATT: vcvtph2ibs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtph2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtph2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2ibs (%rip){1to8}, %xmm22
+# INTEL: vcvtph2ibs xmm22, word ptr [rip]{1to8}
+0x62,0xe5,0x7c,0x18,0x69,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtph2ibs -512(,%rbp,2), %xmm22
+# INTEL: vcvtph2ibs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7c,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtph2ibs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtph2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7c,0x8f,0x69,0x71,0x7f
+
+# ATT: vcvtph2ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvtph2ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x7c,0x9f,0x69,0x72,0x80
+
+# ATT: vcvtph2ibs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtph2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtph2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2ibs (%rip){1to16}, %ymm22
+# INTEL: vcvtph2ibs ymm22, word ptr [rip]{1to16}
+0x62,0xe5,0x7c,0x38,0x69,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtph2ibs -1024(,%rbp,2), %ymm22
+# INTEL: vcvtph2ibs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7c,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtph2ibs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtph2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7c,0xaf,0x69,0x71,0x7f
+
+# ATT: vcvtph2ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvtph2ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x7c,0xbf,0x69,0x72,0x80
+
+# ATT: vcvtph2ibs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvtph2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvtph2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2ibs (%rip){1to32}, %zmm22
+# INTEL: vcvtph2ibs zmm22, word ptr [rip]{1to32}
+0x62,0xe5,0x7c,0x58,0x69,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtph2ibs -2048(,%rbp,2), %zmm22
+# INTEL: vcvtph2ibs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7c,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtph2ibs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvtph2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7c,0xcf,0x69,0x71,0x7f
+
+# ATT: vcvtph2ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvtph2ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x7c,0xdf,0x69,0x72,0x80
+
+# ATT: vcvtph2iubs %xmm23, %xmm22
+# INTEL: vcvtph2iubs xmm22, xmm23
+0x62,0xa5,0x7c,0x08,0x6b,0xf7
+
+# ATT: vcvtph2iubs %xmm23, %xmm22 {%k7}
+# INTEL: vcvtph2iubs xmm22 {k7}, xmm23
+0x62,0xa5,0x7c,0x0f,0x6b,0xf7
+
+# ATT: vcvtph2iubs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtph2iubs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7c,0x8f,0x6b,0xf7
+
+# ATT: vcvtph2iubs %zmm23, %zmm22
+# INTEL: vcvtph2iubs zmm22, zmm23
+0x62,0xa5,0x7c,0x48,0x6b,0xf7
+
+# ATT: vcvtph2iubs {rn-sae}, %zmm23, %zmm22
+# INTEL: vcvtph2iubs zmm22, zmm23, {rn-sae}
+0x62,0xa5,0x7c,0x18,0x6b,0xf7
+
+# ATT: vcvtph2iubs %zmm23, %zmm22 {%k7}
+# INTEL: vcvtph2iubs zmm22 {k7}, zmm23
+0x62,0xa5,0x7c,0x4f,0x6b,0xf7
+
+# ATT: vcvtph2iubs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtph2iubs zmm22 {k7} {z}, zmm23, {rz-sae}
+0x62,0xa5,0x7c,0xff,0x6b,0xf7
+
+# ATT: vcvtph2iubs %ymm23, %ymm22
+# INTEL: vcvtph2iubs ymm22, ymm23
+0x62,0xa5,0x7c,0x28,0x6b,0xf7
+
+# ATT: vcvtph2iubs {rn-sae}, %ymm23, %ymm22
+# INTEL: vcvtph2iubs ymm22, ymm23, {rn-sae}
+0x62,0xa5,0x78,0x18,0x6b,0xf7
+
+# ATT: vcvtph2iubs %ymm23, %ymm22 {%k7}
+# INTEL: vcvtph2iubs ymm22 {k7}, ymm23
+0x62,0xa5,0x7c,0x2f,0x6b,0xf7
+
+# ATT: vcvtph2iubs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtph2iubs ymm22 {k7} {z}, ymm23, {rz-sae}
+0x62,0xa5,0x78,0xff,0x6b,0xf7
+
+# ATT: vcvtph2iubs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtph2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtph2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2iubs (%rip){1to8}, %xmm22
+# INTEL: vcvtph2iubs xmm22, word ptr [rip]{1to8}
+0x62,0xe5,0x7c,0x18,0x6b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtph2iubs -512(,%rbp,2), %xmm22
+# INTEL: vcvtph2iubs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7c,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtph2iubs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtph2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7c,0x8f,0x6b,0x71,0x7f
+
+# ATT: vcvtph2iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvtph2iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x7c,0x9f,0x6b,0x72,0x80
+
+# ATT: vcvtph2iubs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtph2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtph2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2iubs (%rip){1to16}, %ymm22
+# INTEL: vcvtph2iubs ymm22, word ptr [rip]{1to16}
+0x62,0xe5,0x7c,0x38,0x6b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtph2iubs -1024(,%rbp,2), %ymm22
+# INTEL: vcvtph2iubs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7c,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtph2iubs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtph2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7c,0xaf,0x6b,0x71,0x7f
+
+# ATT: vcvtph2iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvtph2iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x7c,0xbf,0x6b,0x72,0x80
+
+# ATT: vcvtph2iubs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvtph2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtph2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvtph2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtph2iubs (%rip){1to32}, %zmm22
+# INTEL: vcvtph2iubs zmm22, word ptr [rip]{1to32}
+0x62,0xe5,0x7c,0x58,0x6b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtph2iubs -2048(,%rbp,2), %zmm22
+# INTEL: vcvtph2iubs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7c,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtph2iubs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvtph2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7c,0xcf,0x6b,0x71,0x7f
+
+# ATT: vcvtph2iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvtph2iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x7c,0xdf,0x6b,0x72,0x80
+
+# ATT: vcvtps2ibs %xmm23, %xmm22
+# INTEL: vcvtps2ibs xmm22, xmm23
+0x62,0xa5,0x7d,0x08,0x69,0xf7
+
+# ATT: vcvtps2ibs %xmm23, %xmm22 {%k7}
+# INTEL: vcvtps2ibs xmm22 {k7}, xmm23
+0x62,0xa5,0x7d,0x0f,0x69,0xf7
+
+# ATT: vcvtps2ibs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtps2ibs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7d,0x8f,0x69,0xf7
+
+# ATT: vcvtps2ibs %zmm23, %zmm22
+# INTEL: vcvtps2ibs zmm22, zmm23
+0x62,0xa5,0x7d,0x48,0x69,0xf7
+
+# ATT: vcvtps2ibs {rn-sae}, %zmm23, %zmm22
+# INTEL: vcvtps2ibs zmm22, zmm23, {rn-sae}
+0x62,0xa5,0x7d,0x18,0x69,0xf7
+
+# ATT: vcvtps2ibs %zmm23, %zmm22 {%k7}
+# INTEL: vcvtps2ibs zmm22 {k7}, zmm23
+0x62,0xa5,0x7d,0x4f,0x69,0xf7
+
+# ATT: vcvtps2ibs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtps2ibs zmm22 {k7} {z}, zmm23, {rz-sae}
+0x62,0xa5,0x7d,0xff,0x69,0xf7
+
+# ATT: vcvtps2ibs %ymm23, %ymm22
+# INTEL: vcvtps2ibs ymm22, ymm23
+0x62,0xa5,0x7d,0x28,0x69,0xf7
+
+# ATT: vcvtps2ibs {rn-sae}, %ymm23, %ymm22
+# INTEL: vcvtps2ibs ymm22, ymm23, {rn-sae}
+0x62,0xa5,0x79,0x18,0x69,0xf7
+
+# ATT: vcvtps2ibs %ymm23, %ymm22 {%k7}
+# INTEL: vcvtps2ibs ymm22 {k7}, ymm23
+0x62,0xa5,0x7d,0x2f,0x69,0xf7
+
+# ATT: vcvtps2ibs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtps2ibs ymm22 {k7} {z}, ymm23, {rz-sae}
+0x62,0xa5,0x79,0xff,0x69,0xf7
+
+# ATT: vcvtps2ibs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtps2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtps2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2ibs (%rip){1to4}, %xmm22
+# INTEL: vcvtps2ibs xmm22, dword ptr [rip]{1to4}
+0x62,0xe5,0x7d,0x18,0x69,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtps2ibs -512(,%rbp,2), %xmm22
+# INTEL: vcvtps2ibs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7d,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtps2ibs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtps2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7d,0x8f,0x69,0x71,0x7f
+
+# ATT: vcvtps2ibs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+# INTEL: vcvtps2ibs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+0x62,0xe5,0x7d,0x9f,0x69,0x72,0x80
+
+# ATT: vcvtps2ibs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtps2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtps2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2ibs (%rip){1to8}, %ymm22
+# INTEL: vcvtps2ibs ymm22, dword ptr [rip]{1to8}
+0x62,0xe5,0x7d,0x38,0x69,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtps2ibs -1024(,%rbp,2), %ymm22
+# INTEL: vcvtps2ibs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7d,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtps2ibs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtps2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7d,0xaf,0x69,0x71,0x7f
+
+# ATT: vcvtps2ibs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+# INTEL: vcvtps2ibs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+0x62,0xe5,0x7d,0xbf,0x69,0x72,0x80
+
+# ATT: vcvtps2ibs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvtps2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvtps2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2ibs (%rip){1to16}, %zmm22
+# INTEL: vcvtps2ibs zmm22, dword ptr [rip]{1to16}
+0x62,0xe5,0x7d,0x58,0x69,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtps2ibs -2048(,%rbp,2), %zmm22
+# INTEL: vcvtps2ibs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7d,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtps2ibs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvtps2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7d,0xcf,0x69,0x71,0x7f
+
+# ATT: vcvtps2ibs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+# INTEL: vcvtps2ibs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+0x62,0xe5,0x7d,0xdf,0x69,0x72,0x80
+
+# ATT: vcvtps2iubs %xmm23, %xmm22
+# INTEL: vcvtps2iubs xmm22, xmm23
+0x62,0xa5,0x7d,0x08,0x6b,0xf7
+
+# ATT: vcvtps2iubs %xmm23, %xmm22 {%k7}
+# INTEL: vcvtps2iubs xmm22 {k7}, xmm23
+0x62,0xa5,0x7d,0x0f,0x6b,0xf7
+
+# ATT: vcvtps2iubs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtps2iubs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7d,0x8f,0x6b,0xf7
+
+# ATT: vcvtps2iubs %zmm23, %zmm22
+# INTEL: vcvtps2iubs zmm22, zmm23
+0x62,0xa5,0x7d,0x48,0x6b,0xf7
+
+# ATT: vcvtps2iubs {rn-sae}, %zmm23, %zmm22
+# INTEL: vcvtps2iubs zmm22, zmm23, {rn-sae}
+0x62,0xa5,0x7d,0x18,0x6b,0xf7
+
+# ATT: vcvtps2iubs %zmm23, %zmm22 {%k7}
+# INTEL: vcvtps2iubs zmm22 {k7}, zmm23
+0x62,0xa5,0x7d,0x4f,0x6b,0xf7
+
+# ATT: vcvtps2iubs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtps2iubs zmm22 {k7} {z}, zmm23, {rz-sae}
+0x62,0xa5,0x7d,0xff,0x6b,0xf7
+
+# ATT: vcvtps2iubs %ymm23, %ymm22
+# INTEL: vcvtps2iubs ymm22, ymm23
+0x62,0xa5,0x7d,0x28,0x6b,0xf7
+
+# ATT: vcvtps2iubs {rn-sae}, %ymm23, %ymm22
+# INTEL: vcvtps2iubs ymm22, ymm23, {rn-sae}
+0x62,0xa5,0x79,0x18,0x6b,0xf7
+
+# ATT: vcvtps2iubs %ymm23, %ymm22 {%k7}
+# INTEL: vcvtps2iubs ymm22 {k7}, ymm23
+0x62,0xa5,0x7d,0x2f,0x6b,0xf7
+
+# ATT: vcvtps2iubs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtps2iubs ymm22 {k7} {z}, ymm23, {rz-sae}
+0x62,0xa5,0x79,0xff,0x6b,0xf7
+
+# ATT: vcvtps2iubs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtps2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtps2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2iubs (%rip){1to4}, %xmm22
+# INTEL: vcvtps2iubs xmm22, dword ptr [rip]{1to4}
+0x62,0xe5,0x7d,0x18,0x6b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtps2iubs -512(,%rbp,2), %xmm22
+# INTEL: vcvtps2iubs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7d,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtps2iubs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtps2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7d,0x8f,0x6b,0x71,0x7f
+
+# ATT: vcvtps2iubs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+# INTEL: vcvtps2iubs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+0x62,0xe5,0x7d,0x9f,0x6b,0x72,0x80
+
+# ATT: vcvtps2iubs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtps2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtps2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2iubs (%rip){1to8}, %ymm22
+# INTEL: vcvtps2iubs ymm22, dword ptr [rip]{1to8}
+0x62,0xe5,0x7d,0x38,0x6b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtps2iubs -1024(,%rbp,2), %ymm22
+# INTEL: vcvtps2iubs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7d,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtps2iubs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtps2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7d,0xaf,0x6b,0x71,0x7f
+
+# ATT: vcvtps2iubs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+# INTEL: vcvtps2iubs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+0x62,0xe5,0x7d,0xbf,0x6b,0x72,0x80
+
+# ATT: vcvtps2iubs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvtps2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtps2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvtps2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtps2iubs (%rip){1to16}, %zmm22
+# INTEL: vcvtps2iubs zmm22, dword ptr [rip]{1to16}
+0x62,0xe5,0x7d,0x58,0x6b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtps2iubs -2048(,%rbp,2), %zmm22
+# INTEL: vcvtps2iubs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7d,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtps2iubs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvtps2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7d,0xcf,0x6b,0x71,0x7f
+
+# ATT: vcvtps2iubs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+# INTEL: vcvtps2iubs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+0x62,0xe5,0x7d,0xdf,0x6b,0x72,0x80
+
+# ATT: vcvttnebf162ibs %xmm23, %xmm22
+# INTEL: vcvttnebf162ibs xmm22, xmm23
+0x62,0xa5,0x7f,0x08,0x68,0xf7
+
+# ATT: vcvttnebf162ibs %xmm23, %xmm22 {%k7}
+# INTEL: vcvttnebf162ibs xmm22 {k7}, xmm23
+0x62,0xa5,0x7f,0x0f,0x68,0xf7
+
+# ATT: vcvttnebf162ibs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvttnebf162ibs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7f,0x8f,0x68,0xf7
+
+# ATT: vcvttnebf162ibs %zmm23, %zmm22
+# INTEL: vcvttnebf162ibs zmm22, zmm23
+0x62,0xa5,0x7f,0x48,0x68,0xf7
+
+# ATT: vcvttnebf162ibs %zmm23, %zmm22 {%k7}
+# INTEL: vcvttnebf162ibs zmm22 {k7}, zmm23
+0x62,0xa5,0x7f,0x4f,0x68,0xf7
+
+# ATT: vcvttnebf162ibs %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvttnebf162ibs zmm22 {k7} {z}, zmm23
+0x62,0xa5,0x7f,0xcf,0x68,0xf7
+
+# ATT: vcvttnebf162ibs %ymm23, %ymm22
+# INTEL: vcvttnebf162ibs ymm22, ymm23
+0x62,0xa5,0x7f,0x28,0x68,0xf7
+
+# ATT: vcvttnebf162ibs %ymm23, %ymm22 {%k7}
+# INTEL: vcvttnebf162ibs ymm22 {k7}, ymm23
+0x62,0xa5,0x7f,0x2f,0x68,0xf7
+
+# ATT: vcvttnebf162ibs %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvttnebf162ibs ymm22 {k7} {z}, ymm23
+0x62,0xa5,0x7f,0xaf,0x68,0xf7
+
+# ATT: vcvttnebf162ibs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvttnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvttnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162ibs (%rip){1to8}, %xmm22
+# INTEL: vcvttnebf162ibs xmm22, word ptr [rip]{1to8}
+0x62,0xe5,0x7f,0x18,0x68,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttnebf162ibs -512(,%rbp,2), %xmm22
+# INTEL: vcvttnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7f,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvttnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7f,0x8f,0x68,0x71,0x7f
+
+# ATT: vcvttnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvttnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x7f,0x9f,0x68,0x72,0x80
+
+# ATT: vcvttnebf162ibs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvttnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvttnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162ibs (%rip){1to16}, %ymm22
+# INTEL: vcvttnebf162ibs ymm22, word ptr [rip]{1to16}
+0x62,0xe5,0x7f,0x38,0x68,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttnebf162ibs -1024(,%rbp,2), %ymm22
+# INTEL: vcvttnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7f,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvttnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7f,0xaf,0x68,0x71,0x7f
+
+# ATT: vcvttnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvttnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x7f,0xbf,0x68,0x72,0x80
+
+# ATT: vcvttnebf162ibs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvttnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvttnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162ibs (%rip){1to32}, %zmm22
+# INTEL: vcvttnebf162ibs zmm22, word ptr [rip]{1to32}
+0x62,0xe5,0x7f,0x58,0x68,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttnebf162ibs -2048(,%rbp,2), %zmm22
+# INTEL: vcvttnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7f,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvttnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7f,0xcf,0x68,0x71,0x7f
+
+# ATT: vcvttnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvttnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x7f,0xdf,0x68,0x72,0x80
+
+# ATT: vcvttnebf162iubs %xmm23, %xmm22
+# INTEL: vcvttnebf162iubs xmm22, xmm23
+0x62,0xa5,0x7f,0x08,0x6a,0xf7
+
+# ATT: vcvttnebf162iubs %xmm23, %xmm22 {%k7}
+# INTEL: vcvttnebf162iubs xmm22 {k7}, xmm23
+0x62,0xa5,0x7f,0x0f,0x6a,0xf7
+
+# ATT: vcvttnebf162iubs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvttnebf162iubs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7f,0x8f,0x6a,0xf7
+
+# ATT: vcvttnebf162iubs %zmm23, %zmm22
+# INTEL: vcvttnebf162iubs zmm22, zmm23
+0x62,0xa5,0x7f,0x48,0x6a,0xf7
+
+# ATT: vcvttnebf162iubs %zmm23, %zmm22 {%k7}
+# INTEL: vcvttnebf162iubs zmm22 {k7}, zmm23
+0x62,0xa5,0x7f,0x4f,0x6a,0xf7
+
+# ATT: vcvttnebf162iubs %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvttnebf162iubs zmm22 {k7} {z}, zmm23
+0x62,0xa5,0x7f,0xcf,0x6a,0xf7
+
+# ATT: vcvttnebf162iubs %ymm23, %ymm22
+# INTEL: vcvttnebf162iubs ymm22, ymm23
+0x62,0xa5,0x7f,0x28,0x6a,0xf7
+
+# ATT: vcvttnebf162iubs %ymm23, %ymm22 {%k7}
+# INTEL: vcvttnebf162iubs ymm22 {k7}, ymm23
+0x62,0xa5,0x7f,0x2f,0x6a,0xf7
+
+# ATT: vcvttnebf162iubs %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvttnebf162iubs ymm22 {k7} {z}, ymm23
+0x62,0xa5,0x7f,0xaf,0x6a,0xf7
+
+# ATT: vcvttnebf162iubs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvttnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvttnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162iubs (%rip){1to8}, %xmm22
+# INTEL: vcvttnebf162iubs xmm22, word ptr [rip]{1to8}
+0x62,0xe5,0x7f,0x18,0x6a,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttnebf162iubs -512(,%rbp,2), %xmm22
+# INTEL: vcvttnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7f,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvttnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7f,0x8f,0x6a,0x71,0x7f
+
+# ATT: vcvttnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvttnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x7f,0x9f,0x6a,0x72,0x80
+
+# ATT: vcvttnebf162iubs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvttnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvttnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162iubs (%rip){1to16}, %ymm22
+# INTEL: vcvttnebf162iubs ymm22, word ptr [rip]{1to16}
+0x62,0xe5,0x7f,0x38,0x6a,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttnebf162iubs -1024(,%rbp,2), %ymm22
+# INTEL: vcvttnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7f,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvttnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7f,0xaf,0x6a,0x71,0x7f
+
+# ATT: vcvttnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvttnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x7f,0xbf,0x6a,0x72,0x80
+
+# ATT: vcvttnebf162iubs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvttnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvttnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttnebf162iubs (%rip){1to32}, %zmm22
+# INTEL: vcvttnebf162iubs zmm22, word ptr [rip]{1to32}
+0x62,0xe5,0x7f,0x58,0x6a,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttnebf162iubs -2048(,%rbp,2), %zmm22
+# INTEL: vcvttnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7f,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvttnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7f,0xcf,0x6a,0x71,0x7f
+
+# ATT: vcvttnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvttnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x7f,0xdf,0x6a,0x72,0x80
+
+# ATT: vcvttph2ibs %xmm23, %xmm22
+# INTEL: vcvttph2ibs xmm22, xmm23
+0x62,0xa5,0x7c,0x08,0x68,0xf7
+
+# ATT: vcvttph2ibs %xmm23, %xmm22 {%k7}
+# INTEL: vcvttph2ibs xmm22 {k7}, xmm23
+0x62,0xa5,0x7c,0x0f,0x68,0xf7
+
+# ATT: vcvttph2ibs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvttph2ibs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7c,0x8f,0x68,0xf7
+
+# ATT: vcvttph2ibs %zmm23, %zmm22
+# INTEL: vcvttph2ibs zmm22, zmm23
+0x62,0xa5,0x7c,0x48,0x68,0xf7
+
+# ATT: vcvttph2ibs {sae}, %zmm23, %zmm22
+# INTEL: vcvttph2ibs zmm22, zmm23, {sae}
+0x62,0xa5,0x7c,0x18,0x68,0xf7
+
+# ATT: vcvttph2ibs %zmm23, %zmm22 {%k7}
+# INTEL: vcvttph2ibs zmm22 {k7}, zmm23
+0x62,0xa5,0x7c,0x4f,0x68,0xf7
+
+# ATT: vcvttph2ibs {sae}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvttph2ibs zmm22 {k7} {z}, zmm23, {sae}
+0x62,0xa5,0x7c,0x9f,0x68,0xf7
+
+# ATT: vcvttph2ibs %ymm23, %ymm22
+# INTEL: vcvttph2ibs ymm22, ymm23
+0x62,0xa5,0x7c,0x28,0x68,0xf7
+
+# ATT: vcvttph2ibs {sae}, %ymm23, %ymm22
+# INTEL: vcvttph2ibs ymm22, ymm23, {sae}
+0x62,0xa5,0x78,0x18,0x68,0xf7
+
+# ATT: vcvttph2ibs %ymm23, %ymm22 {%k7}
+# INTEL: vcvttph2ibs ymm22 {k7}, ymm23
+0x62,0xa5,0x7c,0x2f,0x68,0xf7
+
+# ATT: vcvttph2ibs {sae}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvttph2ibs ymm22 {k7} {z}, ymm23, {sae}
+0x62,0xa5,0x78,0x9f,0x68,0xf7
+
+# ATT: vcvttph2ibs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvttph2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvttph2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2ibs (%rip){1to8}, %xmm22
+# INTEL: vcvttph2ibs xmm22, word ptr [rip]{1to8}
+0x62,0xe5,0x7c,0x18,0x68,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttph2ibs -512(,%rbp,2), %xmm22
+# INTEL: vcvttph2ibs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7c,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttph2ibs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvttph2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7c,0x8f,0x68,0x71,0x7f
+
+# ATT: vcvttph2ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvttph2ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x7c,0x9f,0x68,0x72,0x80
+
+# ATT: vcvttph2ibs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvttph2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvttph2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2ibs (%rip){1to16}, %ymm22
+# INTEL: vcvttph2ibs ymm22, word ptr [rip]{1to16}
+0x62,0xe5,0x7c,0x38,0x68,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttph2ibs -1024(,%rbp,2), %ymm22
+# INTEL: vcvttph2ibs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7c,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttph2ibs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvttph2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7c,0xaf,0x68,0x71,0x7f
+
+# ATT: vcvttph2ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvttph2ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x7c,0xbf,0x68,0x72,0x80
+
+# ATT: vcvttph2ibs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvttph2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvttph2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2ibs (%rip){1to32}, %zmm22
+# INTEL: vcvttph2ibs zmm22, word ptr [rip]{1to32}
+0x62,0xe5,0x7c,0x58,0x68,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttph2ibs -2048(,%rbp,2), %zmm22
+# INTEL: vcvttph2ibs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7c,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttph2ibs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvttph2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7c,0xcf,0x68,0x71,0x7f
+
+# ATT: vcvttph2ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvttph2ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x7c,0xdf,0x68,0x72,0x80
+
+# ATT: vcvttph2iubs %xmm23, %xmm22
+# INTEL: vcvttph2iubs xmm22, xmm23
+0x62,0xa5,0x7c,0x08,0x6a,0xf7
+
+# ATT: vcvttph2iubs %xmm23, %xmm22 {%k7}
+# INTEL: vcvttph2iubs xmm22 {k7}, xmm23
+0x62,0xa5,0x7c,0x0f,0x6a,0xf7
+
+# ATT: vcvttph2iubs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvttph2iubs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7c,0x8f,0x6a,0xf7
+
+# ATT: vcvttph2iubs %zmm23, %zmm22
+# INTEL: vcvttph2iubs zmm22, zmm23
+0x62,0xa5,0x7c,0x48,0x6a,0xf7
+
+# ATT: vcvttph2iubs {sae}, %zmm23, %zmm22
+# INTEL: vcvttph2iubs zmm22, zmm23, {sae}
+0x62,0xa5,0x7c,0x18,0x6a,0xf7
+
+# ATT: vcvttph2iubs %zmm23, %zmm22 {%k7}
+# INTEL: vcvttph2iubs zmm22 {k7}, zmm23
+0x62,0xa5,0x7c,0x4f,0x6a,0xf7
+
+# ATT: vcvttph2iubs {sae}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvttph2iubs zmm22 {k7} {z}, zmm23, {sae}
+0x62,0xa5,0x7c,0x9f,0x6a,0xf7
+
+# ATT: vcvttph2iubs %ymm23, %ymm22
+# INTEL: vcvttph2iubs ymm22, ymm23
+0x62,0xa5,0x7c,0x28,0x6a,0xf7
+
+# ATT: vcvttph2iubs {sae}, %ymm23, %ymm22
+# INTEL: vcvttph2iubs ymm22, ymm23, {sae}
+0x62,0xa5,0x78,0x18,0x6a,0xf7
+
+# ATT: vcvttph2iubs %ymm23, %ymm22 {%k7}
+# INTEL: vcvttph2iubs ymm22 {k7}, ymm23
+0x62,0xa5,0x7c,0x2f,0x6a,0xf7
+
+# ATT: vcvttph2iubs {sae}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvttph2iubs ymm22 {k7} {z}, ymm23, {sae}
+0x62,0xa5,0x78,0x9f,0x6a,0xf7
+
+# ATT: vcvttph2iubs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvttph2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvttph2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2iubs (%rip){1to8}, %xmm22
+# INTEL: vcvttph2iubs xmm22, word ptr [rip]{1to8}
+0x62,0xe5,0x7c,0x18,0x6a,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttph2iubs -512(,%rbp,2), %xmm22
+# INTEL: vcvttph2iubs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7c,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttph2iubs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvttph2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7c,0x8f,0x6a,0x71,0x7f
+
+# ATT: vcvttph2iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvttph2iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x7c,0x9f,0x6a,0x72,0x80
+
+# ATT: vcvttph2iubs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvttph2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvttph2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2iubs (%rip){1to16}, %ymm22
+# INTEL: vcvttph2iubs ymm22, word ptr [rip]{1to16}
+0x62,0xe5,0x7c,0x38,0x6a,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttph2iubs -1024(,%rbp,2), %ymm22
+# INTEL: vcvttph2iubs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7c,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttph2iubs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvttph2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7c,0xaf,0x6a,0x71,0x7f
+
+# ATT: vcvttph2iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvttph2iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x7c,0xbf,0x6a,0x72,0x80
+
+# ATT: vcvttph2iubs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvttph2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7c,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttph2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvttph2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7c,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttph2iubs (%rip){1to32}, %zmm22
+# INTEL: vcvttph2iubs zmm22, word ptr [rip]{1to32}
+0x62,0xe5,0x7c,0x58,0x6a,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttph2iubs -2048(,%rbp,2), %zmm22
+# INTEL: vcvttph2iubs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7c,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttph2iubs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvttph2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7c,0xcf,0x6a,0x71,0x7f
+
+# ATT: vcvttph2iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvttph2iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x7c,0xdf,0x6a,0x72,0x80
+
+# ATT: vcvttps2ibs %xmm23, %xmm22
+# INTEL: vcvttps2ibs xmm22, xmm23
+0x62,0xa5,0x7d,0x08,0x68,0xf7
+
+# ATT: vcvttps2ibs %xmm23, %xmm22 {%k7}
+# INTEL: vcvttps2ibs xmm22 {k7}, xmm23
+0x62,0xa5,0x7d,0x0f,0x68,0xf7
+
+# ATT: vcvttps2ibs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvttps2ibs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7d,0x8f,0x68,0xf7
+
+# ATT: vcvttps2ibs %zmm23, %zmm22
+# INTEL: vcvttps2ibs zmm22, zmm23
+0x62,0xa5,0x7d,0x48,0x68,0xf7
+
+# ATT: vcvttps2ibs {sae}, %zmm23, %zmm22
+# INTEL: vcvttps2ibs zmm22, zmm23, {sae}
+0x62,0xa5,0x7d,0x18,0x68,0xf7
+
+# ATT: vcvttps2ibs %zmm23, %zmm22 {%k7}
+# INTEL: vcvttps2ibs zmm22 {k7}, zmm23
+0x62,0xa5,0x7d,0x4f,0x68,0xf7
+
+# ATT: vcvttps2ibs {sae}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvttps2ibs zmm22 {k7} {z}, zmm23, {sae}
+0x62,0xa5,0x7d,0x9f,0x68,0xf7
+
+# ATT: vcvttps2ibs %ymm23, %ymm22
+# INTEL: vcvttps2ibs ymm22, ymm23
+0x62,0xa5,0x7d,0x28,0x68,0xf7
+
+# ATT: vcvttps2ibs {sae}, %ymm23, %ymm22
+# INTEL: vcvttps2ibs ymm22, ymm23, {sae}
+0x62,0xa5,0x79,0x18,0x68,0xf7
+
+# ATT: vcvttps2ibs %ymm23, %ymm22 {%k7}
+# INTEL: vcvttps2ibs ymm22 {k7}, ymm23
+0x62,0xa5,0x7d,0x2f,0x68,0xf7
+
+# ATT: vcvttps2ibs {sae}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvttps2ibs ymm22 {k7} {z}, ymm23, {sae}
+0x62,0xa5,0x79,0x9f,0x68,0xf7
+
+# ATT: vcvttps2ibs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvttps2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvttps2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2ibs (%rip){1to4}, %xmm22
+# INTEL: vcvttps2ibs xmm22, dword ptr [rip]{1to4}
+0x62,0xe5,0x7d,0x18,0x68,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttps2ibs -512(,%rbp,2), %xmm22
+# INTEL: vcvttps2ibs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7d,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttps2ibs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvttps2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7d,0x8f,0x68,0x71,0x7f
+
+# ATT: vcvttps2ibs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+# INTEL: vcvttps2ibs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+0x62,0xe5,0x7d,0x9f,0x68,0x72,0x80
+
+# ATT: vcvttps2ibs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvttps2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvttps2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2ibs (%rip){1to8}, %ymm22
+# INTEL: vcvttps2ibs ymm22, dword ptr [rip]{1to8}
+0x62,0xe5,0x7d,0x38,0x68,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttps2ibs -1024(,%rbp,2), %ymm22
+# INTEL: vcvttps2ibs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7d,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttps2ibs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvttps2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7d,0xaf,0x68,0x71,0x7f
+
+# ATT: vcvttps2ibs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+# INTEL: vcvttps2ibs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+0x62,0xe5,0x7d,0xbf,0x68,0x72,0x80
+
+# ATT: vcvttps2ibs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvttps2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvttps2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2ibs (%rip){1to16}, %zmm22
+# INTEL: vcvttps2ibs zmm22, dword ptr [rip]{1to16}
+0x62,0xe5,0x7d,0x58,0x68,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttps2ibs -2048(,%rbp,2), %zmm22
+# INTEL: vcvttps2ibs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7d,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttps2ibs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvttps2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7d,0xcf,0x68,0x71,0x7f
+
+# ATT: vcvttps2ibs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+# INTEL: vcvttps2ibs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+0x62,0xe5,0x7d,0xdf,0x68,0x72,0x80
+
+# ATT: vcvttps2iubs %xmm23, %xmm22
+# INTEL: vcvttps2iubs xmm22, xmm23
+0x62,0xa5,0x7d,0x08,0x6a,0xf7
+
+# ATT: vcvttps2iubs %xmm23, %xmm22 {%k7}
+# INTEL: vcvttps2iubs xmm22 {k7}, xmm23
+0x62,0xa5,0x7d,0x0f,0x6a,0xf7
+
+# ATT: vcvttps2iubs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvttps2iubs xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7d,0x8f,0x6a,0xf7
+
+# ATT: vcvttps2iubs %zmm23, %zmm22
+# INTEL: vcvttps2iubs zmm22, zmm23
+0x62,0xa5,0x7d,0x48,0x6a,0xf7
+
+# ATT: vcvttps2iubs {sae}, %zmm23, %zmm22
+# INTEL: vcvttps2iubs zmm22, zmm23, {sae}
+0x62,0xa5,0x7d,0x18,0x6a,0xf7
+
+# ATT: vcvttps2iubs %zmm23, %zmm22 {%k7}
+# INTEL: vcvttps2iubs zmm22 {k7}, zmm23
+0x62,0xa5,0x7d,0x4f,0x6a,0xf7
+
+# ATT: vcvttps2iubs {sae}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvttps2iubs zmm22 {k7} {z}, zmm23, {sae}
+0x62,0xa5,0x7d,0x9f,0x6a,0xf7
+
+# ATT: vcvttps2iubs %ymm23, %ymm22
+# INTEL: vcvttps2iubs ymm22, ymm23
+0x62,0xa5,0x7d,0x28,0x6a,0xf7
+
+# ATT: vcvttps2iubs {sae}, %ymm23, %ymm22
+# INTEL: vcvttps2iubs ymm22, ymm23, {sae}
+0x62,0xa5,0x79,0x18,0x6a,0xf7
+
+# ATT: vcvttps2iubs %ymm23, %ymm22 {%k7}
+# INTEL: vcvttps2iubs ymm22 {k7}, ymm23
+0x62,0xa5,0x7d,0x2f,0x6a,0xf7
+
+# ATT: vcvttps2iubs {sae}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvttps2iubs ymm22 {k7} {z}, ymm23, {sae}
+0x62,0xa5,0x79,0x9f,0x6a,0xf7
+
+# ATT: vcvttps2iubs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvttps2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvttps2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2iubs (%rip){1to4}, %xmm22
+# INTEL: vcvttps2iubs xmm22, dword ptr [rip]{1to4}
+0x62,0xe5,0x7d,0x18,0x6a,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttps2iubs -512(,%rbp,2), %xmm22
+# INTEL: vcvttps2iubs xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7d,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvttps2iubs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvttps2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7d,0x8f,0x6a,0x71,0x7f
+
+# ATT: vcvttps2iubs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+# INTEL: vcvttps2iubs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+0x62,0xe5,0x7d,0x9f,0x6a,0x72,0x80
+
+# ATT: vcvttps2iubs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvttps2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvttps2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2iubs (%rip){1to8}, %ymm22
+# INTEL: vcvttps2iubs ymm22, dword ptr [rip]{1to8}
+0x62,0xe5,0x7d,0x38,0x6a,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttps2iubs -1024(,%rbp,2), %ymm22
+# INTEL: vcvttps2iubs ymm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7d,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvttps2iubs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvttps2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7d,0xaf,0x6a,0x71,0x7f
+
+# ATT: vcvttps2iubs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+# INTEL: vcvttps2iubs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+0x62,0xe5,0x7d,0xbf,0x6a,0x72,0x80
+
+# ATT: vcvttps2iubs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvttps2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7d,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvttps2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvttps2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7d,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvttps2iubs (%rip){1to16}, %zmm22
+# INTEL: vcvttps2iubs zmm22, dword ptr [rip]{1to16}
+0x62,0xe5,0x7d,0x58,0x6a,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvttps2iubs -2048(,%rbp,2), %zmm22
+# INTEL: vcvttps2iubs zmm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7d,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvttps2iubs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvttps2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7d,0xcf,0x6a,0x71,0x7f
+
+# ATT: vcvttps2iubs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+# INTEL: vcvttps2iubs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+0x62,0xe5,0x7d,0xdf,0x6a,0x72,0x80
+
diff --git a/llvm/test/MC/X86/avx10.2satcvt-32-att.s b/llvm/test/MC/X86/avx10.2satcvt-32-att.s
new file mode 100644
index 0000000000000..b69b850e87687
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2satcvt-32-att.s
@@ -0,0 +1,1362 @@
+// RUN: llvm-mc -triple i386 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvtnebf162ibs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0xd3]
+ vcvtnebf162ibs %xmm3, %xmm2
+
+// CHECK: vcvtnebf162ibs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x69,0xd3]
+ vcvtnebf162ibs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtnebf162ibs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x69,0xd3]
+ vcvtnebf162ibs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0xd3]
+ vcvtnebf162ibs %zmm3, %zmm2
+
+// CHECK: vcvtnebf162ibs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x69,0xd3]
+ vcvtnebf162ibs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtnebf162ibs %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x69,0xd3]
+ vcvtnebf162ibs %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0xd3]
+ vcvtnebf162ibs %ymm3, %ymm2
+
+// CHECK: vcvtnebf162ibs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x69,0xd3]
+ vcvtnebf162ibs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtnebf162ibs %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x69,0xd3]
+ vcvtnebf162ibs %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvtnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvtnebf162ibs (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x69,0x10]
+ vcvtnebf162ibs (%eax){1to8}, %xmm2
+
+// CHECK: vcvtnebf162ibs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtnebf162ibs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvtnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x69,0x51,0x7f]
+ vcvtnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x69,0x52,0x80]
+ vcvtnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvtnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvtnebf162ibs (%eax){1to16}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x69,0x10]
+ vcvtnebf162ibs (%eax){1to16}, %ymm2
+
+// CHECK: vcvtnebf162ibs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtnebf162ibs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvtnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x69,0x51,0x7f]
+ vcvtnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x69,0x52,0x80]
+ vcvtnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvtnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvtnebf162ibs (%eax){1to32}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x69,0x10]
+ vcvtnebf162ibs (%eax){1to32}, %zmm2
+
+// CHECK: vcvtnebf162ibs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtnebf162ibs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvtnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x69,0x51,0x7f]
+ vcvtnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x69,0x52,0x80]
+ vcvtnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0xd3]
+ vcvtnebf162iubs %xmm3, %xmm2
+
+// CHECK: vcvtnebf162iubs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6b,0xd3]
+ vcvtnebf162iubs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtnebf162iubs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6b,0xd3]
+ vcvtnebf162iubs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0xd3]
+ vcvtnebf162iubs %zmm3, %zmm2
+
+// CHECK: vcvtnebf162iubs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6b,0xd3]
+ vcvtnebf162iubs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtnebf162iubs %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6b,0xd3]
+ vcvtnebf162iubs %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0xd3]
+ vcvtnebf162iubs %ymm3, %ymm2
+
+// CHECK: vcvtnebf162iubs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6b,0xd3]
+ vcvtnebf162iubs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtnebf162iubs %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6b,0xd3]
+ vcvtnebf162iubs %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvtnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvtnebf162iubs (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x6b,0x10]
+ vcvtnebf162iubs (%eax){1to8}, %xmm2
+
+// CHECK: vcvtnebf162iubs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtnebf162iubs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvtnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6b,0x51,0x7f]
+ vcvtnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x6b,0x52,0x80]
+ vcvtnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvtnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvtnebf162iubs (%eax){1to16}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x6b,0x10]
+ vcvtnebf162iubs (%eax){1to16}, %ymm2
+
+// CHECK: vcvtnebf162iubs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtnebf162iubs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvtnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6b,0x51,0x7f]
+ vcvtnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x6b,0x52,0x80]
+ vcvtnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvtnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvtnebf162iubs (%eax){1to32}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x6b,0x10]
+ vcvtnebf162iubs (%eax){1to32}, %zmm2
+
+// CHECK: vcvtnebf162iubs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtnebf162iubs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvtnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6b,0x51,0x7f]
+ vcvtnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x6b,0x52,0x80]
+ vcvtnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+
+// CHECK: vcvtph2ibs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x69,0xd3]
+ vcvtph2ibs %xmm3, %xmm2
+
+// CHECK: vcvtph2ibs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x69,0xd3]
+ vcvtph2ibs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtph2ibs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x69,0xd3]
+ vcvtph2ibs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtph2ibs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x69,0xd3]
+ vcvtph2ibs %zmm3, %zmm2
+
+// CHECK: vcvtph2ibs {rn-sae}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x69,0xd3]
+ vcvtph2ibs {rn-sae}, %zmm3, %zmm2
+
+// CHECK: vcvtph2ibs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x69,0xd3]
+ vcvtph2ibs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtph2ibs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xff,0x69,0xd3]
+ vcvtph2ibs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtph2ibs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x69,0xd3]
+ vcvtph2ibs %ymm3, %ymm2
+
+// CHECK: vcvtph2ibs {rn-sae}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x78,0x18,0x69,0xd3]
+ vcvtph2ibs {rn-sae}, %ymm3, %ymm2
+
+// CHECK: vcvtph2ibs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x69,0xd3]
+ vcvtph2ibs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtph2ibs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x78,0xff,0x69,0xd3]
+ vcvtph2ibs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtph2ibs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2ibs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvtph2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvtph2ibs (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x69,0x10]
+ vcvtph2ibs (%eax){1to8}, %xmm2
+
+// CHECK: vcvtph2ibs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtph2ibs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvtph2ibs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x69,0x51,0x7f]
+ vcvtph2ibs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtph2ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x69,0x52,0x80]
+ vcvtph2ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtph2ibs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2ibs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvtph2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvtph2ibs (%eax){1to16}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x38,0x69,0x10]
+ vcvtph2ibs (%eax){1to16}, %ymm2
+
+// CHECK: vcvtph2ibs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtph2ibs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvtph2ibs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xaf,0x69,0x51,0x7f]
+ vcvtph2ibs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvtph2ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xbf,0x69,0x52,0x80]
+ vcvtph2ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+
+// CHECK: vcvtph2ibs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2ibs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvtph2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvtph2ibs (%eax){1to32}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x58,0x69,0x10]
+ vcvtph2ibs (%eax){1to32}, %zmm2
+
+// CHECK: vcvtph2ibs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtph2ibs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvtph2ibs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xcf,0x69,0x51,0x7f]
+ vcvtph2ibs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvtph2ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xdf,0x69,0x52,0x80]
+ vcvtph2ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+
+// CHECK: vcvtph2iubs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6b,0xd3]
+ vcvtph2iubs %xmm3, %xmm2
+
+// CHECK: vcvtph2iubs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x6b,0xd3]
+ vcvtph2iubs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtph2iubs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x6b,0xd3]
+ vcvtph2iubs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtph2iubs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6b,0xd3]
+ vcvtph2iubs %zmm3, %zmm2
+
+// CHECK: vcvtph2iubs {rn-sae}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x6b,0xd3]
+ vcvtph2iubs {rn-sae}, %zmm3, %zmm2
+
+// CHECK: vcvtph2iubs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x6b,0xd3]
+ vcvtph2iubs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtph2iubs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xff,0x6b,0xd3]
+ vcvtph2iubs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtph2iubs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6b,0xd3]
+ vcvtph2iubs %ymm3, %ymm2
+
+// CHECK: vcvtph2iubs {rn-sae}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x78,0x18,0x6b,0xd3]
+ vcvtph2iubs {rn-sae}, %ymm3, %ymm2
+
+// CHECK: vcvtph2iubs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x6b,0xd3]
+ vcvtph2iubs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtph2iubs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x78,0xff,0x6b,0xd3]
+ vcvtph2iubs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtph2iubs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2iubs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvtph2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvtph2iubs (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x6b,0x10]
+ vcvtph2iubs (%eax){1to8}, %xmm2
+
+// CHECK: vcvtph2iubs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtph2iubs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvtph2iubs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x6b,0x51,0x7f]
+ vcvtph2iubs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtph2iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x6b,0x52,0x80]
+ vcvtph2iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtph2iubs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2iubs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvtph2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvtph2iubs (%eax){1to16}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x38,0x6b,0x10]
+ vcvtph2iubs (%eax){1to16}, %ymm2
+
+// CHECK: vcvtph2iubs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtph2iubs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvtph2iubs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xaf,0x6b,0x51,0x7f]
+ vcvtph2iubs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvtph2iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xbf,0x6b,0x52,0x80]
+ vcvtph2iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+
+// CHECK: vcvtph2iubs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2iubs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvtph2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvtph2iubs (%eax){1to32}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x58,0x6b,0x10]
+ vcvtph2iubs (%eax){1to32}, %zmm2
+
+// CHECK: vcvtph2iubs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtph2iubs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvtph2iubs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xcf,0x6b,0x51,0x7f]
+ vcvtph2iubs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvtph2iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xdf,0x6b,0x52,0x80]
+ vcvtph2iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+
+// CHECK: vcvtps2ibs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x69,0xd3]
+ vcvtps2ibs %xmm3, %xmm2
+
+// CHECK: vcvtps2ibs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x69,0xd3]
+ vcvtps2ibs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtps2ibs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x69,0xd3]
+ vcvtps2ibs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtps2ibs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x69,0xd3]
+ vcvtps2ibs %zmm3, %zmm2
+
+// CHECK: vcvtps2ibs {rn-sae}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x69,0xd3]
+ vcvtps2ibs {rn-sae}, %zmm3, %zmm2
+
+// CHECK: vcvtps2ibs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x69,0xd3]
+ vcvtps2ibs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtps2ibs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xff,0x69,0xd3]
+ vcvtps2ibs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtps2ibs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x69,0xd3]
+ vcvtps2ibs %ymm3, %ymm2
+
+// CHECK: vcvtps2ibs {rn-sae}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x79,0x18,0x69,0xd3]
+ vcvtps2ibs {rn-sae}, %ymm3, %ymm2
+
+// CHECK: vcvtps2ibs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x69,0xd3]
+ vcvtps2ibs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtps2ibs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x79,0xff,0x69,0xd3]
+ vcvtps2ibs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtps2ibs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2ibs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvtps2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvtps2ibs (%eax){1to4}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x69,0x10]
+ vcvtps2ibs (%eax){1to4}, %xmm2
+
+// CHECK: vcvtps2ibs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtps2ibs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvtps2ibs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x69,0x51,0x7f]
+ vcvtps2ibs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtps2ibs -512(%edx){1to4}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x69,0x52,0x80]
+ vcvtps2ibs -512(%edx){1to4}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtps2ibs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2ibs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvtps2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvtps2ibs (%eax){1to8}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x38,0x69,0x10]
+ vcvtps2ibs (%eax){1to8}, %ymm2
+
+// CHECK: vcvtps2ibs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtps2ibs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvtps2ibs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xaf,0x69,0x51,0x7f]
+ vcvtps2ibs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvtps2ibs -512(%edx){1to8}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xbf,0x69,0x52,0x80]
+ vcvtps2ibs -512(%edx){1to8}, %ymm2 {%k7} {z}
+
+// CHECK: vcvtps2ibs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2ibs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvtps2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvtps2ibs (%eax){1to16}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x58,0x69,0x10]
+ vcvtps2ibs (%eax){1to16}, %zmm2
+
+// CHECK: vcvtps2ibs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtps2ibs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvtps2ibs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xcf,0x69,0x51,0x7f]
+ vcvtps2ibs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvtps2ibs -512(%edx){1to16}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xdf,0x69,0x52,0x80]
+ vcvtps2ibs -512(%edx){1to16}, %zmm2 {%k7} {z}
+
+// CHECK: vcvtps2iubs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6b,0xd3]
+ vcvtps2iubs %xmm3, %xmm2
+
+// CHECK: vcvtps2iubs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x6b,0xd3]
+ vcvtps2iubs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtps2iubs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x6b,0xd3]
+ vcvtps2iubs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtps2iubs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6b,0xd3]
+ vcvtps2iubs %zmm3, %zmm2
+
+// CHECK: vcvtps2iubs {rn-sae}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x6b,0xd3]
+ vcvtps2iubs {rn-sae}, %zmm3, %zmm2
+
+// CHECK: vcvtps2iubs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x6b,0xd3]
+ vcvtps2iubs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtps2iubs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xff,0x6b,0xd3]
+ vcvtps2iubs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtps2iubs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6b,0xd3]
+ vcvtps2iubs %ymm3, %ymm2
+
+// CHECK: vcvtps2iubs {rn-sae}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x79,0x18,0x6b,0xd3]
+ vcvtps2iubs {rn-sae}, %ymm3, %ymm2
+
+// CHECK: vcvtps2iubs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x6b,0xd3]
+ vcvtps2iubs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtps2iubs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x79,0xff,0x6b,0xd3]
+ vcvtps2iubs {rz-sae}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtps2iubs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2iubs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvtps2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvtps2iubs (%eax){1to4}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x6b,0x10]
+ vcvtps2iubs (%eax){1to4}, %xmm2
+
+// CHECK: vcvtps2iubs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtps2iubs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvtps2iubs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x6b,0x51,0x7f]
+ vcvtps2iubs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtps2iubs -512(%edx){1to4}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x6b,0x52,0x80]
+ vcvtps2iubs -512(%edx){1to4}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtps2iubs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2iubs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvtps2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvtps2iubs (%eax){1to8}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x38,0x6b,0x10]
+ vcvtps2iubs (%eax){1to8}, %ymm2
+
+// CHECK: vcvtps2iubs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtps2iubs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvtps2iubs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xaf,0x6b,0x51,0x7f]
+ vcvtps2iubs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvtps2iubs -512(%edx){1to8}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xbf,0x6b,0x52,0x80]
+ vcvtps2iubs -512(%edx){1to8}, %ymm2 {%k7} {z}
+
+// CHECK: vcvtps2iubs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2iubs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvtps2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvtps2iubs (%eax){1to16}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x58,0x6b,0x10]
+ vcvtps2iubs (%eax){1to16}, %zmm2
+
+// CHECK: vcvtps2iubs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtps2iubs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvtps2iubs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xcf,0x6b,0x51,0x7f]
+ vcvtps2iubs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvtps2iubs -512(%edx){1to16}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xdf,0x6b,0x52,0x80]
+ vcvtps2iubs -512(%edx){1to16}, %zmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0xd3]
+ vcvttnebf162ibs %xmm3, %xmm2
+
+// CHECK: vcvttnebf162ibs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x68,0xd3]
+ vcvttnebf162ibs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvttnebf162ibs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x68,0xd3]
+ vcvttnebf162ibs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0xd3]
+ vcvttnebf162ibs %zmm3, %zmm2
+
+// CHECK: vcvttnebf162ibs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x68,0xd3]
+ vcvttnebf162ibs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvttnebf162ibs %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x68,0xd3]
+ vcvttnebf162ibs %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0xd3]
+ vcvttnebf162ibs %ymm3, %ymm2
+
+// CHECK: vcvttnebf162ibs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x68,0xd3]
+ vcvttnebf162ibs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvttnebf162ibs %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x68,0xd3]
+ vcvttnebf162ibs %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvttnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvttnebf162ibs (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x68,0x10]
+ vcvttnebf162ibs (%eax){1to8}, %xmm2
+
+// CHECK: vcvttnebf162ibs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttnebf162ibs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvttnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x68,0x51,0x7f]
+ vcvttnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x68,0x52,0x80]
+ vcvttnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvttnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvttnebf162ibs (%eax){1to16}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x68,0x10]
+ vcvttnebf162ibs (%eax){1to16}, %ymm2
+
+// CHECK: vcvttnebf162ibs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttnebf162ibs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvttnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x68,0x51,0x7f]
+ vcvttnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x68,0x52,0x80]
+ vcvttnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvttnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvttnebf162ibs (%eax){1to32}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x68,0x10]
+ vcvttnebf162ibs (%eax){1to32}, %zmm2
+
+// CHECK: vcvttnebf162ibs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttnebf162ibs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvttnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x68,0x51,0x7f]
+ vcvttnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x68,0x52,0x80]
+ vcvttnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0xd3]
+ vcvttnebf162iubs %xmm3, %xmm2
+
+// CHECK: vcvttnebf162iubs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6a,0xd3]
+ vcvttnebf162iubs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvttnebf162iubs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6a,0xd3]
+ vcvttnebf162iubs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0xd3]
+ vcvttnebf162iubs %zmm3, %zmm2
+
+// CHECK: vcvttnebf162iubs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6a,0xd3]
+ vcvttnebf162iubs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvttnebf162iubs %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6a,0xd3]
+ vcvttnebf162iubs %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0xd3]
+ vcvttnebf162iubs %ymm3, %ymm2
+
+// CHECK: vcvttnebf162iubs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6a,0xd3]
+ vcvttnebf162iubs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvttnebf162iubs %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6a,0xd3]
+ vcvttnebf162iubs %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvttnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvttnebf162iubs (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x6a,0x10]
+ vcvttnebf162iubs (%eax){1to8}, %xmm2
+
+// CHECK: vcvttnebf162iubs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttnebf162iubs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvttnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6a,0x51,0x7f]
+ vcvttnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x6a,0x52,0x80]
+ vcvttnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvttnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvttnebf162iubs (%eax){1to16}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x6a,0x10]
+ vcvttnebf162iubs (%eax){1to16}, %ymm2
+
+// CHECK: vcvttnebf162iubs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttnebf162iubs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvttnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6a,0x51,0x7f]
+ vcvttnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x6a,0x52,0x80]
+ vcvttnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvttnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvttnebf162iubs (%eax){1to32}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x6a,0x10]
+ vcvttnebf162iubs (%eax){1to32}, %zmm2
+
+// CHECK: vcvttnebf162iubs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttnebf162iubs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvttnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6a,0x51,0x7f]
+ vcvttnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x6a,0x52,0x80]
+ vcvttnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+
+// CHECK: vcvttph2ibs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x68,0xd3]
+ vcvttph2ibs %xmm3, %xmm2
+
+// CHECK: vcvttph2ibs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x68,0xd3]
+ vcvttph2ibs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvttph2ibs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x68,0xd3]
+ vcvttph2ibs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvttph2ibs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x68,0xd3]
+ vcvttph2ibs %zmm3, %zmm2
+
+// CHECK: vcvttph2ibs {sae}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x68,0xd3]
+ vcvttph2ibs {sae}, %zmm3, %zmm2
+
+// CHECK: vcvttph2ibs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x68,0xd3]
+ vcvttph2ibs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvttph2ibs {sae}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x68,0xd3]
+ vcvttph2ibs {sae}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvttph2ibs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x68,0xd3]
+ vcvttph2ibs %ymm3, %ymm2
+
+// CHECK: vcvttph2ibs {sae}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x78,0x18,0x68,0xd3]
+ vcvttph2ibs {sae}, %ymm3, %ymm2
+
+// CHECK: vcvttph2ibs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x68,0xd3]
+ vcvttph2ibs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvttph2ibs {sae}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x78,0x9f,0x68,0xd3]
+ vcvttph2ibs {sae}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvttph2ibs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2ibs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvttph2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvttph2ibs (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x68,0x10]
+ vcvttph2ibs (%eax){1to8}, %xmm2
+
+// CHECK: vcvttph2ibs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttph2ibs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvttph2ibs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x68,0x51,0x7f]
+ vcvttph2ibs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvttph2ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x68,0x52,0x80]
+ vcvttph2ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvttph2ibs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2ibs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvttph2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvttph2ibs (%eax){1to16}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x38,0x68,0x10]
+ vcvttph2ibs (%eax){1to16}, %ymm2
+
+// CHECK: vcvttph2ibs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttph2ibs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvttph2ibs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xaf,0x68,0x51,0x7f]
+ vcvttph2ibs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvttph2ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xbf,0x68,0x52,0x80]
+ vcvttph2ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+
+// CHECK: vcvttph2ibs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2ibs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvttph2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvttph2ibs (%eax){1to32}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x58,0x68,0x10]
+ vcvttph2ibs (%eax){1to32}, %zmm2
+
+// CHECK: vcvttph2ibs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttph2ibs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvttph2ibs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xcf,0x68,0x51,0x7f]
+ vcvttph2ibs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvttph2ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xdf,0x68,0x52,0x80]
+ vcvttph2ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+
+// CHECK: vcvttph2iubs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6a,0xd3]
+ vcvttph2iubs %xmm3, %xmm2
+
+// CHECK: vcvttph2iubs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x6a,0xd3]
+ vcvttph2iubs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvttph2iubs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x6a,0xd3]
+ vcvttph2iubs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvttph2iubs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6a,0xd3]
+ vcvttph2iubs %zmm3, %zmm2
+
+// CHECK: vcvttph2iubs {sae}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x6a,0xd3]
+ vcvttph2iubs {sae}, %zmm3, %zmm2
+
+// CHECK: vcvttph2iubs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x6a,0xd3]
+ vcvttph2iubs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvttph2iubs {sae}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x6a,0xd3]
+ vcvttph2iubs {sae}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvttph2iubs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6a,0xd3]
+ vcvttph2iubs %ymm3, %ymm2
+
+// CHECK: vcvttph2iubs {sae}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x78,0x18,0x6a,0xd3]
+ vcvttph2iubs {sae}, %ymm3, %ymm2
+
+// CHECK: vcvttph2iubs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x6a,0xd3]
+ vcvttph2iubs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvttph2iubs {sae}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x78,0x9f,0x6a,0xd3]
+ vcvttph2iubs {sae}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvttph2iubs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2iubs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvttph2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvttph2iubs (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x6a,0x10]
+ vcvttph2iubs (%eax){1to8}, %xmm2
+
+// CHECK: vcvttph2iubs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttph2iubs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvttph2iubs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x6a,0x51,0x7f]
+ vcvttph2iubs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvttph2iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x6a,0x52,0x80]
+ vcvttph2iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvttph2iubs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2iubs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvttph2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvttph2iubs (%eax){1to16}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x38,0x6a,0x10]
+ vcvttph2iubs (%eax){1to16}, %ymm2
+
+// CHECK: vcvttph2iubs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttph2iubs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvttph2iubs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xaf,0x6a,0x51,0x7f]
+ vcvttph2iubs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvttph2iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xbf,0x6a,0x52,0x80]
+ vcvttph2iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+
+// CHECK: vcvttph2iubs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2iubs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvttph2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvttph2iubs (%eax){1to32}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x58,0x6a,0x10]
+ vcvttph2iubs (%eax){1to32}, %zmm2
+
+// CHECK: vcvttph2iubs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttph2iubs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvttph2iubs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xcf,0x6a,0x51,0x7f]
+ vcvttph2iubs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvttph2iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xdf,0x6a,0x52,0x80]
+ vcvttph2iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+
+// CHECK: vcvttps2ibs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x68,0xd3]
+ vcvttps2ibs %xmm3, %xmm2
+
+// CHECK: vcvttps2ibs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x68,0xd3]
+ vcvttps2ibs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvttps2ibs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x68,0xd3]
+ vcvttps2ibs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvttps2ibs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x68,0xd3]
+ vcvttps2ibs %zmm3, %zmm2
+
+// CHECK: vcvttps2ibs {sae}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x68,0xd3]
+ vcvttps2ibs {sae}, %zmm3, %zmm2
+
+// CHECK: vcvttps2ibs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x68,0xd3]
+ vcvttps2ibs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvttps2ibs {sae}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x68,0xd3]
+ vcvttps2ibs {sae}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvttps2ibs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x68,0xd3]
+ vcvttps2ibs %ymm3, %ymm2
+
+// CHECK: vcvttps2ibs {sae}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x79,0x18,0x68,0xd3]
+ vcvttps2ibs {sae}, %ymm3, %ymm2
+
+// CHECK: vcvttps2ibs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x68,0xd3]
+ vcvttps2ibs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvttps2ibs {sae}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x79,0x9f,0x68,0xd3]
+ vcvttps2ibs {sae}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvttps2ibs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2ibs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvttps2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2ibs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvttps2ibs (%eax){1to4}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x68,0x10]
+ vcvttps2ibs (%eax){1to4}, %xmm2
+
+// CHECK: vcvttps2ibs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttps2ibs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvttps2ibs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x68,0x51,0x7f]
+ vcvttps2ibs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvttps2ibs -512(%edx){1to4}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x68,0x52,0x80]
+ vcvttps2ibs -512(%edx){1to4}, %xmm2 {%k7} {z}
+
+// CHECK: vcvttps2ibs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2ibs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvttps2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2ibs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvttps2ibs (%eax){1to8}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x38,0x68,0x10]
+ vcvttps2ibs (%eax){1to8}, %ymm2
+
+// CHECK: vcvttps2ibs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttps2ibs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvttps2ibs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xaf,0x68,0x51,0x7f]
+ vcvttps2ibs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvttps2ibs -512(%edx){1to8}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xbf,0x68,0x52,0x80]
+ vcvttps2ibs -512(%edx){1to8}, %ymm2 {%k7} {z}
+
+// CHECK: vcvttps2ibs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2ibs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvttps2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2ibs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvttps2ibs (%eax){1to16}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x58,0x68,0x10]
+ vcvttps2ibs (%eax){1to16}, %zmm2
+
+// CHECK: vcvttps2ibs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttps2ibs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvttps2ibs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xcf,0x68,0x51,0x7f]
+ vcvttps2ibs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvttps2ibs -512(%edx){1to16}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xdf,0x68,0x52,0x80]
+ vcvttps2ibs -512(%edx){1to16}, %zmm2 {%k7} {z}
+
+// CHECK: vcvttps2iubs %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6a,0xd3]
+ vcvttps2iubs %xmm3, %xmm2
+
+// CHECK: vcvttps2iubs %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x6a,0xd3]
+ vcvttps2iubs %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvttps2iubs %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x6a,0xd3]
+ vcvttps2iubs %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvttps2iubs %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6a,0xd3]
+ vcvttps2iubs %zmm3, %zmm2
+
+// CHECK: vcvttps2iubs {sae}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x6a,0xd3]
+ vcvttps2iubs {sae}, %zmm3, %zmm2
+
+// CHECK: vcvttps2iubs %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x6a,0xd3]
+ vcvttps2iubs %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvttps2iubs {sae}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x6a,0xd3]
+ vcvttps2iubs {sae}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvttps2iubs %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6a,0xd3]
+ vcvttps2iubs %ymm3, %ymm2
+
+// CHECK: vcvttps2iubs {sae}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x79,0x18,0x6a,0xd3]
+ vcvttps2iubs {sae}, %ymm3, %ymm2
+
+// CHECK: vcvttps2iubs %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x6a,0xd3]
+ vcvttps2iubs %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvttps2iubs {sae}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x79,0x9f,0x6a,0xd3]
+ vcvttps2iubs {sae}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvttps2iubs 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2iubs 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvttps2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2iubs 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvttps2iubs (%eax){1to4}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x6a,0x10]
+ vcvttps2iubs (%eax){1to4}, %xmm2
+
+// CHECK: vcvttps2iubs -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttps2iubs -512(,%ebp,2), %xmm2
+
+// CHECK: vcvttps2iubs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x6a,0x51,0x7f]
+ vcvttps2iubs 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvttps2iubs -512(%edx){1to4}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x6a,0x52,0x80]
+ vcvttps2iubs -512(%edx){1to4}, %xmm2 {%k7} {z}
+
+// CHECK: vcvttps2iubs 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2iubs 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvttps2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2iubs 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvttps2iubs (%eax){1to8}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x38,0x6a,0x10]
+ vcvttps2iubs (%eax){1to8}, %ymm2
+
+// CHECK: vcvttps2iubs -1024(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttps2iubs -1024(,%ebp,2), %ymm2
+
+// CHECK: vcvttps2iubs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xaf,0x6a,0x51,0x7f]
+ vcvttps2iubs 4064(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvttps2iubs -512(%edx){1to8}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xbf,0x6a,0x52,0x80]
+ vcvttps2iubs -512(%edx){1to8}, %ymm2 {%k7} {z}
+
+// CHECK: vcvttps2iubs 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2iubs 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvttps2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2iubs 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvttps2iubs (%eax){1to16}, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x58,0x6a,0x10]
+ vcvttps2iubs (%eax){1to16}, %zmm2
+
+// CHECK: vcvttps2iubs -2048(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttps2iubs -2048(,%ebp,2), %zmm2
+
+// CHECK: vcvttps2iubs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xcf,0x6a,0x51,0x7f]
+ vcvttps2iubs 8128(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvttps2iubs -512(%edx){1to16}, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xdf,0x6a,0x52,0x80]
+ vcvttps2iubs -512(%edx){1to16}, %zmm2 {%k7} {z}
+
diff --git a/llvm/test/MC/X86/avx10.2satcvt-32-intel.s b/llvm/test/MC/X86/avx10.2satcvt-32-intel.s
new file mode 100644
index 0000000000000..4c22544f27b7e
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2satcvt-32-intel.s
@@ -0,0 +1,1362 @@
+// RUN: llvm-mc -triple i386 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvtnebf162ibs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0xd3]
+ vcvtnebf162ibs xmm2, xmm3
+
+// CHECK: vcvtnebf162ibs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x69,0xd3]
+ vcvtnebf162ibs xmm2 {k7}, xmm3
+
+// CHECK: vcvtnebf162ibs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x69,0xd3]
+ vcvtnebf162ibs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvtnebf162ibs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0xd3]
+ vcvtnebf162ibs zmm2, zmm3
+
+// CHECK: vcvtnebf162ibs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x69,0xd3]
+ vcvtnebf162ibs zmm2 {k7}, zmm3
+
+// CHECK: vcvtnebf162ibs zmm2 {k7} {z}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x69,0xd3]
+ vcvtnebf162ibs zmm2 {k7} {z}, zmm3
+
+// CHECK: vcvtnebf162ibs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0xd3]
+ vcvtnebf162ibs ymm2, ymm3
+
+// CHECK: vcvtnebf162ibs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x69,0xd3]
+ vcvtnebf162ibs ymm2 {k7}, ymm3
+
+// CHECK: vcvtnebf162ibs ymm2 {k7} {z}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x69,0xd3]
+ vcvtnebf162ibs ymm2 {k7} {z}, ymm3
+
+// CHECK: vcvtnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtnebf162ibs xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x69,0x10]
+ vcvtnebf162ibs xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvtnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x69,0x51,0x7f]
+ vcvtnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x69,0x52,0x80]
+ vcvtnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtnebf162ibs ymm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x69,0x10]
+ vcvtnebf162ibs ymm2, word ptr [eax]{1to16}
+
+// CHECK: vcvtnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x69,0x51,0x7f]
+ vcvtnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x69,0x52,0x80]
+ vcvtnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtnebf162ibs zmm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x69,0x10]
+ vcvtnebf162ibs zmm2, word ptr [eax]{1to32}
+
+// CHECK: vcvtnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x69,0x51,0x7f]
+ vcvtnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x69,0x52,0x80]
+ vcvtnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtnebf162iubs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0xd3]
+ vcvtnebf162iubs xmm2, xmm3
+
+// CHECK: vcvtnebf162iubs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6b,0xd3]
+ vcvtnebf162iubs xmm2 {k7}, xmm3
+
+// CHECK: vcvtnebf162iubs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6b,0xd3]
+ vcvtnebf162iubs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvtnebf162iubs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0xd3]
+ vcvtnebf162iubs zmm2, zmm3
+
+// CHECK: vcvtnebf162iubs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6b,0xd3]
+ vcvtnebf162iubs zmm2 {k7}, zmm3
+
+// CHECK: vcvtnebf162iubs zmm2 {k7} {z}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6b,0xd3]
+ vcvtnebf162iubs zmm2 {k7} {z}, zmm3
+
+// CHECK: vcvtnebf162iubs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0xd3]
+ vcvtnebf162iubs ymm2, ymm3
+
+// CHECK: vcvtnebf162iubs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6b,0xd3]
+ vcvtnebf162iubs ymm2 {k7}, ymm3
+
+// CHECK: vcvtnebf162iubs ymm2 {k7} {z}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6b,0xd3]
+ vcvtnebf162iubs ymm2 {k7} {z}, ymm3
+
+// CHECK: vcvtnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtnebf162iubs xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x6b,0x10]
+ vcvtnebf162iubs xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvtnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6b,0x51,0x7f]
+ vcvtnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x6b,0x52,0x80]
+ vcvtnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtnebf162iubs ymm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x6b,0x10]
+ vcvtnebf162iubs ymm2, word ptr [eax]{1to16}
+
+// CHECK: vcvtnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6b,0x51,0x7f]
+ vcvtnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x6b,0x52,0x80]
+ vcvtnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtnebf162iubs zmm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x6b,0x10]
+ vcvtnebf162iubs zmm2, word ptr [eax]{1to32}
+
+// CHECK: vcvtnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6b,0x51,0x7f]
+ vcvtnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x6b,0x52,0x80]
+ vcvtnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtph2ibs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x69,0xd3]
+ vcvtph2ibs xmm2, xmm3
+
+// CHECK: vcvtph2ibs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x69,0xd3]
+ vcvtph2ibs xmm2 {k7}, xmm3
+
+// CHECK: vcvtph2ibs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x69,0xd3]
+ vcvtph2ibs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvtph2ibs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x69,0xd3]
+ vcvtph2ibs zmm2, zmm3
+
+// CHECK: vcvtph2ibs zmm2, zmm3, {rn-sae}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x69,0xd3]
+ vcvtph2ibs zmm2, zmm3, {rn-sae}
+
+// CHECK: vcvtph2ibs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x69,0xd3]
+ vcvtph2ibs zmm2 {k7}, zmm3
+
+// CHECK: vcvtph2ibs zmm2 {k7} {z}, zmm3, {rz-sae}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xff,0x69,0xd3]
+ vcvtph2ibs zmm2 {k7} {z}, zmm3, {rz-sae}
+
+// CHECK: vcvtph2ibs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x69,0xd3]
+ vcvtph2ibs ymm2, ymm3
+
+// CHECK: vcvtph2ibs ymm2, ymm3, {rn-sae}
+// CHECK: encoding: [0x62,0xf5,0x78,0x18,0x69,0xd3]
+ vcvtph2ibs ymm2, ymm3, {rn-sae}
+
+// CHECK: vcvtph2ibs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x69,0xd3]
+ vcvtph2ibs ymm2 {k7}, ymm3
+
+// CHECK: vcvtph2ibs ymm2 {k7} {z}, ymm3, {rz-sae}
+// CHECK: encoding: [0x62,0xf5,0x78,0xff,0x69,0xd3]
+ vcvtph2ibs ymm2 {k7} {z}, ymm3, {rz-sae}
+
+// CHECK: vcvtph2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtph2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtph2ibs xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x69,0x10]
+ vcvtph2ibs xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvtph2ibs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtph2ibs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtph2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x69,0x51,0x7f]
+ vcvtph2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtph2ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x69,0x52,0x80]
+ vcvtph2ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtph2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtph2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtph2ibs ymm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x38,0x69,0x10]
+ vcvtph2ibs ymm2, word ptr [eax]{1to16}
+
+// CHECK: vcvtph2ibs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtph2ibs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtph2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7c,0xaf,0x69,0x51,0x7f]
+ vcvtph2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtph2ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xbf,0x69,0x52,0x80]
+ vcvtph2ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtph2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtph2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtph2ibs zmm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x58,0x69,0x10]
+ vcvtph2ibs zmm2, word ptr [eax]{1to32}
+
+// CHECK: vcvtph2ibs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtph2ibs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtph2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7c,0xcf,0x69,0x51,0x7f]
+ vcvtph2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtph2ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xdf,0x69,0x52,0x80]
+ vcvtph2ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtph2iubs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6b,0xd3]
+ vcvtph2iubs xmm2, xmm3
+
+// CHECK: vcvtph2iubs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x6b,0xd3]
+ vcvtph2iubs xmm2 {k7}, xmm3
+
+// CHECK: vcvtph2iubs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x6b,0xd3]
+ vcvtph2iubs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvtph2iubs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6b,0xd3]
+ vcvtph2iubs zmm2, zmm3
+
+// CHECK: vcvtph2iubs zmm2, zmm3, {rn-sae}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x6b,0xd3]
+ vcvtph2iubs zmm2, zmm3, {rn-sae}
+
+// CHECK: vcvtph2iubs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x6b,0xd3]
+ vcvtph2iubs zmm2 {k7}, zmm3
+
+// CHECK: vcvtph2iubs zmm2 {k7} {z}, zmm3, {rz-sae}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xff,0x6b,0xd3]
+ vcvtph2iubs zmm2 {k7} {z}, zmm3, {rz-sae}
+
+// CHECK: vcvtph2iubs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6b,0xd3]
+ vcvtph2iubs ymm2, ymm3
+
+// CHECK: vcvtph2iubs ymm2, ymm3, {rn-sae}
+// CHECK: encoding: [0x62,0xf5,0x78,0x18,0x6b,0xd3]
+ vcvtph2iubs ymm2, ymm3, {rn-sae}
+
+// CHECK: vcvtph2iubs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x6b,0xd3]
+ vcvtph2iubs ymm2 {k7}, ymm3
+
+// CHECK: vcvtph2iubs ymm2 {k7} {z}, ymm3, {rz-sae}
+// CHECK: encoding: [0x62,0xf5,0x78,0xff,0x6b,0xd3]
+ vcvtph2iubs ymm2 {k7} {z}, ymm3, {rz-sae}
+
+// CHECK: vcvtph2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtph2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtph2iubs xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x6b,0x10]
+ vcvtph2iubs xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvtph2iubs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtph2iubs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtph2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x6b,0x51,0x7f]
+ vcvtph2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtph2iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x6b,0x52,0x80]
+ vcvtph2iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtph2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtph2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtph2iubs ymm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x38,0x6b,0x10]
+ vcvtph2iubs ymm2, word ptr [eax]{1to16}
+
+// CHECK: vcvtph2iubs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtph2iubs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtph2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7c,0xaf,0x6b,0x51,0x7f]
+ vcvtph2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtph2iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xbf,0x6b,0x52,0x80]
+ vcvtph2iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtph2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtph2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtph2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtph2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtph2iubs zmm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x58,0x6b,0x10]
+ vcvtph2iubs zmm2, word ptr [eax]{1to32}
+
+// CHECK: vcvtph2iubs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtph2iubs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtph2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7c,0xcf,0x6b,0x51,0x7f]
+ vcvtph2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtph2iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xdf,0x6b,0x52,0x80]
+ vcvtph2iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtps2ibs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x69,0xd3]
+ vcvtps2ibs xmm2, xmm3
+
+// CHECK: vcvtps2ibs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x69,0xd3]
+ vcvtps2ibs xmm2 {k7}, xmm3
+
+// CHECK: vcvtps2ibs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x69,0xd3]
+ vcvtps2ibs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvtps2ibs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x69,0xd3]
+ vcvtps2ibs zmm2, zmm3
+
+// CHECK: vcvtps2ibs zmm2, zmm3, {rn-sae}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x69,0xd3]
+ vcvtps2ibs zmm2, zmm3, {rn-sae}
+
+// CHECK: vcvtps2ibs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x69,0xd3]
+ vcvtps2ibs zmm2 {k7}, zmm3
+
+// CHECK: vcvtps2ibs zmm2 {k7} {z}, zmm3, {rz-sae}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xff,0x69,0xd3]
+ vcvtps2ibs zmm2 {k7} {z}, zmm3, {rz-sae}
+
+// CHECK: vcvtps2ibs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x69,0xd3]
+ vcvtps2ibs ymm2, ymm3
+
+// CHECK: vcvtps2ibs ymm2, ymm3, {rn-sae}
+// CHECK: encoding: [0x62,0xf5,0x79,0x18,0x69,0xd3]
+ vcvtps2ibs ymm2, ymm3, {rn-sae}
+
+// CHECK: vcvtps2ibs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x69,0xd3]
+ vcvtps2ibs ymm2 {k7}, ymm3
+
+// CHECK: vcvtps2ibs ymm2 {k7} {z}, ymm3, {rz-sae}
+// CHECK: encoding: [0x62,0xf5,0x79,0xff,0x69,0xd3]
+ vcvtps2ibs ymm2 {k7} {z}, ymm3, {rz-sae}
+
+// CHECK: vcvtps2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtps2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtps2ibs xmm2, dword ptr [eax]{1to4}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x69,0x10]
+ vcvtps2ibs xmm2, dword ptr [eax]{1to4}
+
+// CHECK: vcvtps2ibs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtps2ibs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtps2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x69,0x51,0x7f]
+ vcvtps2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtps2ibs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x69,0x52,0x80]
+ vcvtps2ibs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+
+// CHECK: vcvtps2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtps2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtps2ibs ymm2, dword ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x38,0x69,0x10]
+ vcvtps2ibs ymm2, dword ptr [eax]{1to8}
+
+// CHECK: vcvtps2ibs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtps2ibs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtps2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7d,0xaf,0x69,0x51,0x7f]
+ vcvtps2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtps2ibs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xbf,0x69,0x52,0x80]
+ vcvtps2ibs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+
+// CHECK: vcvtps2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtps2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtps2ibs zmm2, dword ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x58,0x69,0x10]
+ vcvtps2ibs zmm2, dword ptr [eax]{1to16}
+
+// CHECK: vcvtps2ibs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtps2ibs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtps2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7d,0xcf,0x69,0x51,0x7f]
+ vcvtps2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtps2ibs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xdf,0x69,0x52,0x80]
+ vcvtps2ibs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+
+// CHECK: vcvtps2iubs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6b,0xd3]
+ vcvtps2iubs xmm2, xmm3
+
+// CHECK: vcvtps2iubs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x6b,0xd3]
+ vcvtps2iubs xmm2 {k7}, xmm3
+
+// CHECK: vcvtps2iubs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x6b,0xd3]
+ vcvtps2iubs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvtps2iubs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6b,0xd3]
+ vcvtps2iubs zmm2, zmm3
+
+// CHECK: vcvtps2iubs zmm2, zmm3, {rn-sae}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x6b,0xd3]
+ vcvtps2iubs zmm2, zmm3, {rn-sae}
+
+// CHECK: vcvtps2iubs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x6b,0xd3]
+ vcvtps2iubs zmm2 {k7}, zmm3
+
+// CHECK: vcvtps2iubs zmm2 {k7} {z}, zmm3, {rz-sae}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xff,0x6b,0xd3]
+ vcvtps2iubs zmm2 {k7} {z}, zmm3, {rz-sae}
+
+// CHECK: vcvtps2iubs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6b,0xd3]
+ vcvtps2iubs ymm2, ymm3
+
+// CHECK: vcvtps2iubs ymm2, ymm3, {rn-sae}
+// CHECK: encoding: [0x62,0xf5,0x79,0x18,0x6b,0xd3]
+ vcvtps2iubs ymm2, ymm3, {rn-sae}
+
+// CHECK: vcvtps2iubs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x6b,0xd3]
+ vcvtps2iubs ymm2 {k7}, ymm3
+
+// CHECK: vcvtps2iubs ymm2 {k7} {z}, ymm3, {rz-sae}
+// CHECK: encoding: [0x62,0xf5,0x79,0xff,0x6b,0xd3]
+ vcvtps2iubs ymm2 {k7} {z}, ymm3, {rz-sae}
+
+// CHECK: vcvtps2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtps2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtps2iubs xmm2, dword ptr [eax]{1to4}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x6b,0x10]
+ vcvtps2iubs xmm2, dword ptr [eax]{1to4}
+
+// CHECK: vcvtps2iubs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtps2iubs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtps2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x6b,0x51,0x7f]
+ vcvtps2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtps2iubs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x6b,0x52,0x80]
+ vcvtps2iubs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+
+// CHECK: vcvtps2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtps2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtps2iubs ymm2, dword ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x38,0x6b,0x10]
+ vcvtps2iubs ymm2, dword ptr [eax]{1to8}
+
+// CHECK: vcvtps2iubs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtps2iubs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtps2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7d,0xaf,0x6b,0x51,0x7f]
+ vcvtps2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtps2iubs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xbf,0x6b,0x52,0x80]
+ vcvtps2iubs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+
+// CHECK: vcvtps2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtps2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtps2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtps2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtps2iubs zmm2, dword ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x58,0x6b,0x10]
+ vcvtps2iubs zmm2, dword ptr [eax]{1to16}
+
+// CHECK: vcvtps2iubs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtps2iubs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtps2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7d,0xcf,0x6b,0x51,0x7f]
+ vcvtps2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtps2iubs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xdf,0x6b,0x52,0x80]
+ vcvtps2iubs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+
+// CHECK: vcvttnebf162ibs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0xd3]
+ vcvttnebf162ibs xmm2, xmm3
+
+// CHECK: vcvttnebf162ibs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x68,0xd3]
+ vcvttnebf162ibs xmm2 {k7}, xmm3
+
+// CHECK: vcvttnebf162ibs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x68,0xd3]
+ vcvttnebf162ibs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvttnebf162ibs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0xd3]
+ vcvttnebf162ibs zmm2, zmm3
+
+// CHECK: vcvttnebf162ibs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x68,0xd3]
+ vcvttnebf162ibs zmm2 {k7}, zmm3
+
+// CHECK: vcvttnebf162ibs zmm2 {k7} {z}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x68,0xd3]
+ vcvttnebf162ibs zmm2 {k7} {z}, zmm3
+
+// CHECK: vcvttnebf162ibs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0xd3]
+ vcvttnebf162ibs ymm2, ymm3
+
+// CHECK: vcvttnebf162ibs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x68,0xd3]
+ vcvttnebf162ibs ymm2 {k7}, ymm3
+
+// CHECK: vcvttnebf162ibs ymm2 {k7} {z}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x68,0xd3]
+ vcvttnebf162ibs ymm2 {k7} {z}, ymm3
+
+// CHECK: vcvttnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttnebf162ibs xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x68,0x10]
+ vcvttnebf162ibs xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvttnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvttnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x68,0x51,0x7f]
+ vcvttnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvttnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x68,0x52,0x80]
+ vcvttnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvttnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttnebf162ibs ymm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x68,0x10]
+ vcvttnebf162ibs ymm2, word ptr [eax]{1to16}
+
+// CHECK: vcvttnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvttnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x68,0x51,0x7f]
+ vcvttnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvttnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x68,0x52,0x80]
+ vcvttnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvttnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttnebf162ibs zmm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x68,0x10]
+ vcvttnebf162ibs zmm2, word ptr [eax]{1to32}
+
+// CHECK: vcvttnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvttnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x68,0x51,0x7f]
+ vcvttnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvttnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x68,0x52,0x80]
+ vcvttnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvttnebf162iubs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0xd3]
+ vcvttnebf162iubs xmm2, xmm3
+
+// CHECK: vcvttnebf162iubs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6a,0xd3]
+ vcvttnebf162iubs xmm2 {k7}, xmm3
+
+// CHECK: vcvttnebf162iubs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6a,0xd3]
+ vcvttnebf162iubs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvttnebf162iubs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0xd3]
+ vcvttnebf162iubs zmm2, zmm3
+
+// CHECK: vcvttnebf162iubs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6a,0xd3]
+ vcvttnebf162iubs zmm2 {k7}, zmm3
+
+// CHECK: vcvttnebf162iubs zmm2 {k7} {z}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6a,0xd3]
+ vcvttnebf162iubs zmm2 {k7} {z}, zmm3
+
+// CHECK: vcvttnebf162iubs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0xd3]
+ vcvttnebf162iubs ymm2, ymm3
+
+// CHECK: vcvttnebf162iubs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6a,0xd3]
+ vcvttnebf162iubs ymm2 {k7}, ymm3
+
+// CHECK: vcvttnebf162iubs ymm2 {k7} {z}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6a,0xd3]
+ vcvttnebf162iubs ymm2 {k7} {z}, ymm3
+
+// CHECK: vcvttnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttnebf162iubs xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x6a,0x10]
+ vcvttnebf162iubs xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvttnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvttnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6a,0x51,0x7f]
+ vcvttnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvttnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x6a,0x52,0x80]
+ vcvttnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvttnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttnebf162iubs ymm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x6a,0x10]
+ vcvttnebf162iubs ymm2, word ptr [eax]{1to16}
+
+// CHECK: vcvttnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvttnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6a,0x51,0x7f]
+ vcvttnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvttnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x6a,0x52,0x80]
+ vcvttnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvttnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttnebf162iubs zmm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x6a,0x10]
+ vcvttnebf162iubs zmm2, word ptr [eax]{1to32}
+
+// CHECK: vcvttnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvttnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6a,0x51,0x7f]
+ vcvttnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvttnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x6a,0x52,0x80]
+ vcvttnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvttph2ibs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x68,0xd3]
+ vcvttph2ibs xmm2, xmm3
+
+// CHECK: vcvttph2ibs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x68,0xd3]
+ vcvttph2ibs xmm2 {k7}, xmm3
+
+// CHECK: vcvttph2ibs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x68,0xd3]
+ vcvttph2ibs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvttph2ibs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x68,0xd3]
+ vcvttph2ibs zmm2, zmm3
+
+// CHECK: vcvttph2ibs zmm2, zmm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x68,0xd3]
+ vcvttph2ibs zmm2, zmm3, {sae}
+
+// CHECK: vcvttph2ibs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x68,0xd3]
+ vcvttph2ibs zmm2 {k7}, zmm3
+
+// CHECK: vcvttph2ibs zmm2 {k7} {z}, zmm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x68,0xd3]
+ vcvttph2ibs zmm2 {k7} {z}, zmm3, {sae}
+
+// CHECK: vcvttph2ibs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x68,0xd3]
+ vcvttph2ibs ymm2, ymm3
+
+// CHECK: vcvttph2ibs ymm2, ymm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x78,0x18,0x68,0xd3]
+ vcvttph2ibs ymm2, ymm3, {sae}
+
+// CHECK: vcvttph2ibs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x68,0xd3]
+ vcvttph2ibs ymm2 {k7}, ymm3
+
+// CHECK: vcvttph2ibs ymm2 {k7} {z}, ymm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x78,0x9f,0x68,0xd3]
+ vcvttph2ibs ymm2 {k7} {z}, ymm3, {sae}
+
+// CHECK: vcvttph2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttph2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttph2ibs xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x68,0x10]
+ vcvttph2ibs xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvttph2ibs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttph2ibs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvttph2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x68,0x51,0x7f]
+ vcvttph2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvttph2ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x68,0x52,0x80]
+ vcvttph2ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvttph2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttph2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttph2ibs ymm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x38,0x68,0x10]
+ vcvttph2ibs ymm2, word ptr [eax]{1to16}
+
+// CHECK: vcvttph2ibs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttph2ibs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvttph2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7c,0xaf,0x68,0x51,0x7f]
+ vcvttph2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvttph2ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xbf,0x68,0x52,0x80]
+ vcvttph2ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvttph2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttph2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttph2ibs zmm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x58,0x68,0x10]
+ vcvttph2ibs zmm2, word ptr [eax]{1to32}
+
+// CHECK: vcvttph2ibs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttph2ibs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvttph2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7c,0xcf,0x68,0x51,0x7f]
+ vcvttph2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvttph2ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xdf,0x68,0x52,0x80]
+ vcvttph2ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvttph2iubs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6a,0xd3]
+ vcvttph2iubs xmm2, xmm3
+
+// CHECK: vcvttph2iubs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x6a,0xd3]
+ vcvttph2iubs xmm2 {k7}, xmm3
+
+// CHECK: vcvttph2iubs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x6a,0xd3]
+ vcvttph2iubs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvttph2iubs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6a,0xd3]
+ vcvttph2iubs zmm2, zmm3
+
+// CHECK: vcvttph2iubs zmm2, zmm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x6a,0xd3]
+ vcvttph2iubs zmm2, zmm3, {sae}
+
+// CHECK: vcvttph2iubs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x6a,0xd3]
+ vcvttph2iubs zmm2 {k7}, zmm3
+
+// CHECK: vcvttph2iubs zmm2 {k7} {z}, zmm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x6a,0xd3]
+ vcvttph2iubs zmm2 {k7} {z}, zmm3, {sae}
+
+// CHECK: vcvttph2iubs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6a,0xd3]
+ vcvttph2iubs ymm2, ymm3
+
+// CHECK: vcvttph2iubs ymm2, ymm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x78,0x18,0x6a,0xd3]
+ vcvttph2iubs ymm2, ymm3, {sae}
+
+// CHECK: vcvttph2iubs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x6a,0xd3]
+ vcvttph2iubs ymm2 {k7}, ymm3
+
+// CHECK: vcvttph2iubs ymm2 {k7} {z}, ymm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x78,0x9f,0x6a,0xd3]
+ vcvttph2iubs ymm2 {k7} {z}, ymm3, {sae}
+
+// CHECK: vcvttph2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttph2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttph2iubs xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x18,0x6a,0x10]
+ vcvttph2iubs xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvttph2iubs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttph2iubs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvttph2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x8f,0x6a,0x51,0x7f]
+ vcvttph2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvttph2iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x9f,0x6a,0x52,0x80]
+ vcvttph2iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvttph2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttph2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttph2iubs ymm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x38,0x6a,0x10]
+ vcvttph2iubs ymm2, word ptr [eax]{1to16}
+
+// CHECK: vcvttph2iubs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttph2iubs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvttph2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7c,0xaf,0x6a,0x51,0x7f]
+ vcvttph2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvttph2iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xbf,0x6a,0x52,0x80]
+ vcvttph2iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvttph2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttph2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttph2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttph2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttph2iubs zmm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7c,0x58,0x6a,0x10]
+ vcvttph2iubs zmm2, word ptr [eax]{1to32}
+
+// CHECK: vcvttph2iubs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7c,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttph2iubs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvttph2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7c,0xcf,0x6a,0x51,0x7f]
+ vcvttph2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvttph2iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7c,0xdf,0x6a,0x52,0x80]
+ vcvttph2iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvttps2ibs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x68,0xd3]
+ vcvttps2ibs xmm2, xmm3
+
+// CHECK: vcvttps2ibs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x68,0xd3]
+ vcvttps2ibs xmm2 {k7}, xmm3
+
+// CHECK: vcvttps2ibs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x68,0xd3]
+ vcvttps2ibs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvttps2ibs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x68,0xd3]
+ vcvttps2ibs zmm2, zmm3
+
+// CHECK: vcvttps2ibs zmm2, zmm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x68,0xd3]
+ vcvttps2ibs zmm2, zmm3, {sae}
+
+// CHECK: vcvttps2ibs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x68,0xd3]
+ vcvttps2ibs zmm2 {k7}, zmm3
+
+// CHECK: vcvttps2ibs zmm2 {k7} {z}, zmm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x68,0xd3]
+ vcvttps2ibs zmm2 {k7} {z}, zmm3, {sae}
+
+// CHECK: vcvttps2ibs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x68,0xd3]
+ vcvttps2ibs ymm2, ymm3
+
+// CHECK: vcvttps2ibs ymm2, ymm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x79,0x18,0x68,0xd3]
+ vcvttps2ibs ymm2, ymm3, {sae}
+
+// CHECK: vcvttps2ibs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x68,0xd3]
+ vcvttps2ibs ymm2 {k7}, ymm3
+
+// CHECK: vcvttps2ibs ymm2 {k7} {z}, ymm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x79,0x9f,0x68,0xd3]
+ vcvttps2ibs ymm2 {k7} {z}, ymm3, {sae}
+
+// CHECK: vcvttps2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttps2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttps2ibs xmm2, dword ptr [eax]{1to4}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x68,0x10]
+ vcvttps2ibs xmm2, dword ptr [eax]{1to4}
+
+// CHECK: vcvttps2ibs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttps2ibs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvttps2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x68,0x51,0x7f]
+ vcvttps2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvttps2ibs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x68,0x52,0x80]
+ vcvttps2ibs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+
+// CHECK: vcvttps2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttps2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttps2ibs ymm2, dword ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x38,0x68,0x10]
+ vcvttps2ibs ymm2, dword ptr [eax]{1to8}
+
+// CHECK: vcvttps2ibs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttps2ibs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvttps2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7d,0xaf,0x68,0x51,0x7f]
+ vcvttps2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvttps2ibs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xbf,0x68,0x52,0x80]
+ vcvttps2ibs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+
+// CHECK: vcvttps2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttps2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttps2ibs zmm2, dword ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x58,0x68,0x10]
+ vcvttps2ibs zmm2, dword ptr [eax]{1to16}
+
+// CHECK: vcvttps2ibs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttps2ibs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvttps2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7d,0xcf,0x68,0x51,0x7f]
+ vcvttps2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvttps2ibs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xdf,0x68,0x52,0x80]
+ vcvttps2ibs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+
+// CHECK: vcvttps2iubs xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6a,0xd3]
+ vcvttps2iubs xmm2, xmm3
+
+// CHECK: vcvttps2iubs xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x6a,0xd3]
+ vcvttps2iubs xmm2 {k7}, xmm3
+
+// CHECK: vcvttps2iubs xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x6a,0xd3]
+ vcvttps2iubs xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvttps2iubs zmm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6a,0xd3]
+ vcvttps2iubs zmm2, zmm3
+
+// CHECK: vcvttps2iubs zmm2, zmm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x6a,0xd3]
+ vcvttps2iubs zmm2, zmm3, {sae}
+
+// CHECK: vcvttps2iubs zmm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x6a,0xd3]
+ vcvttps2iubs zmm2 {k7}, zmm3
+
+// CHECK: vcvttps2iubs zmm2 {k7} {z}, zmm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x6a,0xd3]
+ vcvttps2iubs zmm2 {k7} {z}, zmm3, {sae}
+
+// CHECK: vcvttps2iubs ymm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6a,0xd3]
+ vcvttps2iubs ymm2, ymm3
+
+// CHECK: vcvttps2iubs ymm2, ymm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x79,0x18,0x6a,0xd3]
+ vcvttps2iubs ymm2, ymm3, {sae}
+
+// CHECK: vcvttps2iubs ymm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x6a,0xd3]
+ vcvttps2iubs ymm2 {k7}, ymm3
+
+// CHECK: vcvttps2iubs ymm2 {k7} {z}, ymm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x79,0x9f,0x6a,0xd3]
+ vcvttps2iubs ymm2 {k7} {z}, ymm3, {sae}
+
+// CHECK: vcvttps2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttps2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttps2iubs xmm2, dword ptr [eax]{1to4}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x18,0x6a,0x10]
+ vcvttps2iubs xmm2, dword ptr [eax]{1to4}
+
+// CHECK: vcvttps2iubs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttps2iubs xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvttps2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x8f,0x6a,0x51,0x7f]
+ vcvttps2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvttps2iubs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x9f,0x6a,0x52,0x80]
+ vcvttps2iubs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+
+// CHECK: vcvttps2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttps2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttps2iubs ymm2, dword ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x38,0x6a,0x10]
+ vcvttps2iubs ymm2, dword ptr [eax]{1to8}
+
+// CHECK: vcvttps2iubs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttps2iubs ymm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvttps2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7d,0xaf,0x6a,0x51,0x7f]
+ vcvttps2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvttps2iubs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xbf,0x6a,0x52,0x80]
+ vcvttps2iubs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+
+// CHECK: vcvttps2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvttps2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvttps2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvttps2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvttps2iubs zmm2, dword ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7d,0x58,0x6a,0x10]
+ vcvttps2iubs zmm2, dword ptr [eax]{1to16}
+
+// CHECK: vcvttps2iubs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7d,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttps2iubs zmm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvttps2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7d,0xcf,0x6a,0x51,0x7f]
+ vcvttps2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvttps2iubs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7d,0xdf,0x6a,0x52,0x80]
+ vcvttps2iubs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+
diff --git a/llvm/test/MC/X86/avx10.2satcvt-64-att.s b/llvm/test/MC/X86/avx10.2satcvt-64-att.s
new file mode 100644
index 0000000000000..b6767b905b51d
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2satcvt-64-att.s
@@ -0,0 +1,1362 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvtnebf162ibs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x69,0xf7]
+ vcvtnebf162ibs %xmm23, %xmm22
+
+// CHECK: vcvtnebf162ibs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x69,0xf7]
+ vcvtnebf162ibs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtnebf162ibs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x69,0xf7]
+ vcvtnebf162ibs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x69,0xf7]
+ vcvtnebf162ibs %zmm23, %zmm22
+
+// CHECK: vcvtnebf162ibs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x69,0xf7]
+ vcvtnebf162ibs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtnebf162ibs %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x69,0xf7]
+ vcvtnebf162ibs %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x69,0xf7]
+ vcvtnebf162ibs %ymm23, %ymm22
+
+// CHECK: vcvtnebf162ibs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x69,0xf7]
+ vcvtnebf162ibs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtnebf162ibs %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x69,0xf7]
+ vcvtnebf162ibs %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvtnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvtnebf162ibs (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162ibs (%rip){1to8}, %xmm22
+
+// CHECK: vcvtnebf162ibs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtnebf162ibs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvtnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x69,0x71,0x7f]
+ vcvtnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x69,0x72,0x80]
+ vcvtnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvtnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvtnebf162ibs (%rip){1to16}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162ibs (%rip){1to16}, %ymm22
+
+// CHECK: vcvtnebf162ibs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtnebf162ibs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvtnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x69,0x71,0x7f]
+ vcvtnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x69,0x72,0x80]
+ vcvtnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvtnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvtnebf162ibs (%rip){1to32}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162ibs (%rip){1to32}, %zmm22
+
+// CHECK: vcvtnebf162ibs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtnebf162ibs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvtnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x69,0x71,0x7f]
+ vcvtnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvtnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x69,0x72,0x80]
+ vcvtnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6b,0xf7]
+ vcvtnebf162iubs %xmm23, %xmm22
+
+// CHECK: vcvtnebf162iubs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x6b,0xf7]
+ vcvtnebf162iubs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtnebf162iubs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x6b,0xf7]
+ vcvtnebf162iubs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6b,0xf7]
+ vcvtnebf162iubs %zmm23, %zmm22
+
+// CHECK: vcvtnebf162iubs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x6b,0xf7]
+ vcvtnebf162iubs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtnebf162iubs %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x6b,0xf7]
+ vcvtnebf162iubs %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6b,0xf7]
+ vcvtnebf162iubs %ymm23, %ymm22
+
+// CHECK: vcvtnebf162iubs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x6b,0xf7]
+ vcvtnebf162iubs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtnebf162iubs %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x6b,0xf7]
+ vcvtnebf162iubs %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvtnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvtnebf162iubs (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162iubs (%rip){1to8}, %xmm22
+
+// CHECK: vcvtnebf162iubs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtnebf162iubs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvtnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x6b,0x71,0x7f]
+ vcvtnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x6b,0x72,0x80]
+ vcvtnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvtnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvtnebf162iubs (%rip){1to16}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162iubs (%rip){1to16}, %ymm22
+
+// CHECK: vcvtnebf162iubs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtnebf162iubs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvtnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x6b,0x71,0x7f]
+ vcvtnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x6b,0x72,0x80]
+ vcvtnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvtnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvtnebf162iubs (%rip){1to32}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162iubs (%rip){1to32}, %zmm22
+
+// CHECK: vcvtnebf162iubs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtnebf162iubs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvtnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x6b,0x71,0x7f]
+ vcvtnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvtnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x6b,0x72,0x80]
+ vcvtnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+
+// CHECK: vcvtph2ibs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x69,0xf7]
+ vcvtph2ibs %xmm23, %xmm22
+
+// CHECK: vcvtph2ibs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x0f,0x69,0xf7]
+ vcvtph2ibs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtph2ibs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x8f,0x69,0xf7]
+ vcvtph2ibs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtph2ibs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x69,0xf7]
+ vcvtph2ibs %zmm23, %zmm22
+
+// CHECK: vcvtph2ibs {rn-sae}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x18,0x69,0xf7]
+ vcvtph2ibs {rn-sae}, %zmm23, %zmm22
+
+// CHECK: vcvtph2ibs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x4f,0x69,0xf7]
+ vcvtph2ibs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtph2ibs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7c,0xff,0x69,0xf7]
+ vcvtph2ibs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtph2ibs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x69,0xf7]
+ vcvtph2ibs %ymm23, %ymm22
+
+// CHECK: vcvtph2ibs {rn-sae}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x78,0x18,0x69,0xf7]
+ vcvtph2ibs {rn-sae}, %ymm23, %ymm22
+
+// CHECK: vcvtph2ibs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x2f,0x69,0xf7]
+ vcvtph2ibs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtph2ibs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x78,0xff,0x69,0xf7]
+ vcvtph2ibs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtph2ibs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2ibs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvtph2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvtph2ibs (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x18,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2ibs (%rip){1to8}, %xmm22
+
+// CHECK: vcvtph2ibs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtph2ibs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvtph2ibs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x8f,0x69,0x71,0x7f]
+ vcvtph2ibs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtph2ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x9f,0x69,0x72,0x80]
+ vcvtph2ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtph2ibs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2ibs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvtph2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvtph2ibs (%rip){1to16}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x38,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2ibs (%rip){1to16}, %ymm22
+
+// CHECK: vcvtph2ibs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtph2ibs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvtph2ibs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xaf,0x69,0x71,0x7f]
+ vcvtph2ibs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvtph2ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xbf,0x69,0x72,0x80]
+ vcvtph2ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+
+// CHECK: vcvtph2ibs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2ibs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvtph2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvtph2ibs (%rip){1to32}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x58,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2ibs (%rip){1to32}, %zmm22
+
+// CHECK: vcvtph2ibs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtph2ibs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvtph2ibs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xcf,0x69,0x71,0x7f]
+ vcvtph2ibs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvtph2ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xdf,0x69,0x72,0x80]
+ vcvtph2ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+
+// CHECK: vcvtph2iubs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x6b,0xf7]
+ vcvtph2iubs %xmm23, %xmm22
+
+// CHECK: vcvtph2iubs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x0f,0x6b,0xf7]
+ vcvtph2iubs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtph2iubs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x8f,0x6b,0xf7]
+ vcvtph2iubs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtph2iubs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x6b,0xf7]
+ vcvtph2iubs %zmm23, %zmm22
+
+// CHECK: vcvtph2iubs {rn-sae}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x18,0x6b,0xf7]
+ vcvtph2iubs {rn-sae}, %zmm23, %zmm22
+
+// CHECK: vcvtph2iubs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x4f,0x6b,0xf7]
+ vcvtph2iubs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtph2iubs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7c,0xff,0x6b,0xf7]
+ vcvtph2iubs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtph2iubs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x6b,0xf7]
+ vcvtph2iubs %ymm23, %ymm22
+
+// CHECK: vcvtph2iubs {rn-sae}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x78,0x18,0x6b,0xf7]
+ vcvtph2iubs {rn-sae}, %ymm23, %ymm22
+
+// CHECK: vcvtph2iubs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x2f,0x6b,0xf7]
+ vcvtph2iubs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtph2iubs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x78,0xff,0x6b,0xf7]
+ vcvtph2iubs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtph2iubs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2iubs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvtph2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvtph2iubs (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x18,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2iubs (%rip){1to8}, %xmm22
+
+// CHECK: vcvtph2iubs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtph2iubs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvtph2iubs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x8f,0x6b,0x71,0x7f]
+ vcvtph2iubs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtph2iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x9f,0x6b,0x72,0x80]
+ vcvtph2iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtph2iubs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2iubs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvtph2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvtph2iubs (%rip){1to16}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x38,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2iubs (%rip){1to16}, %ymm22
+
+// CHECK: vcvtph2iubs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtph2iubs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvtph2iubs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xaf,0x6b,0x71,0x7f]
+ vcvtph2iubs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvtph2iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xbf,0x6b,0x72,0x80]
+ vcvtph2iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+
+// CHECK: vcvtph2iubs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2iubs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvtph2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvtph2iubs (%rip){1to32}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x58,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2iubs (%rip){1to32}, %zmm22
+
+// CHECK: vcvtph2iubs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtph2iubs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvtph2iubs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xcf,0x6b,0x71,0x7f]
+ vcvtph2iubs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvtph2iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xdf,0x6b,0x72,0x80]
+ vcvtph2iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+
+// CHECK: vcvtps2ibs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x69,0xf7]
+ vcvtps2ibs %xmm23, %xmm22
+
+// CHECK: vcvtps2ibs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x0f,0x69,0xf7]
+ vcvtps2ibs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtps2ibs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x8f,0x69,0xf7]
+ vcvtps2ibs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtps2ibs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x69,0xf7]
+ vcvtps2ibs %zmm23, %zmm22
+
+// CHECK: vcvtps2ibs {rn-sae}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x18,0x69,0xf7]
+ vcvtps2ibs {rn-sae}, %zmm23, %zmm22
+
+// CHECK: vcvtps2ibs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x4f,0x69,0xf7]
+ vcvtps2ibs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtps2ibs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7d,0xff,0x69,0xf7]
+ vcvtps2ibs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtps2ibs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x69,0xf7]
+ vcvtps2ibs %ymm23, %ymm22
+
+// CHECK: vcvtps2ibs {rn-sae}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x79,0x18,0x69,0xf7]
+ vcvtps2ibs {rn-sae}, %ymm23, %ymm22
+
+// CHECK: vcvtps2ibs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x2f,0x69,0xf7]
+ vcvtps2ibs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtps2ibs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x79,0xff,0x69,0xf7]
+ vcvtps2ibs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtps2ibs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2ibs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvtps2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvtps2ibs (%rip){1to4}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x18,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2ibs (%rip){1to4}, %xmm22
+
+// CHECK: vcvtps2ibs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtps2ibs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvtps2ibs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x8f,0x69,0x71,0x7f]
+ vcvtps2ibs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtps2ibs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x9f,0x69,0x72,0x80]
+ vcvtps2ibs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtps2ibs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2ibs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvtps2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvtps2ibs (%rip){1to8}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x38,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2ibs (%rip){1to8}, %ymm22
+
+// CHECK: vcvtps2ibs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtps2ibs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvtps2ibs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xaf,0x69,0x71,0x7f]
+ vcvtps2ibs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvtps2ibs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xbf,0x69,0x72,0x80]
+ vcvtps2ibs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+
+// CHECK: vcvtps2ibs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2ibs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvtps2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvtps2ibs (%rip){1to16}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x58,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2ibs (%rip){1to16}, %zmm22
+
+// CHECK: vcvtps2ibs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtps2ibs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvtps2ibs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xcf,0x69,0x71,0x7f]
+ vcvtps2ibs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvtps2ibs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xdf,0x69,0x72,0x80]
+ vcvtps2ibs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+
+// CHECK: vcvtps2iubs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x6b,0xf7]
+ vcvtps2iubs %xmm23, %xmm22
+
+// CHECK: vcvtps2iubs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x0f,0x6b,0xf7]
+ vcvtps2iubs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtps2iubs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x8f,0x6b,0xf7]
+ vcvtps2iubs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtps2iubs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x6b,0xf7]
+ vcvtps2iubs %zmm23, %zmm22
+
+// CHECK: vcvtps2iubs {rn-sae}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x18,0x6b,0xf7]
+ vcvtps2iubs {rn-sae}, %zmm23, %zmm22
+
+// CHECK: vcvtps2iubs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x4f,0x6b,0xf7]
+ vcvtps2iubs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtps2iubs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7d,0xff,0x6b,0xf7]
+ vcvtps2iubs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtps2iubs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x6b,0xf7]
+ vcvtps2iubs %ymm23, %ymm22
+
+// CHECK: vcvtps2iubs {rn-sae}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x79,0x18,0x6b,0xf7]
+ vcvtps2iubs {rn-sae}, %ymm23, %ymm22
+
+// CHECK: vcvtps2iubs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x2f,0x6b,0xf7]
+ vcvtps2iubs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtps2iubs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x79,0xff,0x6b,0xf7]
+ vcvtps2iubs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtps2iubs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2iubs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvtps2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvtps2iubs (%rip){1to4}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x18,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2iubs (%rip){1to4}, %xmm22
+
+// CHECK: vcvtps2iubs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtps2iubs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvtps2iubs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x8f,0x6b,0x71,0x7f]
+ vcvtps2iubs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtps2iubs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x9f,0x6b,0x72,0x80]
+ vcvtps2iubs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtps2iubs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2iubs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvtps2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvtps2iubs (%rip){1to8}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x38,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2iubs (%rip){1to8}, %ymm22
+
+// CHECK: vcvtps2iubs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtps2iubs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvtps2iubs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xaf,0x6b,0x71,0x7f]
+ vcvtps2iubs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvtps2iubs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xbf,0x6b,0x72,0x80]
+ vcvtps2iubs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+
+// CHECK: vcvtps2iubs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2iubs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvtps2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvtps2iubs (%rip){1to16}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x58,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2iubs (%rip){1to16}, %zmm22
+
+// CHECK: vcvtps2iubs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtps2iubs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvtps2iubs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xcf,0x6b,0x71,0x7f]
+ vcvtps2iubs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvtps2iubs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xdf,0x6b,0x72,0x80]
+ vcvtps2iubs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x68,0xf7]
+ vcvttnebf162ibs %xmm23, %xmm22
+
+// CHECK: vcvttnebf162ibs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x68,0xf7]
+ vcvttnebf162ibs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvttnebf162ibs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x68,0xf7]
+ vcvttnebf162ibs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x68,0xf7]
+ vcvttnebf162ibs %zmm23, %zmm22
+
+// CHECK: vcvttnebf162ibs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x68,0xf7]
+ vcvttnebf162ibs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvttnebf162ibs %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x68,0xf7]
+ vcvttnebf162ibs %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x68,0xf7]
+ vcvttnebf162ibs %ymm23, %ymm22
+
+// CHECK: vcvttnebf162ibs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x68,0xf7]
+ vcvttnebf162ibs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvttnebf162ibs %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x68,0xf7]
+ vcvttnebf162ibs %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvttnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvttnebf162ibs (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162ibs (%rip){1to8}, %xmm22
+
+// CHECK: vcvttnebf162ibs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttnebf162ibs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvttnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x68,0x71,0x7f]
+ vcvttnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x68,0x72,0x80]
+ vcvttnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvttnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvttnebf162ibs (%rip){1to16}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162ibs (%rip){1to16}, %ymm22
+
+// CHECK: vcvttnebf162ibs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttnebf162ibs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvttnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x68,0x71,0x7f]
+ vcvttnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x68,0x72,0x80]
+ vcvttnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvttnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvttnebf162ibs (%rip){1to32}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162ibs (%rip){1to32}, %zmm22
+
+// CHECK: vcvttnebf162ibs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttnebf162ibs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvttnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x68,0x71,0x7f]
+ vcvttnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x68,0x72,0x80]
+ vcvttnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6a,0xf7]
+ vcvttnebf162iubs %xmm23, %xmm22
+
+// CHECK: vcvttnebf162iubs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x6a,0xf7]
+ vcvttnebf162iubs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvttnebf162iubs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x6a,0xf7]
+ vcvttnebf162iubs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6a,0xf7]
+ vcvttnebf162iubs %zmm23, %zmm22
+
+// CHECK: vcvttnebf162iubs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x6a,0xf7]
+ vcvttnebf162iubs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvttnebf162iubs %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x6a,0xf7]
+ vcvttnebf162iubs %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6a,0xf7]
+ vcvttnebf162iubs %ymm23, %ymm22
+
+// CHECK: vcvttnebf162iubs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x6a,0xf7]
+ vcvttnebf162iubs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvttnebf162iubs %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x6a,0xf7]
+ vcvttnebf162iubs %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvttnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvttnebf162iubs (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162iubs (%rip){1to8}, %xmm22
+
+// CHECK: vcvttnebf162iubs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttnebf162iubs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvttnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x6a,0x71,0x7f]
+ vcvttnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x6a,0x72,0x80]
+ vcvttnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvttnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvttnebf162iubs (%rip){1to16}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162iubs (%rip){1to16}, %ymm22
+
+// CHECK: vcvttnebf162iubs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttnebf162iubs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvttnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x6a,0x71,0x7f]
+ vcvttnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x6a,0x72,0x80]
+ vcvttnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvttnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvttnebf162iubs (%rip){1to32}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162iubs (%rip){1to32}, %zmm22
+
+// CHECK: vcvttnebf162iubs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttnebf162iubs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvttnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x6a,0x71,0x7f]
+ vcvttnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvttnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x6a,0x72,0x80]
+ vcvttnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+
+// CHECK: vcvttph2ibs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x68,0xf7]
+ vcvttph2ibs %xmm23, %xmm22
+
+// CHECK: vcvttph2ibs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x0f,0x68,0xf7]
+ vcvttph2ibs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvttph2ibs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x8f,0x68,0xf7]
+ vcvttph2ibs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvttph2ibs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x68,0xf7]
+ vcvttph2ibs %zmm23, %zmm22
+
+// CHECK: vcvttph2ibs {sae}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x18,0x68,0xf7]
+ vcvttph2ibs {sae}, %zmm23, %zmm22
+
+// CHECK: vcvttph2ibs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x4f,0x68,0xf7]
+ vcvttph2ibs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvttph2ibs {sae}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x9f,0x68,0xf7]
+ vcvttph2ibs {sae}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvttph2ibs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x68,0xf7]
+ vcvttph2ibs %ymm23, %ymm22
+
+// CHECK: vcvttph2ibs {sae}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x78,0x18,0x68,0xf7]
+ vcvttph2ibs {sae}, %ymm23, %ymm22
+
+// CHECK: vcvttph2ibs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x2f,0x68,0xf7]
+ vcvttph2ibs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvttph2ibs {sae}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x78,0x9f,0x68,0xf7]
+ vcvttph2ibs {sae}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvttph2ibs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2ibs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvttph2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvttph2ibs (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x18,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2ibs (%rip){1to8}, %xmm22
+
+// CHECK: vcvttph2ibs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttph2ibs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvttph2ibs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x8f,0x68,0x71,0x7f]
+ vcvttph2ibs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvttph2ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x9f,0x68,0x72,0x80]
+ vcvttph2ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvttph2ibs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2ibs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvttph2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvttph2ibs (%rip){1to16}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x38,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2ibs (%rip){1to16}, %ymm22
+
+// CHECK: vcvttph2ibs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttph2ibs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvttph2ibs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xaf,0x68,0x71,0x7f]
+ vcvttph2ibs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvttph2ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xbf,0x68,0x72,0x80]
+ vcvttph2ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+
+// CHECK: vcvttph2ibs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2ibs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvttph2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvttph2ibs (%rip){1to32}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x58,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2ibs (%rip){1to32}, %zmm22
+
+// CHECK: vcvttph2ibs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttph2ibs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvttph2ibs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xcf,0x68,0x71,0x7f]
+ vcvttph2ibs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvttph2ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xdf,0x68,0x72,0x80]
+ vcvttph2ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+
+// CHECK: vcvttph2iubs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x6a,0xf7]
+ vcvttph2iubs %xmm23, %xmm22
+
+// CHECK: vcvttph2iubs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x0f,0x6a,0xf7]
+ vcvttph2iubs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvttph2iubs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x8f,0x6a,0xf7]
+ vcvttph2iubs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvttph2iubs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x6a,0xf7]
+ vcvttph2iubs %zmm23, %zmm22
+
+// CHECK: vcvttph2iubs {sae}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x18,0x6a,0xf7]
+ vcvttph2iubs {sae}, %zmm23, %zmm22
+
+// CHECK: vcvttph2iubs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x4f,0x6a,0xf7]
+ vcvttph2iubs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvttph2iubs {sae}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x9f,0x6a,0xf7]
+ vcvttph2iubs {sae}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvttph2iubs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x6a,0xf7]
+ vcvttph2iubs %ymm23, %ymm22
+
+// CHECK: vcvttph2iubs {sae}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x78,0x18,0x6a,0xf7]
+ vcvttph2iubs {sae}, %ymm23, %ymm22
+
+// CHECK: vcvttph2iubs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x2f,0x6a,0xf7]
+ vcvttph2iubs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvttph2iubs {sae}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x78,0x9f,0x6a,0xf7]
+ vcvttph2iubs {sae}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvttph2iubs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2iubs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvttph2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvttph2iubs (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x18,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2iubs (%rip){1to8}, %xmm22
+
+// CHECK: vcvttph2iubs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttph2iubs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvttph2iubs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x8f,0x6a,0x71,0x7f]
+ vcvttph2iubs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvttph2iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x9f,0x6a,0x72,0x80]
+ vcvttph2iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvttph2iubs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2iubs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvttph2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvttph2iubs (%rip){1to16}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x38,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2iubs (%rip){1to16}, %ymm22
+
+// CHECK: vcvttph2iubs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttph2iubs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvttph2iubs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xaf,0x6a,0x71,0x7f]
+ vcvttph2iubs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvttph2iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xbf,0x6a,0x72,0x80]
+ vcvttph2iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+
+// CHECK: vcvttph2iubs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2iubs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvttph2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7c,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvttph2iubs (%rip){1to32}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x58,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2iubs (%rip){1to32}, %zmm22
+
+// CHECK: vcvttph2iubs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7c,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttph2iubs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvttph2iubs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xcf,0x6a,0x71,0x7f]
+ vcvttph2iubs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvttph2iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xdf,0x6a,0x72,0x80]
+ vcvttph2iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+
+// CHECK: vcvttps2ibs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x68,0xf7]
+ vcvttps2ibs %xmm23, %xmm22
+
+// CHECK: vcvttps2ibs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x0f,0x68,0xf7]
+ vcvttps2ibs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvttps2ibs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x8f,0x68,0xf7]
+ vcvttps2ibs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvttps2ibs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x68,0xf7]
+ vcvttps2ibs %zmm23, %zmm22
+
+// CHECK: vcvttps2ibs {sae}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x18,0x68,0xf7]
+ vcvttps2ibs {sae}, %zmm23, %zmm22
+
+// CHECK: vcvttps2ibs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x4f,0x68,0xf7]
+ vcvttps2ibs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvttps2ibs {sae}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x9f,0x68,0xf7]
+ vcvttps2ibs {sae}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvttps2ibs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x68,0xf7]
+ vcvttps2ibs %ymm23, %ymm22
+
+// CHECK: vcvttps2ibs {sae}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x79,0x18,0x68,0xf7]
+ vcvttps2ibs {sae}, %ymm23, %ymm22
+
+// CHECK: vcvttps2ibs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x2f,0x68,0xf7]
+ vcvttps2ibs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvttps2ibs {sae}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x79,0x9f,0x68,0xf7]
+ vcvttps2ibs {sae}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvttps2ibs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2ibs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvttps2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2ibs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvttps2ibs (%rip){1to4}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x18,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2ibs (%rip){1to4}, %xmm22
+
+// CHECK: vcvttps2ibs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttps2ibs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvttps2ibs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x8f,0x68,0x71,0x7f]
+ vcvttps2ibs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvttps2ibs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x9f,0x68,0x72,0x80]
+ vcvttps2ibs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+
+// CHECK: vcvttps2ibs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2ibs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvttps2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2ibs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvttps2ibs (%rip){1to8}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x38,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2ibs (%rip){1to8}, %ymm22
+
+// CHECK: vcvttps2ibs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttps2ibs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvttps2ibs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xaf,0x68,0x71,0x7f]
+ vcvttps2ibs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvttps2ibs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xbf,0x68,0x72,0x80]
+ vcvttps2ibs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+
+// CHECK: vcvttps2ibs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2ibs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvttps2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2ibs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvttps2ibs (%rip){1to16}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x58,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2ibs (%rip){1to16}, %zmm22
+
+// CHECK: vcvttps2ibs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttps2ibs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvttps2ibs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xcf,0x68,0x71,0x7f]
+ vcvttps2ibs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvttps2ibs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xdf,0x68,0x72,0x80]
+ vcvttps2ibs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+
+// CHECK: vcvttps2iubs %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x6a,0xf7]
+ vcvttps2iubs %xmm23, %xmm22
+
+// CHECK: vcvttps2iubs %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x0f,0x6a,0xf7]
+ vcvttps2iubs %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvttps2iubs %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x8f,0x6a,0xf7]
+ vcvttps2iubs %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvttps2iubs %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x6a,0xf7]
+ vcvttps2iubs %zmm23, %zmm22
+
+// CHECK: vcvttps2iubs {sae}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x18,0x6a,0xf7]
+ vcvttps2iubs {sae}, %zmm23, %zmm22
+
+// CHECK: vcvttps2iubs %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x4f,0x6a,0xf7]
+ vcvttps2iubs %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvttps2iubs {sae}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x9f,0x6a,0xf7]
+ vcvttps2iubs {sae}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvttps2iubs %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x6a,0xf7]
+ vcvttps2iubs %ymm23, %ymm22
+
+// CHECK: vcvttps2iubs {sae}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x79,0x18,0x6a,0xf7]
+ vcvttps2iubs {sae}, %ymm23, %ymm22
+
+// CHECK: vcvttps2iubs %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x2f,0x6a,0xf7]
+ vcvttps2iubs %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvttps2iubs {sae}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x79,0x9f,0x6a,0xf7]
+ vcvttps2iubs {sae}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvttps2iubs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2iubs 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvttps2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2iubs 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvttps2iubs (%rip){1to4}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x18,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2iubs (%rip){1to4}, %xmm22
+
+// CHECK: vcvttps2iubs -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttps2iubs -512(,%rbp,2), %xmm22
+
+// CHECK: vcvttps2iubs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x8f,0x6a,0x71,0x7f]
+ vcvttps2iubs 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvttps2iubs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x9f,0x6a,0x72,0x80]
+ vcvttps2iubs -512(%rdx){1to4}, %xmm22 {%k7} {z}
+
+// CHECK: vcvttps2iubs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2iubs 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvttps2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2iubs 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvttps2iubs (%rip){1to8}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x38,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2iubs (%rip){1to8}, %ymm22
+
+// CHECK: vcvttps2iubs -1024(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttps2iubs -1024(,%rbp,2), %ymm22
+
+// CHECK: vcvttps2iubs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xaf,0x6a,0x71,0x7f]
+ vcvttps2iubs 4064(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvttps2iubs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xbf,0x6a,0x72,0x80]
+ vcvttps2iubs -512(%rdx){1to8}, %ymm22 {%k7} {z}
+
+// CHECK: vcvttps2iubs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2iubs 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvttps2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7d,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2iubs 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvttps2iubs (%rip){1to16}, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x58,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2iubs (%rip){1to16}, %zmm22
+
+// CHECK: vcvttps2iubs -2048(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7d,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttps2iubs -2048(,%rbp,2), %zmm22
+
+// CHECK: vcvttps2iubs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xcf,0x6a,0x71,0x7f]
+ vcvttps2iubs 8128(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvttps2iubs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xdf,0x6a,0x72,0x80]
+ vcvttps2iubs -512(%rdx){1to16}, %zmm22 {%k7} {z}
+
diff --git a/llvm/test/MC/X86/avx10.2satcvt-64-intel.s b/llvm/test/MC/X86/avx10.2satcvt-64-intel.s
new file mode 100644
index 0000000000000..e1df9dcc51a48
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2satcvt-64-intel.s
@@ -0,0 +1,1362 @@
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvtnebf162ibs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x69,0xf7]
+ vcvtnebf162ibs xmm22, xmm23
+
+// CHECK: vcvtnebf162ibs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x69,0xf7]
+ vcvtnebf162ibs xmm22 {k7}, xmm23
+
+// CHECK: vcvtnebf162ibs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x69,0xf7]
+ vcvtnebf162ibs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvtnebf162ibs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x69,0xf7]
+ vcvtnebf162ibs zmm22, zmm23
+
+// CHECK: vcvtnebf162ibs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x69,0xf7]
+ vcvtnebf162ibs zmm22 {k7}, zmm23
+
+// CHECK: vcvtnebf162ibs zmm22 {k7} {z}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x69,0xf7]
+ vcvtnebf162ibs zmm22 {k7} {z}, zmm23
+
+// CHECK: vcvtnebf162ibs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x69,0xf7]
+ vcvtnebf162ibs ymm22, ymm23
+
+// CHECK: vcvtnebf162ibs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x69,0xf7]
+ vcvtnebf162ibs ymm22 {k7}, ymm23
+
+// CHECK: vcvtnebf162ibs ymm22 {k7} {z}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x69,0xf7]
+ vcvtnebf162ibs ymm22 {k7} {z}, ymm23
+
+// CHECK: vcvtnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtnebf162ibs xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162ibs xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvtnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x69,0x71,0x7f]
+ vcvtnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x69,0x72,0x80]
+ vcvtnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtnebf162ibs ymm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162ibs ymm22, word ptr [rip]{1to16}
+
+// CHECK: vcvtnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x69,0x71,0x7f]
+ vcvtnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x69,0x72,0x80]
+ vcvtnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtnebf162ibs zmm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162ibs zmm22, word ptr [rip]{1to32}
+
+// CHECK: vcvtnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x69,0x71,0x7f]
+ vcvtnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x69,0x72,0x80]
+ vcvtnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtnebf162iubs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6b,0xf7]
+ vcvtnebf162iubs xmm22, xmm23
+
+// CHECK: vcvtnebf162iubs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x6b,0xf7]
+ vcvtnebf162iubs xmm22 {k7}, xmm23
+
+// CHECK: vcvtnebf162iubs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x6b,0xf7]
+ vcvtnebf162iubs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvtnebf162iubs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6b,0xf7]
+ vcvtnebf162iubs zmm22, zmm23
+
+// CHECK: vcvtnebf162iubs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x6b,0xf7]
+ vcvtnebf162iubs zmm22 {k7}, zmm23
+
+// CHECK: vcvtnebf162iubs zmm22 {k7} {z}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x6b,0xf7]
+ vcvtnebf162iubs zmm22 {k7} {z}, zmm23
+
+// CHECK: vcvtnebf162iubs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6b,0xf7]
+ vcvtnebf162iubs ymm22, ymm23
+
+// CHECK: vcvtnebf162iubs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x6b,0xf7]
+ vcvtnebf162iubs ymm22 {k7}, ymm23
+
+// CHECK: vcvtnebf162iubs ymm22 {k7} {z}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x6b,0xf7]
+ vcvtnebf162iubs ymm22 {k7} {z}, ymm23
+
+// CHECK: vcvtnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtnebf162iubs xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162iubs xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvtnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x6b,0x71,0x7f]
+ vcvtnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x6b,0x72,0x80]
+ vcvtnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtnebf162iubs ymm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162iubs ymm22, word ptr [rip]{1to16}
+
+// CHECK: vcvtnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x6b,0x71,0x7f]
+ vcvtnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x6b,0x72,0x80]
+ vcvtnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtnebf162iubs zmm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtnebf162iubs zmm22, word ptr [rip]{1to32}
+
+// CHECK: vcvtnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x6b,0x71,0x7f]
+ vcvtnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x6b,0x72,0x80]
+ vcvtnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtph2ibs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x69,0xf7]
+ vcvtph2ibs xmm22, xmm23
+
+// CHECK: vcvtph2ibs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x0f,0x69,0xf7]
+ vcvtph2ibs xmm22 {k7}, xmm23
+
+// CHECK: vcvtph2ibs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x8f,0x69,0xf7]
+ vcvtph2ibs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvtph2ibs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x69,0xf7]
+ vcvtph2ibs zmm22, zmm23
+
+// CHECK: vcvtph2ibs zmm22, zmm23, {rn-sae}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x18,0x69,0xf7]
+ vcvtph2ibs zmm22, zmm23, {rn-sae}
+
+// CHECK: vcvtph2ibs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x4f,0x69,0xf7]
+ vcvtph2ibs zmm22 {k7}, zmm23
+
+// CHECK: vcvtph2ibs zmm22 {k7} {z}, zmm23, {rz-sae}
+// CHECK: encoding: [0x62,0xa5,0x7c,0xff,0x69,0xf7]
+ vcvtph2ibs zmm22 {k7} {z}, zmm23, {rz-sae}
+
+// CHECK: vcvtph2ibs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x69,0xf7]
+ vcvtph2ibs ymm22, ymm23
+
+// CHECK: vcvtph2ibs ymm22, ymm23, {rn-sae}
+// CHECK: encoding: [0x62,0xa5,0x78,0x18,0x69,0xf7]
+ vcvtph2ibs ymm22, ymm23, {rn-sae}
+
+// CHECK: vcvtph2ibs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x2f,0x69,0xf7]
+ vcvtph2ibs ymm22 {k7}, ymm23
+
+// CHECK: vcvtph2ibs ymm22 {k7} {z}, ymm23, {rz-sae}
+// CHECK: encoding: [0x62,0xa5,0x78,0xff,0x69,0xf7]
+ vcvtph2ibs ymm22 {k7} {z}, ymm23, {rz-sae}
+
+// CHECK: vcvtph2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtph2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtph2ibs xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x18,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2ibs xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvtph2ibs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtph2ibs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtph2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x8f,0x69,0x71,0x7f]
+ vcvtph2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtph2ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x9f,0x69,0x72,0x80]
+ vcvtph2ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtph2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtph2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtph2ibs ymm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x38,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2ibs ymm22, word ptr [rip]{1to16}
+
+// CHECK: vcvtph2ibs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtph2ibs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtph2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7c,0xaf,0x69,0x71,0x7f]
+ vcvtph2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtph2ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xbf,0x69,0x72,0x80]
+ vcvtph2ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtph2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtph2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtph2ibs zmm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x58,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2ibs zmm22, word ptr [rip]{1to32}
+
+// CHECK: vcvtph2ibs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtph2ibs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtph2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7c,0xcf,0x69,0x71,0x7f]
+ vcvtph2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtph2ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xdf,0x69,0x72,0x80]
+ vcvtph2ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtph2iubs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x6b,0xf7]
+ vcvtph2iubs xmm22, xmm23
+
+// CHECK: vcvtph2iubs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x0f,0x6b,0xf7]
+ vcvtph2iubs xmm22 {k7}, xmm23
+
+// CHECK: vcvtph2iubs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x8f,0x6b,0xf7]
+ vcvtph2iubs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvtph2iubs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x6b,0xf7]
+ vcvtph2iubs zmm22, zmm23
+
+// CHECK: vcvtph2iubs zmm22, zmm23, {rn-sae}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x18,0x6b,0xf7]
+ vcvtph2iubs zmm22, zmm23, {rn-sae}
+
+// CHECK: vcvtph2iubs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x4f,0x6b,0xf7]
+ vcvtph2iubs zmm22 {k7}, zmm23
+
+// CHECK: vcvtph2iubs zmm22 {k7} {z}, zmm23, {rz-sae}
+// CHECK: encoding: [0x62,0xa5,0x7c,0xff,0x6b,0xf7]
+ vcvtph2iubs zmm22 {k7} {z}, zmm23, {rz-sae}
+
+// CHECK: vcvtph2iubs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x6b,0xf7]
+ vcvtph2iubs ymm22, ymm23
+
+// CHECK: vcvtph2iubs ymm22, ymm23, {rn-sae}
+// CHECK: encoding: [0x62,0xa5,0x78,0x18,0x6b,0xf7]
+ vcvtph2iubs ymm22, ymm23, {rn-sae}
+
+// CHECK: vcvtph2iubs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x2f,0x6b,0xf7]
+ vcvtph2iubs ymm22 {k7}, ymm23
+
+// CHECK: vcvtph2iubs ymm22 {k7} {z}, ymm23, {rz-sae}
+// CHECK: encoding: [0x62,0xa5,0x78,0xff,0x6b,0xf7]
+ vcvtph2iubs ymm22 {k7} {z}, ymm23, {rz-sae}
+
+// CHECK: vcvtph2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtph2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtph2iubs xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x18,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2iubs xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvtph2iubs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtph2iubs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtph2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x8f,0x6b,0x71,0x7f]
+ vcvtph2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtph2iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x9f,0x6b,0x72,0x80]
+ vcvtph2iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtph2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtph2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtph2iubs ymm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x38,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2iubs ymm22, word ptr [rip]{1to16}
+
+// CHECK: vcvtph2iubs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtph2iubs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtph2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7c,0xaf,0x6b,0x71,0x7f]
+ vcvtph2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtph2iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xbf,0x6b,0x72,0x80]
+ vcvtph2iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtph2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtph2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtph2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtph2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtph2iubs zmm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x58,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtph2iubs zmm22, word ptr [rip]{1to32}
+
+// CHECK: vcvtph2iubs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtph2iubs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtph2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7c,0xcf,0x6b,0x71,0x7f]
+ vcvtph2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtph2iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xdf,0x6b,0x72,0x80]
+ vcvtph2iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtps2ibs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x69,0xf7]
+ vcvtps2ibs xmm22, xmm23
+
+// CHECK: vcvtps2ibs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x0f,0x69,0xf7]
+ vcvtps2ibs xmm22 {k7}, xmm23
+
+// CHECK: vcvtps2ibs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x8f,0x69,0xf7]
+ vcvtps2ibs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvtps2ibs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x69,0xf7]
+ vcvtps2ibs zmm22, zmm23
+
+// CHECK: vcvtps2ibs zmm22, zmm23, {rn-sae}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x18,0x69,0xf7]
+ vcvtps2ibs zmm22, zmm23, {rn-sae}
+
+// CHECK: vcvtps2ibs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x4f,0x69,0xf7]
+ vcvtps2ibs zmm22 {k7}, zmm23
+
+// CHECK: vcvtps2ibs zmm22 {k7} {z}, zmm23, {rz-sae}
+// CHECK: encoding: [0x62,0xa5,0x7d,0xff,0x69,0xf7]
+ vcvtps2ibs zmm22 {k7} {z}, zmm23, {rz-sae}
+
+// CHECK: vcvtps2ibs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x69,0xf7]
+ vcvtps2ibs ymm22, ymm23
+
+// CHECK: vcvtps2ibs ymm22, ymm23, {rn-sae}
+// CHECK: encoding: [0x62,0xa5,0x79,0x18,0x69,0xf7]
+ vcvtps2ibs ymm22, ymm23, {rn-sae}
+
+// CHECK: vcvtps2ibs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x2f,0x69,0xf7]
+ vcvtps2ibs ymm22 {k7}, ymm23
+
+// CHECK: vcvtps2ibs ymm22 {k7} {z}, ymm23, {rz-sae}
+// CHECK: encoding: [0x62,0xa5,0x79,0xff,0x69,0xf7]
+ vcvtps2ibs ymm22 {k7} {z}, ymm23, {rz-sae}
+
+// CHECK: vcvtps2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtps2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtps2ibs xmm22, dword ptr [rip]{1to4}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x18,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2ibs xmm22, dword ptr [rip]{1to4}
+
+// CHECK: vcvtps2ibs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtps2ibs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtps2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x8f,0x69,0x71,0x7f]
+ vcvtps2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtps2ibs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x9f,0x69,0x72,0x80]
+ vcvtps2ibs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+
+// CHECK: vcvtps2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtps2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtps2ibs ymm22, dword ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x38,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2ibs ymm22, dword ptr [rip]{1to8}
+
+// CHECK: vcvtps2ibs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtps2ibs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtps2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7d,0xaf,0x69,0x71,0x7f]
+ vcvtps2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtps2ibs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xbf,0x69,0x72,0x80]
+ vcvtps2ibs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+
+// CHECK: vcvtps2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtps2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtps2ibs zmm22, dword ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x58,0x69,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2ibs zmm22, dword ptr [rip]{1to16}
+
+// CHECK: vcvtps2ibs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtps2ibs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtps2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7d,0xcf,0x69,0x71,0x7f]
+ vcvtps2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtps2ibs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xdf,0x69,0x72,0x80]
+ vcvtps2ibs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+
+// CHECK: vcvtps2iubs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x6b,0xf7]
+ vcvtps2iubs xmm22, xmm23
+
+// CHECK: vcvtps2iubs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x0f,0x6b,0xf7]
+ vcvtps2iubs xmm22 {k7}, xmm23
+
+// CHECK: vcvtps2iubs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x8f,0x6b,0xf7]
+ vcvtps2iubs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvtps2iubs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x6b,0xf7]
+ vcvtps2iubs zmm22, zmm23
+
+// CHECK: vcvtps2iubs zmm22, zmm23, {rn-sae}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x18,0x6b,0xf7]
+ vcvtps2iubs zmm22, zmm23, {rn-sae}
+
+// CHECK: vcvtps2iubs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x4f,0x6b,0xf7]
+ vcvtps2iubs zmm22 {k7}, zmm23
+
+// CHECK: vcvtps2iubs zmm22 {k7} {z}, zmm23, {rz-sae}
+// CHECK: encoding: [0x62,0xa5,0x7d,0xff,0x6b,0xf7]
+ vcvtps2iubs zmm22 {k7} {z}, zmm23, {rz-sae}
+
+// CHECK: vcvtps2iubs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x6b,0xf7]
+ vcvtps2iubs ymm22, ymm23
+
+// CHECK: vcvtps2iubs ymm22, ymm23, {rn-sae}
+// CHECK: encoding: [0x62,0xa5,0x79,0x18,0x6b,0xf7]
+ vcvtps2iubs ymm22, ymm23, {rn-sae}
+
+// CHECK: vcvtps2iubs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x2f,0x6b,0xf7]
+ vcvtps2iubs ymm22 {k7}, ymm23
+
+// CHECK: vcvtps2iubs ymm22 {k7} {z}, ymm23, {rz-sae}
+// CHECK: encoding: [0x62,0xa5,0x79,0xff,0x6b,0xf7]
+ vcvtps2iubs ymm22 {k7} {z}, ymm23, {rz-sae}
+
+// CHECK: vcvtps2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtps2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtps2iubs xmm22, dword ptr [rip]{1to4}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x18,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2iubs xmm22, dword ptr [rip]{1to4}
+
+// CHECK: vcvtps2iubs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtps2iubs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtps2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x8f,0x6b,0x71,0x7f]
+ vcvtps2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtps2iubs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x9f,0x6b,0x72,0x80]
+ vcvtps2iubs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+
+// CHECK: vcvtps2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtps2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtps2iubs ymm22, dword ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x38,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2iubs ymm22, dword ptr [rip]{1to8}
+
+// CHECK: vcvtps2iubs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtps2iubs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtps2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7d,0xaf,0x6b,0x71,0x7f]
+ vcvtps2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtps2iubs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xbf,0x6b,0x72,0x80]
+ vcvtps2iubs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+
+// CHECK: vcvtps2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtps2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtps2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtps2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtps2iubs zmm22, dword ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x58,0x6b,0x35,0x00,0x00,0x00,0x00]
+ vcvtps2iubs zmm22, dword ptr [rip]{1to16}
+
+// CHECK: vcvtps2iubs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtps2iubs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtps2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7d,0xcf,0x6b,0x71,0x7f]
+ vcvtps2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtps2iubs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xdf,0x6b,0x72,0x80]
+ vcvtps2iubs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+
+// CHECK: vcvttnebf162ibs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x68,0xf7]
+ vcvttnebf162ibs xmm22, xmm23
+
+// CHECK: vcvttnebf162ibs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x68,0xf7]
+ vcvttnebf162ibs xmm22 {k7}, xmm23
+
+// CHECK: vcvttnebf162ibs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x68,0xf7]
+ vcvttnebf162ibs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvttnebf162ibs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x68,0xf7]
+ vcvttnebf162ibs zmm22, zmm23
+
+// CHECK: vcvttnebf162ibs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x68,0xf7]
+ vcvttnebf162ibs zmm22 {k7}, zmm23
+
+// CHECK: vcvttnebf162ibs zmm22 {k7} {z}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x68,0xf7]
+ vcvttnebf162ibs zmm22 {k7} {z}, zmm23
+
+// CHECK: vcvttnebf162ibs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x68,0xf7]
+ vcvttnebf162ibs ymm22, ymm23
+
+// CHECK: vcvttnebf162ibs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x68,0xf7]
+ vcvttnebf162ibs ymm22 {k7}, ymm23
+
+// CHECK: vcvttnebf162ibs ymm22 {k7} {z}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x68,0xf7]
+ vcvttnebf162ibs ymm22 {k7} {z}, ymm23
+
+// CHECK: vcvttnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttnebf162ibs xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162ibs xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvttnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvttnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x68,0x71,0x7f]
+ vcvttnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvttnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x68,0x72,0x80]
+ vcvttnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvttnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttnebf162ibs ymm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162ibs ymm22, word ptr [rip]{1to16}
+
+// CHECK: vcvttnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvttnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x68,0x71,0x7f]
+ vcvttnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvttnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x68,0x72,0x80]
+ vcvttnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvttnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttnebf162ibs zmm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162ibs zmm22, word ptr [rip]{1to32}
+
+// CHECK: vcvttnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvttnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x68,0x71,0x7f]
+ vcvttnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvttnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x68,0x72,0x80]
+ vcvttnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvttnebf162iubs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6a,0xf7]
+ vcvttnebf162iubs xmm22, xmm23
+
+// CHECK: vcvttnebf162iubs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x6a,0xf7]
+ vcvttnebf162iubs xmm22 {k7}, xmm23
+
+// CHECK: vcvttnebf162iubs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x6a,0xf7]
+ vcvttnebf162iubs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvttnebf162iubs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6a,0xf7]
+ vcvttnebf162iubs zmm22, zmm23
+
+// CHECK: vcvttnebf162iubs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x6a,0xf7]
+ vcvttnebf162iubs zmm22 {k7}, zmm23
+
+// CHECK: vcvttnebf162iubs zmm22 {k7} {z}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x6a,0xf7]
+ vcvttnebf162iubs zmm22 {k7} {z}, zmm23
+
+// CHECK: vcvttnebf162iubs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6a,0xf7]
+ vcvttnebf162iubs ymm22, ymm23
+
+// CHECK: vcvttnebf162iubs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x6a,0xf7]
+ vcvttnebf162iubs ymm22 {k7}, ymm23
+
+// CHECK: vcvttnebf162iubs ymm22 {k7} {z}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x6a,0xf7]
+ vcvttnebf162iubs ymm22 {k7} {z}, ymm23
+
+// CHECK: vcvttnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttnebf162iubs xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162iubs xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvttnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvttnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x6a,0x71,0x7f]
+ vcvttnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvttnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x6a,0x72,0x80]
+ vcvttnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvttnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttnebf162iubs ymm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162iubs ymm22, word ptr [rip]{1to16}
+
+// CHECK: vcvttnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvttnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x6a,0x71,0x7f]
+ vcvttnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvttnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x6a,0x72,0x80]
+ vcvttnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvttnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttnebf162iubs zmm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttnebf162iubs zmm22, word ptr [rip]{1to32}
+
+// CHECK: vcvttnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvttnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x6a,0x71,0x7f]
+ vcvttnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvttnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x6a,0x72,0x80]
+ vcvttnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvttph2ibs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x68,0xf7]
+ vcvttph2ibs xmm22, xmm23
+
+// CHECK: vcvttph2ibs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x0f,0x68,0xf7]
+ vcvttph2ibs xmm22 {k7}, xmm23
+
+// CHECK: vcvttph2ibs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x8f,0x68,0xf7]
+ vcvttph2ibs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvttph2ibs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x68,0xf7]
+ vcvttph2ibs zmm22, zmm23
+
+// CHECK: vcvttph2ibs zmm22, zmm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x18,0x68,0xf7]
+ vcvttph2ibs zmm22, zmm23, {sae}
+
+// CHECK: vcvttph2ibs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x4f,0x68,0xf7]
+ vcvttph2ibs zmm22 {k7}, zmm23
+
+// CHECK: vcvttph2ibs zmm22 {k7} {z}, zmm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x9f,0x68,0xf7]
+ vcvttph2ibs zmm22 {k7} {z}, zmm23, {sae}
+
+// CHECK: vcvttph2ibs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x68,0xf7]
+ vcvttph2ibs ymm22, ymm23
+
+// CHECK: vcvttph2ibs ymm22, ymm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x78,0x18,0x68,0xf7]
+ vcvttph2ibs ymm22, ymm23, {sae}
+
+// CHECK: vcvttph2ibs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x2f,0x68,0xf7]
+ vcvttph2ibs ymm22 {k7}, ymm23
+
+// CHECK: vcvttph2ibs ymm22 {k7} {z}, ymm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x78,0x9f,0x68,0xf7]
+ vcvttph2ibs ymm22 {k7} {z}, ymm23, {sae}
+
+// CHECK: vcvttph2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttph2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttph2ibs xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x18,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2ibs xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvttph2ibs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttph2ibs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvttph2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x8f,0x68,0x71,0x7f]
+ vcvttph2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvttph2ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x9f,0x68,0x72,0x80]
+ vcvttph2ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvttph2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttph2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttph2ibs ymm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x38,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2ibs ymm22, word ptr [rip]{1to16}
+
+// CHECK: vcvttph2ibs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttph2ibs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvttph2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7c,0xaf,0x68,0x71,0x7f]
+ vcvttph2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvttph2ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xbf,0x68,0x72,0x80]
+ vcvttph2ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvttph2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttph2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttph2ibs zmm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x58,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2ibs zmm22, word ptr [rip]{1to32}
+
+// CHECK: vcvttph2ibs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttph2ibs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvttph2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7c,0xcf,0x68,0x71,0x7f]
+ vcvttph2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvttph2ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xdf,0x68,0x72,0x80]
+ vcvttph2ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvttph2iubs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x6a,0xf7]
+ vcvttph2iubs xmm22, xmm23
+
+// CHECK: vcvttph2iubs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x0f,0x6a,0xf7]
+ vcvttph2iubs xmm22 {k7}, xmm23
+
+// CHECK: vcvttph2iubs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x8f,0x6a,0xf7]
+ vcvttph2iubs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvttph2iubs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x6a,0xf7]
+ vcvttph2iubs zmm22, zmm23
+
+// CHECK: vcvttph2iubs zmm22, zmm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x18,0x6a,0xf7]
+ vcvttph2iubs zmm22, zmm23, {sae}
+
+// CHECK: vcvttph2iubs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x4f,0x6a,0xf7]
+ vcvttph2iubs zmm22 {k7}, zmm23
+
+// CHECK: vcvttph2iubs zmm22 {k7} {z}, zmm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x7c,0x9f,0x6a,0xf7]
+ vcvttph2iubs zmm22 {k7} {z}, zmm23, {sae}
+
+// CHECK: vcvttph2iubs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x6a,0xf7]
+ vcvttph2iubs ymm22, ymm23
+
+// CHECK: vcvttph2iubs ymm22, ymm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x78,0x18,0x6a,0xf7]
+ vcvttph2iubs ymm22, ymm23, {sae}
+
+// CHECK: vcvttph2iubs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7c,0x2f,0x6a,0xf7]
+ vcvttph2iubs ymm22 {k7}, ymm23
+
+// CHECK: vcvttph2iubs ymm22 {k7} {z}, ymm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x78,0x9f,0x6a,0xf7]
+ vcvttph2iubs ymm22 {k7} {z}, ymm23, {sae}
+
+// CHECK: vcvttph2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttph2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttph2iubs xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x18,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2iubs xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvttph2iubs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttph2iubs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvttph2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x8f,0x6a,0x71,0x7f]
+ vcvttph2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvttph2iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x9f,0x6a,0x72,0x80]
+ vcvttph2iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvttph2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttph2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttph2iubs ymm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x38,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2iubs ymm22, word ptr [rip]{1to16}
+
+// CHECK: vcvttph2iubs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttph2iubs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvttph2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7c,0xaf,0x6a,0x71,0x7f]
+ vcvttph2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvttph2iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xbf,0x6a,0x72,0x80]
+ vcvttph2iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvttph2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7c,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttph2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttph2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7c,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttph2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttph2iubs zmm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7c,0x58,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttph2iubs zmm22, word ptr [rip]{1to32}
+
+// CHECK: vcvttph2iubs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7c,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttph2iubs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvttph2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7c,0xcf,0x6a,0x71,0x7f]
+ vcvttph2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvttph2iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7c,0xdf,0x6a,0x72,0x80]
+ vcvttph2iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvttps2ibs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x68,0xf7]
+ vcvttps2ibs xmm22, xmm23
+
+// CHECK: vcvttps2ibs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x0f,0x68,0xf7]
+ vcvttps2ibs xmm22 {k7}, xmm23
+
+// CHECK: vcvttps2ibs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x8f,0x68,0xf7]
+ vcvttps2ibs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvttps2ibs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x68,0xf7]
+ vcvttps2ibs zmm22, zmm23
+
+// CHECK: vcvttps2ibs zmm22, zmm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x18,0x68,0xf7]
+ vcvttps2ibs zmm22, zmm23, {sae}
+
+// CHECK: vcvttps2ibs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x4f,0x68,0xf7]
+ vcvttps2ibs zmm22 {k7}, zmm23
+
+// CHECK: vcvttps2ibs zmm22 {k7} {z}, zmm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x9f,0x68,0xf7]
+ vcvttps2ibs zmm22 {k7} {z}, zmm23, {sae}
+
+// CHECK: vcvttps2ibs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x68,0xf7]
+ vcvttps2ibs ymm22, ymm23
+
+// CHECK: vcvttps2ibs ymm22, ymm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x79,0x18,0x68,0xf7]
+ vcvttps2ibs ymm22, ymm23, {sae}
+
+// CHECK: vcvttps2ibs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x2f,0x68,0xf7]
+ vcvttps2ibs ymm22 {k7}, ymm23
+
+// CHECK: vcvttps2ibs ymm22 {k7} {z}, ymm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x79,0x9f,0x68,0xf7]
+ vcvttps2ibs ymm22 {k7} {z}, ymm23, {sae}
+
+// CHECK: vcvttps2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttps2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttps2ibs xmm22, dword ptr [rip]{1to4}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x18,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2ibs xmm22, dword ptr [rip]{1to4}
+
+// CHECK: vcvttps2ibs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttps2ibs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvttps2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x8f,0x68,0x71,0x7f]
+ vcvttps2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvttps2ibs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x9f,0x68,0x72,0x80]
+ vcvttps2ibs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+
+// CHECK: vcvttps2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttps2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttps2ibs ymm22, dword ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x38,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2ibs ymm22, dword ptr [rip]{1to8}
+
+// CHECK: vcvttps2ibs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttps2ibs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvttps2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7d,0xaf,0x68,0x71,0x7f]
+ vcvttps2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvttps2ibs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xbf,0x68,0x72,0x80]
+ vcvttps2ibs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+
+// CHECK: vcvttps2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttps2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttps2ibs zmm22, dword ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x58,0x68,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2ibs zmm22, dword ptr [rip]{1to16}
+
+// CHECK: vcvttps2ibs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttps2ibs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvttps2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7d,0xcf,0x68,0x71,0x7f]
+ vcvttps2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvttps2ibs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xdf,0x68,0x72,0x80]
+ vcvttps2ibs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+
+// CHECK: vcvttps2iubs xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x6a,0xf7]
+ vcvttps2iubs xmm22, xmm23
+
+// CHECK: vcvttps2iubs xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x0f,0x6a,0xf7]
+ vcvttps2iubs xmm22 {k7}, xmm23
+
+// CHECK: vcvttps2iubs xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x8f,0x6a,0xf7]
+ vcvttps2iubs xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvttps2iubs zmm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x6a,0xf7]
+ vcvttps2iubs zmm22, zmm23
+
+// CHECK: vcvttps2iubs zmm22, zmm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x18,0x6a,0xf7]
+ vcvttps2iubs zmm22, zmm23, {sae}
+
+// CHECK: vcvttps2iubs zmm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x4f,0x6a,0xf7]
+ vcvttps2iubs zmm22 {k7}, zmm23
+
+// CHECK: vcvttps2iubs zmm22 {k7} {z}, zmm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x7d,0x9f,0x6a,0xf7]
+ vcvttps2iubs zmm22 {k7} {z}, zmm23, {sae}
+
+// CHECK: vcvttps2iubs ymm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x6a,0xf7]
+ vcvttps2iubs ymm22, ymm23
+
+// CHECK: vcvttps2iubs ymm22, ymm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x79,0x18,0x6a,0xf7]
+ vcvttps2iubs ymm22, ymm23, {sae}
+
+// CHECK: vcvttps2iubs ymm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7d,0x2f,0x6a,0xf7]
+ vcvttps2iubs ymm22 {k7}, ymm23
+
+// CHECK: vcvttps2iubs ymm22 {k7} {z}, ymm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x79,0x9f,0x6a,0xf7]
+ vcvttps2iubs ymm22 {k7} {z}, ymm23, {sae}
+
+// CHECK: vcvttps2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttps2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttps2iubs xmm22, dword ptr [rip]{1to4}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x18,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2iubs xmm22, dword ptr [rip]{1to4}
+
+// CHECK: vcvttps2iubs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvttps2iubs xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvttps2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x8f,0x6a,0x71,0x7f]
+ vcvttps2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvttps2iubs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x9f,0x6a,0x72,0x80]
+ vcvttps2iubs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+
+// CHECK: vcvttps2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttps2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttps2iubs ymm22, dword ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x38,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2iubs ymm22, dword ptr [rip]{1to8}
+
+// CHECK: vcvttps2iubs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvttps2iubs ymm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvttps2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7d,0xaf,0x6a,0x71,0x7f]
+ vcvttps2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvttps2iubs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xbf,0x6a,0x72,0x80]
+ vcvttps2iubs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+
+// CHECK: vcvttps2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7d,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvttps2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvttps2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7d,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvttps2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvttps2iubs zmm22, dword ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7d,0x58,0x6a,0x35,0x00,0x00,0x00,0x00]
+ vcvttps2iubs zmm22, dword ptr [rip]{1to16}
+
+// CHECK: vcvttps2iubs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7d,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvttps2iubs zmm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvttps2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7d,0xcf,0x6a,0x71,0x7f]
+ vcvttps2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvttps2iubs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7d,0xdf,0x6a,0x72,0x80]
+ vcvttps2iubs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index e85cde3140594..46b9f9f0d8880 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -1189,6 +1189,12 @@ static const X86FoldTableEntry Table1[] = {
{X86::VCVTDQ2PSZ256rr, X86::VCVTDQ2PSZ256rm, 0},
{X86::VCVTDQ2PSZrr, X86::VCVTDQ2PSZrm, 0},
{X86::VCVTDQ2PSrr, X86::VCVTDQ2PSrm, 0},
+ {X86::VCVTNEBF162IBSZ128rr, X86::VCVTNEBF162IBSZ128rm, 0},
+ {X86::VCVTNEBF162IBSZ256rr, X86::VCVTNEBF162IBSZ256rm, 0},
+ {X86::VCVTNEBF162IBSZrr, X86::VCVTNEBF162IBSZrm, 0},
+ {X86::VCVTNEBF162IUBSZ128rr, X86::VCVTNEBF162IUBSZ128rm, 0},
+ {X86::VCVTNEBF162IUBSZ256rr, X86::VCVTNEBF162IUBSZ256rm, 0},
+ {X86::VCVTNEBF162IUBSZrr, X86::VCVTNEBF162IUBSZrm, 0},
{X86::VCVTNEPS2BF16Yrr, X86::VCVTNEPS2BF16Yrm, 0},
{X86::VCVTNEPS2BF16Z128rr, X86::VCVTNEPS2BF16Z128rm, 0},
{X86::VCVTNEPS2BF16Z256rr, X86::VCVTNEPS2BF16Z256rm, 0},
@@ -1219,6 +1225,12 @@ static const X86FoldTableEntry Table1[] = {
{X86::VCVTPH2DQZ128rr, X86::VCVTPH2DQZ128rm, TB_NO_REVERSE},
{X86::VCVTPH2DQZ256rr, X86::VCVTPH2DQZ256rm, 0},
{X86::VCVTPH2DQZrr, X86::VCVTPH2DQZrm, 0},
+ {X86::VCVTPH2IBSZ128rr, X86::VCVTPH2IBSZ128rm, 0},
+ {X86::VCVTPH2IBSZ256rr, X86::VCVTPH2IBSZ256rm, 0},
+ {X86::VCVTPH2IBSZrr, X86::VCVTPH2IBSZrm, 0},
+ {X86::VCVTPH2IUBSZ128rr, X86::VCVTPH2IUBSZ128rm, 0},
+ {X86::VCVTPH2IUBSZ256rr, X86::VCVTPH2IUBSZ256rm, 0},
+ {X86::VCVTPH2IUBSZrr, X86::VCVTPH2IUBSZrm, 0},
{X86::VCVTPH2PDZ128rr, X86::VCVTPH2PDZ128rm, TB_NO_REVERSE},
{X86::VCVTPH2PDZ256rr, X86::VCVTPH2PDZ256rm, TB_NO_REVERSE},
{X86::VCVTPH2PDZrr, X86::VCVTPH2PDZrm, 0},
@@ -1250,6 +1262,12 @@ static const X86FoldTableEntry Table1[] = {
{X86::VCVTPS2DQZ256rr, X86::VCVTPS2DQZ256rm, 0},
{X86::VCVTPS2DQZrr, X86::VCVTPS2DQZrm, 0},
{X86::VCVTPS2DQrr, X86::VCVTPS2DQrm, 0},
+ {X86::VCVTPS2IBSZ128rr, X86::VCVTPS2IBSZ128rm, 0},
+ {X86::VCVTPS2IBSZ256rr, X86::VCVTPS2IBSZ256rm, 0},
+ {X86::VCVTPS2IBSZrr, X86::VCVTPS2IBSZrm, 0},
+ {X86::VCVTPS2IUBSZ128rr, X86::VCVTPS2IUBSZ128rm, 0},
+ {X86::VCVTPS2IUBSZ256rr, X86::VCVTPS2IUBSZ256rm, 0},
+ {X86::VCVTPS2IUBSZrr, X86::VCVTPS2IUBSZrm, 0},
{X86::VCVTPS2PDYrr, X86::VCVTPS2PDYrm, 0},
{X86::VCVTPS2PDZ128rr, X86::VCVTPS2PDZ128rm, TB_NO_REVERSE},
{X86::VCVTPS2PDZ256rr, X86::VCVTPS2PDZ256rm, 0},
@@ -1300,6 +1318,12 @@ static const X86FoldTableEntry Table1[] = {
{X86::VCVTSS2SIrr_Int, X86::VCVTSS2SIrm_Int, TB_NO_REVERSE},
{X86::VCVTSS2USI64Zrr_Int, X86::VCVTSS2USI64Zrm_Int, TB_NO_REVERSE},
{X86::VCVTSS2USIZrr_Int, X86::VCVTSS2USIZrm_Int, TB_NO_REVERSE},
+ {X86::VCVTTNEBF162IBSZ128rr, X86::VCVTTNEBF162IBSZ128rm, 0},
+ {X86::VCVTTNEBF162IBSZ256rr, X86::VCVTTNEBF162IBSZ256rm, 0},
+ {X86::VCVTTNEBF162IBSZrr, X86::VCVTTNEBF162IBSZrm, 0},
+ {X86::VCVTTNEBF162IUBSZ128rr, X86::VCVTTNEBF162IUBSZ128rm, 0},
+ {X86::VCVTTNEBF162IUBSZ256rr, X86::VCVTTNEBF162IUBSZ256rm, 0},
+ {X86::VCVTTNEBF162IUBSZrr, X86::VCVTTNEBF162IUBSZrm, 0},
{X86::VCVTTPD2DQYrr, X86::VCVTTPD2DQYrm, 0},
{X86::VCVTTPD2DQZ128rr, X86::VCVTTPD2DQZ128rm, 0},
{X86::VCVTTPD2DQZ256rr, X86::VCVTTPD2DQZ256rm, 0},
@@ -1317,6 +1341,12 @@ static const X86FoldTableEntry Table1[] = {
{X86::VCVTTPH2DQZ128rr, X86::VCVTTPH2DQZ128rm, TB_NO_REVERSE},
{X86::VCVTTPH2DQZ256rr, X86::VCVTTPH2DQZ256rm, 0},
{X86::VCVTTPH2DQZrr, X86::VCVTTPH2DQZrm, 0},
+ {X86::VCVTTPH2IBSZ128rr, X86::VCVTTPH2IBSZ128rm, 0},
+ {X86::VCVTTPH2IBSZ256rr, X86::VCVTTPH2IBSZ256rm, 0},
+ {X86::VCVTTPH2IBSZrr, X86::VCVTTPH2IBSZrm, 0},
+ {X86::VCVTTPH2IUBSZ128rr, X86::VCVTTPH2IUBSZ128rm, 0},
+ {X86::VCVTTPH2IUBSZ256rr, X86::VCVTTPH2IUBSZ256rm, 0},
+ {X86::VCVTTPH2IUBSZrr, X86::VCVTTPH2IUBSZrm, 0},
{X86::VCVTTPH2QQZ128rr, X86::VCVTTPH2QQZ128rm, TB_NO_REVERSE},
{X86::VCVTTPH2QQZ256rr, X86::VCVTTPH2QQZ256rm, TB_NO_REVERSE},
{X86::VCVTTPH2QQZrr, X86::VCVTTPH2QQZrm, 0},
@@ -1337,6 +1367,12 @@ static const X86FoldTableEntry Table1[] = {
{X86::VCVTTPS2DQZ256rr, X86::VCVTTPS2DQZ256rm, 0},
{X86::VCVTTPS2DQZrr, X86::VCVTTPS2DQZrm, 0},
{X86::VCVTTPS2DQrr, X86::VCVTTPS2DQrm, 0},
+ {X86::VCVTTPS2IBSZ128rr, X86::VCVTTPS2IBSZ128rm, 0},
+ {X86::VCVTTPS2IBSZ256rr, X86::VCVTTPS2IBSZ256rm, 0},
+ {X86::VCVTTPS2IBSZrr, X86::VCVTTPS2IBSZrm, 0},
+ {X86::VCVTTPS2IUBSZ128rr, X86::VCVTTPS2IUBSZ128rm, 0},
+ {X86::VCVTTPS2IUBSZ256rr, X86::VCVTTPS2IUBSZ256rm, 0},
+ {X86::VCVTTPS2IUBSZrr, X86::VCVTTPS2IUBSZrm, 0},
{X86::VCVTTPS2QQZ128rr, X86::VCVTTPS2QQZ128rm, TB_NO_REVERSE},
{X86::VCVTTPS2QQZ256rr, X86::VCVTTPS2QQZ256rm, 0},
{X86::VCVTTPS2QQZrr, X86::VCVTTPS2QQZrm, 0},
@@ -2416,6 +2452,12 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCVTNE2PS2BF16Z128rr, X86::VCVTNE2PS2BF16Z128rm, 0},
{X86::VCVTNE2PS2BF16Z256rr, X86::VCVTNE2PS2BF16Z256rm, 0},
{X86::VCVTNE2PS2BF16Zrr, X86::VCVTNE2PS2BF16Zrm, 0},
+ {X86::VCVTNEBF162IBSZ128rrkz, X86::VCVTNEBF162IBSZ128rmkz, 0},
+ {X86::VCVTNEBF162IBSZ256rrkz, X86::VCVTNEBF162IBSZ256rmkz, 0},
+ {X86::VCVTNEBF162IBSZrrkz, X86::VCVTNEBF162IBSZrmkz, 0},
+ {X86::VCVTNEBF162IUBSZ128rrkz, X86::VCVTNEBF162IUBSZ128rmkz, 0},
+ {X86::VCVTNEBF162IUBSZ256rrkz, X86::VCVTNEBF162IUBSZ256rmkz, 0},
+ {X86::VCVTNEBF162IUBSZrrkz, X86::VCVTNEBF162IUBSZrmkz, 0},
{X86::VCVTNEPS2BF16Z128rrkz, X86::VCVTNEPS2BF16Z128rmkz, 0},
{X86::VCVTNEPS2BF16Z256rrkz, X86::VCVTNEPS2BF16Z256rmkz, 0},
{X86::VCVTNEPS2BF16Zrrkz, X86::VCVTNEPS2BF16Zrmkz, 0},
@@ -2440,6 +2482,12 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCVTPH2DQZ128rrkz, X86::VCVTPH2DQZ128rmkz, TB_NO_REVERSE},
{X86::VCVTPH2DQZ256rrkz, X86::VCVTPH2DQZ256rmkz, 0},
{X86::VCVTPH2DQZrrkz, X86::VCVTPH2DQZrmkz, 0},
+ {X86::VCVTPH2IBSZ128rrkz, X86::VCVTPH2IBSZ128rmkz, 0},
+ {X86::VCVTPH2IBSZ256rrkz, X86::VCVTPH2IBSZ256rmkz, 0},
+ {X86::VCVTPH2IBSZrrkz, X86::VCVTPH2IBSZrmkz, 0},
+ {X86::VCVTPH2IUBSZ128rrkz, X86::VCVTPH2IUBSZ128rmkz, 0},
+ {X86::VCVTPH2IUBSZ256rrkz, X86::VCVTPH2IUBSZ256rmkz, 0},
+ {X86::VCVTPH2IUBSZrrkz, X86::VCVTPH2IUBSZrmkz, 0},
{X86::VCVTPH2PDZ128rrkz, X86::VCVTPH2PDZ128rmkz, TB_NO_REVERSE},
{X86::VCVTPH2PDZ256rrkz, X86::VCVTPH2PDZ256rmkz, TB_NO_REVERSE},
{X86::VCVTPH2PDZrrkz, X86::VCVTPH2PDZrmkz, 0},
@@ -2467,6 +2515,12 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCVTPS2DQZ128rrkz, X86::VCVTPS2DQZ128rmkz, 0},
{X86::VCVTPS2DQZ256rrkz, X86::VCVTPS2DQZ256rmkz, 0},
{X86::VCVTPS2DQZrrkz, X86::VCVTPS2DQZrmkz, 0},
+ {X86::VCVTPS2IBSZ128rrkz, X86::VCVTPS2IBSZ128rmkz, 0},
+ {X86::VCVTPS2IBSZ256rrkz, X86::VCVTPS2IBSZ256rmkz, 0},
+ {X86::VCVTPS2IBSZrrkz, X86::VCVTPS2IBSZrmkz, 0},
+ {X86::VCVTPS2IUBSZ128rrkz, X86::VCVTPS2IUBSZ128rmkz, 0},
+ {X86::VCVTPS2IUBSZ256rrkz, X86::VCVTPS2IUBSZ256rmkz, 0},
+ {X86::VCVTPS2IUBSZrrkz, X86::VCVTPS2IUBSZrmkz, 0},
{X86::VCVTPS2PDZ128rrkz, X86::VCVTPS2PDZ128rmkz, TB_NO_REVERSE},
{X86::VCVTPS2PDZ256rrkz, X86::VCVTPS2PDZ256rmkz, 0},
{X86::VCVTPS2PDZrrkz, X86::VCVTPS2PDZrmkz, 0},
@@ -2527,6 +2581,12 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCVTSS2SDrr_Int, X86::VCVTSS2SDrm_Int, TB_NO_REVERSE},
{X86::VCVTSS2SHZrr, X86::VCVTSS2SHZrm, 0},
{X86::VCVTSS2SHZrr_Int, X86::VCVTSS2SHZrm_Int, TB_NO_REVERSE},
+ {X86::VCVTTNEBF162IBSZ128rrkz, X86::VCVTTNEBF162IBSZ128rmkz, 0},
+ {X86::VCVTTNEBF162IBSZ256rrkz, X86::VCVTTNEBF162IBSZ256rmkz, 0},
+ {X86::VCVTTNEBF162IBSZrrkz, X86::VCVTTNEBF162IBSZrmkz, 0},
+ {X86::VCVTTNEBF162IUBSZ128rrkz, X86::VCVTTNEBF162IUBSZ128rmkz, 0},
+ {X86::VCVTTNEBF162IUBSZ256rrkz, X86::VCVTTNEBF162IUBSZ256rmkz, 0},
+ {X86::VCVTTNEBF162IUBSZrrkz, X86::VCVTTNEBF162IUBSZrmkz, 0},
{X86::VCVTTPD2DQZ128rrkz, X86::VCVTTPD2DQZ128rmkz, 0},
{X86::VCVTTPD2DQZ256rrkz, X86::VCVTTPD2DQZ256rmkz, 0},
{X86::VCVTTPD2DQZrrkz, X86::VCVTTPD2DQZrmkz, 0},
@@ -2542,6 +2602,12 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCVTTPH2DQZ128rrkz, X86::VCVTTPH2DQZ128rmkz, TB_NO_REVERSE},
{X86::VCVTTPH2DQZ256rrkz, X86::VCVTTPH2DQZ256rmkz, 0},
{X86::VCVTTPH2DQZrrkz, X86::VCVTTPH2DQZrmkz, 0},
+ {X86::VCVTTPH2IBSZ128rrkz, X86::VCVTTPH2IBSZ128rmkz, 0},
+ {X86::VCVTTPH2IBSZ256rrkz, X86::VCVTTPH2IBSZ256rmkz, 0},
+ {X86::VCVTTPH2IBSZrrkz, X86::VCVTTPH2IBSZrmkz, 0},
+ {X86::VCVTTPH2IUBSZ128rrkz, X86::VCVTTPH2IUBSZ128rmkz, 0},
+ {X86::VCVTTPH2IUBSZ256rrkz, X86::VCVTTPH2IUBSZ256rmkz, 0},
+ {X86::VCVTTPH2IUBSZrrkz, X86::VCVTTPH2IUBSZrmkz, 0},
{X86::VCVTTPH2QQZ128rrkz, X86::VCVTTPH2QQZ128rmkz, TB_NO_REVERSE},
{X86::VCVTTPH2QQZ256rrkz, X86::VCVTTPH2QQZ256rmkz, TB_NO_REVERSE},
{X86::VCVTTPH2QQZrrkz, X86::VCVTTPH2QQZrmkz, 0},
@@ -2560,6 +2626,12 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCVTTPS2DQZ128rrkz, X86::VCVTTPS2DQZ128rmkz, 0},
{X86::VCVTTPS2DQZ256rrkz, X86::VCVTTPS2DQZ256rmkz, 0},
{X86::VCVTTPS2DQZrrkz, X86::VCVTTPS2DQZrmkz, 0},
+ {X86::VCVTTPS2IBSZ128rrkz, X86::VCVTTPS2IBSZ128rmkz, 0},
+ {X86::VCVTTPS2IBSZ256rrkz, X86::VCVTTPS2IBSZ256rmkz, 0},
+ {X86::VCVTTPS2IBSZrrkz, X86::VCVTTPS2IBSZrmkz, 0},
+ {X86::VCVTTPS2IUBSZ128rrkz, X86::VCVTTPS2IUBSZ128rmkz, 0},
+ {X86::VCVTTPS2IUBSZ256rrkz, X86::VCVTTPS2IUBSZ256rmkz, 0},
+ {X86::VCVTTPS2IUBSZrrkz, X86::VCVTTPS2IUBSZrmkz, 0},
{X86::VCVTTPS2QQZ128rrkz, X86::VCVTTPS2QQZ128rmkz, TB_NO_REVERSE},
{X86::VCVTTPS2QQZ256rrkz, X86::VCVTTPS2QQZ256rmkz, 0},
{X86::VCVTTPS2QQZrrkz, X86::VCVTTPS2QQZrmkz, 0},
@@ -4010,6 +4082,12 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCVTNE2PS2BF16Z128rrkz, X86::VCVTNE2PS2BF16Z128rmkz, 0},
{X86::VCVTNE2PS2BF16Z256rrkz, X86::VCVTNE2PS2BF16Z256rmkz, 0},
{X86::VCVTNE2PS2BF16Zrrkz, X86::VCVTNE2PS2BF16Zrmkz, 0},
+ {X86::VCVTNEBF162IBSZ128rrk, X86::VCVTNEBF162IBSZ128rmk, 0},
+ {X86::VCVTNEBF162IBSZ256rrk, X86::VCVTNEBF162IBSZ256rmk, 0},
+ {X86::VCVTNEBF162IBSZrrk, X86::VCVTNEBF162IBSZrmk, 0},
+ {X86::VCVTNEBF162IUBSZ128rrk, X86::VCVTNEBF162IUBSZ128rmk, 0},
+ {X86::VCVTNEBF162IUBSZ256rrk, X86::VCVTNEBF162IUBSZ256rmk, 0},
+ {X86::VCVTNEBF162IUBSZrrk, X86::VCVTNEBF162IUBSZrmk, 0},
{X86::VCVTNEPS2BF16Z128rrk, X86::VCVTNEPS2BF16Z128rmk, 0},
{X86::VCVTNEPS2BF16Z256rrk, X86::VCVTNEPS2BF16Z256rmk, 0},
{X86::VCVTNEPS2BF16Zrrk, X86::VCVTNEPS2BF16Zrmk, 0},
@@ -4034,6 +4112,12 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCVTPH2DQZ128rrk, X86::VCVTPH2DQZ128rmk, TB_NO_REVERSE},
{X86::VCVTPH2DQZ256rrk, X86::VCVTPH2DQZ256rmk, 0},
{X86::VCVTPH2DQZrrk, X86::VCVTPH2DQZrmk, 0},
+ {X86::VCVTPH2IBSZ128rrk, X86::VCVTPH2IBSZ128rmk, 0},
+ {X86::VCVTPH2IBSZ256rrk, X86::VCVTPH2IBSZ256rmk, 0},
+ {X86::VCVTPH2IBSZrrk, X86::VCVTPH2IBSZrmk, 0},
+ {X86::VCVTPH2IUBSZ128rrk, X86::VCVTPH2IUBSZ128rmk, 0},
+ {X86::VCVTPH2IUBSZ256rrk, X86::VCVTPH2IUBSZ256rmk, 0},
+ {X86::VCVTPH2IUBSZrrk, X86::VCVTPH2IUBSZrmk, 0},
{X86::VCVTPH2PDZ128rrk, X86::VCVTPH2PDZ128rmk, TB_NO_REVERSE},
{X86::VCVTPH2PDZ256rrk, X86::VCVTPH2PDZ256rmk, TB_NO_REVERSE},
{X86::VCVTPH2PDZrrk, X86::VCVTPH2PDZrmk, 0},
@@ -4061,6 +4145,12 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCVTPS2DQZ128rrk, X86::VCVTPS2DQZ128rmk, 0},
{X86::VCVTPS2DQZ256rrk, X86::VCVTPS2DQZ256rmk, 0},
{X86::VCVTPS2DQZrrk, X86::VCVTPS2DQZrmk, 0},
+ {X86::VCVTPS2IBSZ128rrk, X86::VCVTPS2IBSZ128rmk, 0},
+ {X86::VCVTPS2IBSZ256rrk, X86::VCVTPS2IBSZ256rmk, 0},
+ {X86::VCVTPS2IBSZrrk, X86::VCVTPS2IBSZrmk, 0},
+ {X86::VCVTPS2IUBSZ128rrk, X86::VCVTPS2IUBSZ128rmk, 0},
+ {X86::VCVTPS2IUBSZ256rrk, X86::VCVTPS2IUBSZ256rmk, 0},
+ {X86::VCVTPS2IUBSZrrk, X86::VCVTPS2IUBSZrmk, 0},
{X86::VCVTPS2PDZ128rrk, X86::VCVTPS2PDZ128rmk, TB_NO_REVERSE},
{X86::VCVTPS2PDZ256rrk, X86::VCVTPS2PDZ256rmk, 0},
{X86::VCVTPS2PDZrrk, X86::VCVTPS2PDZrmk, 0},
@@ -4091,6 +4181,12 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCVTSH2SSZrr_Intkz, X86::VCVTSH2SSZrm_Intkz, TB_NO_REVERSE},
{X86::VCVTSS2SDZrr_Intkz, X86::VCVTSS2SDZrm_Intkz, TB_NO_REVERSE},
{X86::VCVTSS2SHZrr_Intkz, X86::VCVTSS2SHZrm_Intkz, TB_NO_REVERSE},
+ {X86::VCVTTNEBF162IBSZ128rrk, X86::VCVTTNEBF162IBSZ128rmk, 0},
+ {X86::VCVTTNEBF162IBSZ256rrk, X86::VCVTTNEBF162IBSZ256rmk, 0},
+ {X86::VCVTTNEBF162IBSZrrk, X86::VCVTTNEBF162IBSZrmk, 0},
+ {X86::VCVTTNEBF162IUBSZ128rrk, X86::VCVTTNEBF162IUBSZ128rmk, 0},
+ {X86::VCVTTNEBF162IUBSZ256rrk, X86::VCVTTNEBF162IUBSZ256rmk, 0},
+ {X86::VCVTTNEBF162IUBSZrrk, X86::VCVTTNEBF162IUBSZrmk, 0},
{X86::VCVTTPD2DQZ128rrk, X86::VCVTTPD2DQZ128rmk, 0},
{X86::VCVTTPD2DQZ256rrk, X86::VCVTTPD2DQZ256rmk, 0},
{X86::VCVTTPD2DQZrrk, X86::VCVTTPD2DQZrmk, 0},
@@ -4106,6 +4202,12 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCVTTPH2DQZ128rrk, X86::VCVTTPH2DQZ128rmk, TB_NO_REVERSE},
{X86::VCVTTPH2DQZ256rrk, X86::VCVTTPH2DQZ256rmk, 0},
{X86::VCVTTPH2DQZrrk, X86::VCVTTPH2DQZrmk, 0},
+ {X86::VCVTTPH2IBSZ128rrk, X86::VCVTTPH2IBSZ128rmk, 0},
+ {X86::VCVTTPH2IBSZ256rrk, X86::VCVTTPH2IBSZ256rmk, 0},
+ {X86::VCVTTPH2IBSZrrk, X86::VCVTTPH2IBSZrmk, 0},
+ {X86::VCVTTPH2IUBSZ128rrk, X86::VCVTTPH2IUBSZ128rmk, 0},
+ {X86::VCVTTPH2IUBSZ256rrk, X86::VCVTTPH2IUBSZ256rmk, 0},
+ {X86::VCVTTPH2IUBSZrrk, X86::VCVTTPH2IUBSZrmk, 0},
{X86::VCVTTPH2QQZ128rrk, X86::VCVTTPH2QQZ128rmk, TB_NO_REVERSE},
{X86::VCVTTPH2QQZ256rrk, X86::VCVTTPH2QQZ256rmk, TB_NO_REVERSE},
{X86::VCVTTPH2QQZrrk, X86::VCVTTPH2QQZrmk, 0},
@@ -4124,6 +4226,12 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCVTTPS2DQZ128rrk, X86::VCVTTPS2DQZ128rmk, 0},
{X86::VCVTTPS2DQZ256rrk, X86::VCVTTPS2DQZ256rmk, 0},
{X86::VCVTTPS2DQZrrk, X86::VCVTTPS2DQZrmk, 0},
+ {X86::VCVTTPS2IBSZ128rrk, X86::VCVTTPS2IBSZ128rmk, 0},
+ {X86::VCVTTPS2IBSZ256rrk, X86::VCVTTPS2IBSZ256rmk, 0},
+ {X86::VCVTTPS2IBSZrrk, X86::VCVTTPS2IBSZrmk, 0},
+ {X86::VCVTTPS2IUBSZ128rrk, X86::VCVTTPS2IUBSZ128rmk, 0},
+ {X86::VCVTTPS2IUBSZ256rrk, X86::VCVTTPS2IUBSZ256rmk, 0},
+ {X86::VCVTTPS2IUBSZrrk, X86::VCVTTPS2IUBSZrmk, 0},
{X86::VCVTTPS2QQZ128rrk, X86::VCVTTPS2QQZ128rmk, TB_NO_REVERSE},
{X86::VCVTTPS2QQZ256rrk, X86::VCVTTPS2QQZ256rmk, 0},
{X86::VCVTTPS2QQZrrk, X86::VCVTTPS2QQZrmk, 0},
@@ -6725,6 +6833,12 @@ static const X86FoldTableEntry BroadcastTable1[] = {
{X86::VCVTDQ2PSZ128rr, X86::VCVTDQ2PSZ128rmb, TB_BCAST_D},
{X86::VCVTDQ2PSZ256rr, X86::VCVTDQ2PSZ256rmb, TB_BCAST_D},
{X86::VCVTDQ2PSZrr, X86::VCVTDQ2PSZrmb, TB_BCAST_D},
+ {X86::VCVTNEBF162IBSZ128rr, X86::VCVTNEBF162IBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTNEBF162IBSZ256rr, X86::VCVTNEBF162IBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTNEBF162IBSZrr, X86::VCVTNEBF162IBSZrmb, TB_BCAST_SH},
+ {X86::VCVTNEBF162IUBSZ128rr, X86::VCVTNEBF162IUBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTNEBF162IUBSZ256rr, X86::VCVTNEBF162IUBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTNEBF162IUBSZrr, X86::VCVTNEBF162IUBSZrmb, TB_BCAST_SH},
{X86::VCVTNEPS2BF16Z128rr, X86::VCVTNEPS2BF16Z128rmb, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Z256rr, X86::VCVTNEPS2BF16Z256rmb, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Zrr, X86::VCVTNEPS2BF16Zrmb, TB_BCAST_SS},
@@ -6749,6 +6863,12 @@ static const X86FoldTableEntry BroadcastTable1[] = {
{X86::VCVTPH2DQZ128rr, X86::VCVTPH2DQZ128rmb, TB_BCAST_SH},
{X86::VCVTPH2DQZ256rr, X86::VCVTPH2DQZ256rmb, TB_BCAST_SH},
{X86::VCVTPH2DQZrr, X86::VCVTPH2DQZrmb, TB_BCAST_SH},
+ {X86::VCVTPH2IBSZ128rr, X86::VCVTPH2IBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTPH2IBSZ256rr, X86::VCVTPH2IBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTPH2IBSZrr, X86::VCVTPH2IBSZrmb, TB_BCAST_SH},
+ {X86::VCVTPH2IUBSZ128rr, X86::VCVTPH2IUBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTPH2IUBSZ256rr, X86::VCVTPH2IUBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTPH2IUBSZrr, X86::VCVTPH2IUBSZrmb, TB_BCAST_SH},
{X86::VCVTPH2PDZ128rr, X86::VCVTPH2PDZ128rmb, TB_BCAST_SH},
{X86::VCVTPH2PDZ256rr, X86::VCVTPH2PDZ256rmb, TB_BCAST_SH},
{X86::VCVTPH2PDZrr, X86::VCVTPH2PDZrmb, TB_BCAST_SH},
@@ -6773,6 +6893,12 @@ static const X86FoldTableEntry BroadcastTable1[] = {
{X86::VCVTPS2DQZ128rr, X86::VCVTPS2DQZ128rmb, TB_BCAST_SS},
{X86::VCVTPS2DQZ256rr, X86::VCVTPS2DQZ256rmb, TB_BCAST_SS},
{X86::VCVTPS2DQZrr, X86::VCVTPS2DQZrmb, TB_BCAST_SS},
+ {X86::VCVTPS2IBSZ128rr, X86::VCVTPS2IBSZ128rmb, TB_BCAST_SS},
+ {X86::VCVTPS2IBSZ256rr, X86::VCVTPS2IBSZ256rmb, TB_BCAST_SS},
+ {X86::VCVTPS2IBSZrr, X86::VCVTPS2IBSZrmb, TB_BCAST_SS},
+ {X86::VCVTPS2IUBSZ128rr, X86::VCVTPS2IUBSZ128rmb, TB_BCAST_SS},
+ {X86::VCVTPS2IUBSZ256rr, X86::VCVTPS2IUBSZ256rmb, TB_BCAST_SS},
+ {X86::VCVTPS2IUBSZrr, X86::VCVTPS2IUBSZrmb, TB_BCAST_SS},
{X86::VCVTPS2PDZ128rr, X86::VCVTPS2PDZ128rmb, TB_BCAST_SS},
{X86::VCVTPS2PDZ256rr, X86::VCVTPS2PDZ256rmb, TB_BCAST_SS},
{X86::VCVTPS2PDZrr, X86::VCVTPS2PDZrmb, TB_BCAST_SS},
@@ -6797,6 +6923,12 @@ static const X86FoldTableEntry BroadcastTable1[] = {
{X86::VCVTQQ2PSZ128rr, X86::VCVTQQ2PSZ128rmb, TB_BCAST_Q},
{X86::VCVTQQ2PSZ256rr, X86::VCVTQQ2PSZ256rmb, TB_BCAST_Q},
{X86::VCVTQQ2PSZrr, X86::VCVTQQ2PSZrmb, TB_BCAST_Q},
+ {X86::VCVTTNEBF162IBSZ128rr, X86::VCVTTNEBF162IBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IBSZ256rr, X86::VCVTTNEBF162IBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IBSZrr, X86::VCVTTNEBF162IBSZrmb, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IUBSZ128rr, X86::VCVTTNEBF162IUBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IUBSZ256rr, X86::VCVTTNEBF162IUBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IUBSZrr, X86::VCVTTNEBF162IUBSZrmb, TB_BCAST_SH},
{X86::VCVTTPD2DQZ128rr, X86::VCVTTPD2DQZ128rmb, TB_BCAST_SD},
{X86::VCVTTPD2DQZ256rr, X86::VCVTTPD2DQZ256rmb, TB_BCAST_SD},
{X86::VCVTTPD2DQZrr, X86::VCVTTPD2DQZrmb, TB_BCAST_SD},
@@ -6812,6 +6944,12 @@ static const X86FoldTableEntry BroadcastTable1[] = {
{X86::VCVTTPH2DQZ128rr, X86::VCVTTPH2DQZ128rmb, TB_BCAST_SH},
{X86::VCVTTPH2DQZ256rr, X86::VCVTTPH2DQZ256rmb, TB_BCAST_SH},
{X86::VCVTTPH2DQZrr, X86::VCVTTPH2DQZrmb, TB_BCAST_SH},
+ {X86::VCVTTPH2IBSZ128rr, X86::VCVTTPH2IBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTTPH2IBSZ256rr, X86::VCVTTPH2IBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTTPH2IBSZrr, X86::VCVTTPH2IBSZrmb, TB_BCAST_SH},
+ {X86::VCVTTPH2IUBSZ128rr, X86::VCVTTPH2IUBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTTPH2IUBSZ256rr, X86::VCVTTPH2IUBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTTPH2IUBSZrr, X86::VCVTTPH2IUBSZrmb, TB_BCAST_SH},
{X86::VCVTTPH2QQZ128rr, X86::VCVTTPH2QQZ128rmb, TB_BCAST_SH},
{X86::VCVTTPH2QQZ256rr, X86::VCVTTPH2QQZ256rmb, TB_BCAST_SH},
{X86::VCVTTPH2QQZrr, X86::VCVTTPH2QQZrmb, TB_BCAST_SH},
@@ -6830,6 +6968,12 @@ static const X86FoldTableEntry BroadcastTable1[] = {
{X86::VCVTTPS2DQZ128rr, X86::VCVTTPS2DQZ128rmb, TB_BCAST_SS},
{X86::VCVTTPS2DQZ256rr, X86::VCVTTPS2DQZ256rmb, TB_BCAST_SS},
{X86::VCVTTPS2DQZrr, X86::VCVTTPS2DQZrmb, TB_BCAST_SS},
+ {X86::VCVTTPS2IBSZ128rr, X86::VCVTTPS2IBSZ128rmb, TB_BCAST_SS},
+ {X86::VCVTTPS2IBSZ256rr, X86::VCVTTPS2IBSZ256rmb, TB_BCAST_SS},
+ {X86::VCVTTPS2IBSZrr, X86::VCVTTPS2IBSZrmb, TB_BCAST_SS},
+ {X86::VCVTTPS2IUBSZ128rr, X86::VCVTTPS2IUBSZ128rmb, TB_BCAST_SS},
+ {X86::VCVTTPS2IUBSZ256rr, X86::VCVTTPS2IUBSZ256rmb, TB_BCAST_SS},
+ {X86::VCVTTPS2IUBSZrr, X86::VCVTTPS2IUBSZrmb, TB_BCAST_SS},
{X86::VCVTTPS2QQZ128rr, X86::VCVTTPS2QQZ128rmb, TB_BCAST_SS},
{X86::VCVTTPS2QQZ256rr, X86::VCVTTPS2QQZ256rmb, TB_BCAST_SS},
{X86::VCVTTPS2QQZrr, X86::VCVTTPS2QQZrmb, TB_BCAST_SS},
@@ -7065,6 +7209,12 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCVTNE2PS2BF16Z128rr, X86::VCVTNE2PS2BF16Z128rmb, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Z256rr, X86::VCVTNE2PS2BF16Z256rmb, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Zrr, X86::VCVTNE2PS2BF16Zrmb, TB_BCAST_SS},
+ {X86::VCVTNEBF162IBSZ128rrkz, X86::VCVTNEBF162IBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEBF162IBSZ256rrkz, X86::VCVTNEBF162IBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEBF162IBSZrrkz, X86::VCVTNEBF162IBSZrmbkz, TB_BCAST_SH},
+ {X86::VCVTNEBF162IUBSZ128rrkz, X86::VCVTNEBF162IUBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEBF162IUBSZ256rrkz, X86::VCVTNEBF162IUBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEBF162IUBSZrrkz, X86::VCVTNEBF162IUBSZrmbkz, TB_BCAST_SH},
{X86::VCVTNEPS2BF16Z128rrkz, X86::VCVTNEPS2BF16Z128rmbkz, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Z256rrkz, X86::VCVTNEPS2BF16Z256rmbkz, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Zrrkz, X86::VCVTNEPS2BF16Zrmbkz, TB_BCAST_SS},
@@ -7089,6 +7239,12 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCVTPH2DQZ128rrkz, X86::VCVTPH2DQZ128rmbkz, TB_BCAST_SH},
{X86::VCVTPH2DQZ256rrkz, X86::VCVTPH2DQZ256rmbkz, TB_BCAST_SH},
{X86::VCVTPH2DQZrrkz, X86::VCVTPH2DQZrmbkz, TB_BCAST_SH},
+ {X86::VCVTPH2IBSZ128rrkz, X86::VCVTPH2IBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTPH2IBSZ256rrkz, X86::VCVTPH2IBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTPH2IBSZrrkz, X86::VCVTPH2IBSZrmbkz, TB_BCAST_SH},
+ {X86::VCVTPH2IUBSZ128rrkz, X86::VCVTPH2IUBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTPH2IUBSZ256rrkz, X86::VCVTPH2IUBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTPH2IUBSZrrkz, X86::VCVTPH2IUBSZrmbkz, TB_BCAST_SH},
{X86::VCVTPH2PDZ128rrkz, X86::VCVTPH2PDZ128rmbkz, TB_BCAST_SH},
{X86::VCVTPH2PDZ256rrkz, X86::VCVTPH2PDZ256rmbkz, TB_BCAST_SH},
{X86::VCVTPH2PDZrrkz, X86::VCVTPH2PDZrmbkz, TB_BCAST_SH},
@@ -7113,6 +7269,12 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCVTPS2DQZ128rrkz, X86::VCVTPS2DQZ128rmbkz, TB_BCAST_SS},
{X86::VCVTPS2DQZ256rrkz, X86::VCVTPS2DQZ256rmbkz, TB_BCAST_SS},
{X86::VCVTPS2DQZrrkz, X86::VCVTPS2DQZrmbkz, TB_BCAST_SS},
+ {X86::VCVTPS2IBSZ128rrkz, X86::VCVTPS2IBSZ128rmbkz, TB_BCAST_SS},
+ {X86::VCVTPS2IBSZ256rrkz, X86::VCVTPS2IBSZ256rmbkz, TB_BCAST_SS},
+ {X86::VCVTPS2IBSZrrkz, X86::VCVTPS2IBSZrmbkz, TB_BCAST_SS},
+ {X86::VCVTPS2IUBSZ128rrkz, X86::VCVTPS2IUBSZ128rmbkz, TB_BCAST_SS},
+ {X86::VCVTPS2IUBSZ256rrkz, X86::VCVTPS2IUBSZ256rmbkz, TB_BCAST_SS},
+ {X86::VCVTPS2IUBSZrrkz, X86::VCVTPS2IUBSZrmbkz, TB_BCAST_SS},
{X86::VCVTPS2PDZ128rrkz, X86::VCVTPS2PDZ128rmbkz, TB_BCAST_SS},
{X86::VCVTPS2PDZ256rrkz, X86::VCVTPS2PDZ256rmbkz, TB_BCAST_SS},
{X86::VCVTPS2PDZrrkz, X86::VCVTPS2PDZrmbkz, TB_BCAST_SS},
@@ -7137,6 +7299,12 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCVTQQ2PSZ128rrkz, X86::VCVTQQ2PSZ128rmbkz, TB_BCAST_Q},
{X86::VCVTQQ2PSZ256rrkz, X86::VCVTQQ2PSZ256rmbkz, TB_BCAST_Q},
{X86::VCVTQQ2PSZrrkz, X86::VCVTQQ2PSZrmbkz, TB_BCAST_Q},
+ {X86::VCVTTNEBF162IBSZ128rrkz, X86::VCVTTNEBF162IBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IBSZ256rrkz, X86::VCVTTNEBF162IBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IBSZrrkz, X86::VCVTTNEBF162IBSZrmbkz, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IUBSZ128rrkz, X86::VCVTTNEBF162IUBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IUBSZ256rrkz, X86::VCVTTNEBF162IUBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IUBSZrrkz, X86::VCVTTNEBF162IUBSZrmbkz, TB_BCAST_SH},
{X86::VCVTTPD2DQZ128rrkz, X86::VCVTTPD2DQZ128rmbkz, TB_BCAST_SD},
{X86::VCVTTPD2DQZ256rrkz, X86::VCVTTPD2DQZ256rmbkz, TB_BCAST_SD},
{X86::VCVTTPD2DQZrrkz, X86::VCVTTPD2DQZrmbkz, TB_BCAST_SD},
@@ -7152,6 +7320,12 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCVTTPH2DQZ128rrkz, X86::VCVTTPH2DQZ128rmbkz, TB_BCAST_SH},
{X86::VCVTTPH2DQZ256rrkz, X86::VCVTTPH2DQZ256rmbkz, TB_BCAST_SH},
{X86::VCVTTPH2DQZrrkz, X86::VCVTTPH2DQZrmbkz, TB_BCAST_SH},
+ {X86::VCVTTPH2IBSZ128rrkz, X86::VCVTTPH2IBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTTPH2IBSZ256rrkz, X86::VCVTTPH2IBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTTPH2IBSZrrkz, X86::VCVTTPH2IBSZrmbkz, TB_BCAST_SH},
+ {X86::VCVTTPH2IUBSZ128rrkz, X86::VCVTTPH2IUBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTTPH2IUBSZ256rrkz, X86::VCVTTPH2IUBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTTPH2IUBSZrrkz, X86::VCVTTPH2IUBSZrmbkz, TB_BCAST_SH},
{X86::VCVTTPH2QQZ128rrkz, X86::VCVTTPH2QQZ128rmbkz, TB_BCAST_SH},
{X86::VCVTTPH2QQZ256rrkz, X86::VCVTTPH2QQZ256rmbkz, TB_BCAST_SH},
{X86::VCVTTPH2QQZrrkz, X86::VCVTTPH2QQZrmbkz, TB_BCAST_SH},
@@ -7170,6 +7344,12 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCVTTPS2DQZ128rrkz, X86::VCVTTPS2DQZ128rmbkz, TB_BCAST_SS},
{X86::VCVTTPS2DQZ256rrkz, X86::VCVTTPS2DQZ256rmbkz, TB_BCAST_SS},
{X86::VCVTTPS2DQZrrkz, X86::VCVTTPS2DQZrmbkz, TB_BCAST_SS},
+ {X86::VCVTTPS2IBSZ128rrkz, X86::VCVTTPS2IBSZ128rmbkz, TB_BCAST_SS},
+ {X86::VCVTTPS2IBSZ256rrkz, X86::VCVTTPS2IBSZ256rmbkz, TB_BCAST_SS},
+ {X86::VCVTTPS2IBSZrrkz, X86::VCVTTPS2IBSZrmbkz, TB_BCAST_SS},
+ {X86::VCVTTPS2IUBSZ128rrkz, X86::VCVTTPS2IUBSZ128rmbkz, TB_BCAST_SS},
+ {X86::VCVTTPS2IUBSZ256rrkz, X86::VCVTTPS2IUBSZ256rmbkz, TB_BCAST_SS},
+ {X86::VCVTTPS2IUBSZrrkz, X86::VCVTTPS2IUBSZrmbkz, TB_BCAST_SS},
{X86::VCVTTPS2QQZ128rrkz, X86::VCVTTPS2QQZ128rmbkz, TB_BCAST_SS},
{X86::VCVTTPS2QQZ256rrkz, X86::VCVTTPS2QQZ256rmbkz, TB_BCAST_SS},
{X86::VCVTTPS2QQZrrkz, X86::VCVTTPS2QQZrmbkz, TB_BCAST_SS},
@@ -7742,6 +7922,12 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCVTNE2PS2BF16Z128rrkz, X86::VCVTNE2PS2BF16Z128rmbkz, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Z256rrkz, X86::VCVTNE2PS2BF16Z256rmbkz, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Zrrkz, X86::VCVTNE2PS2BF16Zrmbkz, TB_BCAST_SS},
+ {X86::VCVTNEBF162IBSZ128rrk, X86::VCVTNEBF162IBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTNEBF162IBSZ256rrk, X86::VCVTNEBF162IBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTNEBF162IBSZrrk, X86::VCVTNEBF162IBSZrmbk, TB_BCAST_SH},
+ {X86::VCVTNEBF162IUBSZ128rrk, X86::VCVTNEBF162IUBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTNEBF162IUBSZ256rrk, X86::VCVTNEBF162IUBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTNEBF162IUBSZrrk, X86::VCVTNEBF162IUBSZrmbk, TB_BCAST_SH},
{X86::VCVTNEPS2BF16Z128rrk, X86::VCVTNEPS2BF16Z128rmbk, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Z256rrk, X86::VCVTNEPS2BF16Z256rmbk, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Zrrk, X86::VCVTNEPS2BF16Zrmbk, TB_BCAST_SS},
@@ -7766,6 +7952,12 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCVTPH2DQZ128rrk, X86::VCVTPH2DQZ128rmbk, TB_BCAST_SH},
{X86::VCVTPH2DQZ256rrk, X86::VCVTPH2DQZ256rmbk, TB_BCAST_SH},
{X86::VCVTPH2DQZrrk, X86::VCVTPH2DQZrmbk, TB_BCAST_SH},
+ {X86::VCVTPH2IBSZ128rrk, X86::VCVTPH2IBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTPH2IBSZ256rrk, X86::VCVTPH2IBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTPH2IBSZrrk, X86::VCVTPH2IBSZrmbk, TB_BCAST_SH},
+ {X86::VCVTPH2IUBSZ128rrk, X86::VCVTPH2IUBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTPH2IUBSZ256rrk, X86::VCVTPH2IUBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTPH2IUBSZrrk, X86::VCVTPH2IUBSZrmbk, TB_BCAST_SH},
{X86::VCVTPH2PDZ128rrk, X86::VCVTPH2PDZ128rmbk, TB_BCAST_SH},
{X86::VCVTPH2PDZ256rrk, X86::VCVTPH2PDZ256rmbk, TB_BCAST_SH},
{X86::VCVTPH2PDZrrk, X86::VCVTPH2PDZrmbk, TB_BCAST_SH},
@@ -7790,6 +7982,12 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCVTPS2DQZ128rrk, X86::VCVTPS2DQZ128rmbk, TB_BCAST_SS},
{X86::VCVTPS2DQZ256rrk, X86::VCVTPS2DQZ256rmbk, TB_BCAST_SS},
{X86::VCVTPS2DQZrrk, X86::VCVTPS2DQZrmbk, TB_BCAST_SS},
+ {X86::VCVTPS2IBSZ128rrk, X86::VCVTPS2IBSZ128rmbk, TB_BCAST_SS},
+ {X86::VCVTPS2IBSZ256rrk, X86::VCVTPS2IBSZ256rmbk, TB_BCAST_SS},
+ {X86::VCVTPS2IBSZrrk, X86::VCVTPS2IBSZrmbk, TB_BCAST_SS},
+ {X86::VCVTPS2IUBSZ128rrk, X86::VCVTPS2IUBSZ128rmbk, TB_BCAST_SS},
+ {X86::VCVTPS2IUBSZ256rrk, X86::VCVTPS2IUBSZ256rmbk, TB_BCAST_SS},
+ {X86::VCVTPS2IUBSZrrk, X86::VCVTPS2IUBSZrmbk, TB_BCAST_SS},
{X86::VCVTPS2PDZ128rrk, X86::VCVTPS2PDZ128rmbk, TB_BCAST_SS},
{X86::VCVTPS2PDZ256rrk, X86::VCVTPS2PDZ256rmbk, TB_BCAST_SS},
{X86::VCVTPS2PDZrrk, X86::VCVTPS2PDZrmbk, TB_BCAST_SS},
@@ -7814,6 +8012,12 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCVTQQ2PSZ128rrk, X86::VCVTQQ2PSZ128rmbk, TB_BCAST_Q},
{X86::VCVTQQ2PSZ256rrk, X86::VCVTQQ2PSZ256rmbk, TB_BCAST_Q},
{X86::VCVTQQ2PSZrrk, X86::VCVTQQ2PSZrmbk, TB_BCAST_Q},
+ {X86::VCVTTNEBF162IBSZ128rrk, X86::VCVTTNEBF162IBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IBSZ256rrk, X86::VCVTTNEBF162IBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IBSZrrk, X86::VCVTTNEBF162IBSZrmbk, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IUBSZ128rrk, X86::VCVTTNEBF162IUBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IUBSZ256rrk, X86::VCVTTNEBF162IUBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTTNEBF162IUBSZrrk, X86::VCVTTNEBF162IUBSZrmbk, TB_BCAST_SH},
{X86::VCVTTPD2DQZ128rrk, X86::VCVTTPD2DQZ128rmbk, TB_BCAST_SD},
{X86::VCVTTPD2DQZ256rrk, X86::VCVTTPD2DQZ256rmbk, TB_BCAST_SD},
{X86::VCVTTPD2DQZrrk, X86::VCVTTPD2DQZrmbk, TB_BCAST_SD},
@@ -7829,6 +8033,12 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCVTTPH2DQZ128rrk, X86::VCVTTPH2DQZ128rmbk, TB_BCAST_SH},
{X86::VCVTTPH2DQZ256rrk, X86::VCVTTPH2DQZ256rmbk, TB_BCAST_SH},
{X86::VCVTTPH2DQZrrk, X86::VCVTTPH2DQZrmbk, TB_BCAST_SH},
+ {X86::VCVTTPH2IBSZ128rrk, X86::VCVTTPH2IBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTTPH2IBSZ256rrk, X86::VCVTTPH2IBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTTPH2IBSZrrk, X86::VCVTTPH2IBSZrmbk, TB_BCAST_SH},
+ {X86::VCVTTPH2IUBSZ128rrk, X86::VCVTTPH2IUBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTTPH2IUBSZ256rrk, X86::VCVTTPH2IUBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTTPH2IUBSZrrk, X86::VCVTTPH2IUBSZrmbk, TB_BCAST_SH},
{X86::VCVTTPH2QQZ128rrk, X86::VCVTTPH2QQZ128rmbk, TB_BCAST_SH},
{X86::VCVTTPH2QQZ256rrk, X86::VCVTTPH2QQZ256rmbk, TB_BCAST_SH},
{X86::VCVTTPH2QQZrrk, X86::VCVTTPH2QQZrmbk, TB_BCAST_SH},
@@ -7847,6 +8057,12 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCVTTPS2DQZ128rrk, X86::VCVTTPS2DQZ128rmbk, TB_BCAST_SS},
{X86::VCVTTPS2DQZ256rrk, X86::VCVTTPS2DQZ256rmbk, TB_BCAST_SS},
{X86::VCVTTPS2DQZrrk, X86::VCVTTPS2DQZrmbk, TB_BCAST_SS},
+ {X86::VCVTTPS2IBSZ128rrk, X86::VCVTTPS2IBSZ128rmbk, TB_BCAST_SS},
+ {X86::VCVTTPS2IBSZ256rrk, X86::VCVTTPS2IBSZ256rmbk, TB_BCAST_SS},
+ {X86::VCVTTPS2IBSZrrk, X86::VCVTTPS2IBSZrmbk, TB_BCAST_SS},
+ {X86::VCVTTPS2IUBSZ128rrk, X86::VCVTTPS2IUBSZ128rmbk, TB_BCAST_SS},
+ {X86::VCVTTPS2IUBSZ256rrk, X86::VCVTTPS2IUBSZ256rmbk, TB_BCAST_SS},
+ {X86::VCVTTPS2IUBSZrrk, X86::VCVTTPS2IUBSZrmbk, TB_BCAST_SS},
{X86::VCVTTPS2QQZ128rrk, X86::VCVTTPS2QQZ128rmbk, TB_BCAST_SS},
{X86::VCVTTPS2QQZ256rrk, X86::VCVTTPS2QQZ256rmbk, TB_BCAST_SS},
{X86::VCVTTPS2QQZrrk, X86::VCVTTPS2QQZrmbk, TB_BCAST_SS},
>From aa5cc998047a086ed3b599a10d4bd624bf7a3f17 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Tue, 6 Aug 2024 08:23:14 +0800
Subject: [PATCH 2/2] address comments.
---
clang/lib/Headers/CMakeLists.txt | 2 +-
clang/lib/Headers/avx10_2_512satcvtintrin.h | 26 ---
.../CodeGen/X86/avx10_2_512minmax-error.c | 4 +-
llvm/include/llvm/IR/IntrinsicsX86.td | 118 +++++------
llvm/lib/Target/X86/X86ISelLowering.cpp | 28 +--
llvm/lib/Target/X86/X86ISelLowering.h | 28 +--
llvm/lib/Target/X86/X86InstrAVX10.td | 199 +++++++++---------
llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 88 +-------
llvm/lib/Target/X86/X86InstrUtils.td | 6 +-
llvm/lib/Target/X86/X86IntrinsicsInfo.h | 78 +++----
10 files changed, 227 insertions(+), 350 deletions(-)
diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt
index 91e106427ba1d..b61aeca6bbc91 100644
--- a/clang/lib/Headers/CMakeLists.txt
+++ b/clang/lib/Headers/CMakeLists.txt
@@ -151,8 +151,8 @@ set(x86_files
avx10_2_512niintrin.h
avx10_2_512satcvtintrin.h
avx10_2minmaxintrin.h
- avx10_2satcvtintrin.h
avx10_2niintrin.h
+ avx10_2satcvtintrin.h
avx2intrin.h
avx512bf16intrin.h
avx512bitalgintrin.h
diff --git a/clang/lib/Headers/avx10_2_512satcvtintrin.h b/clang/lib/Headers/avx10_2_512satcvtintrin.h
index 0ea645bee22f9..bb17257052aad 100644
--- a/clang/lib/Headers/avx10_2_512satcvtintrin.h
+++ b/clang/lib/Headers/avx10_2_512satcvtintrin.h
@@ -182,32 +182,6 @@
(__v16sf)(__m512)(A), (__v16su)_mm512_setzero_si512(), (__mmask16)(U), \
(const int)R))
-#define _mm512_ipcvttnebf16_epi8(A) \
- ((__m512i)__builtin_ia32_vcvttnebf162ibs512((__v32bf)(__m512bh)(A)))
-
-#define _mm512_mask_ipcvttnebf16_epi8(W, U, A) \
- ((__m512i)__builtin_ia32_selectw_512( \
- (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epi8(A), \
- (__v32hi)(__m512i)(W)))
-
-#define _mm512_maskz_ipcvttnebf16_epi8(U, A) \
- ((__m512i)__builtin_ia32_selectw_512( \
- (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epi8(A), \
- (__v32hi)_mm512_setzero_si512()))
-
-#define _mm512_ipcvttnebf16_epu8(A) \
- ((__m512i)__builtin_ia32_vcvttnebf162iubs512((__v32bf)(__m512bh)(A)))
-
-#define _mm512_mask_ipcvttnebf16_epu8(W, U, A) \
- ((__m512i)__builtin_ia32_selectw_512( \
- (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epu8(A), \
- (__v32hi)(__m512i)(W)))
-
-#define _mm512_maskz_ipcvttnebf16_epu8(U, A) \
- ((__m512i)__builtin_ia32_selectw_512( \
- (__mmask32)(U), (__v32hi)_mm512_ipcvttnebf16_epu8(A), \
- (__v32hi)_mm512_setzero_si512()))
-
#define _mm512_ipcvttph_epi8(A) \
((__m512i)__builtin_ia32_vcvttph2ibs512_mask( \
(__v32hf)(__m512h)(A), (__v32hu)_mm512_setzero_si512(), (__mmask32)-1, \
diff --git a/clang/test/CodeGen/X86/avx10_2_512minmax-error.c b/clang/test/CodeGen/X86/avx10_2_512minmax-error.c
index 15ed7a0b35d82..99fa53bd4e7a5 100644
--- a/clang/test/CodeGen/X86/avx10_2_512minmax-error.c
+++ b/clang/test/CodeGen/X86/avx10_2_512minmax-error.c
@@ -1,7 +1,7 @@
// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=x86_64 -target-feature +avx10.2-512 \
-// RUN: -Wno-invalid-feature-combination -emit-llvm -verify
+// RUN: -Wno-invalid-feature-combination -verify
// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=i386 -target-feature +avx10.2-512 \
-// RUN: -Wno-invalid-feature-combination -emit-llvm -verify
+// RUN: -Wno-invalid-feature-combination -verify
#include <immintrin.h>
diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td
index b9095df72c62b..9ad9ffe9bf9d5 100644
--- a/llvm/include/llvm/IR/IntrinsicsX86.td
+++ b/llvm/include/llvm/IR/IntrinsicsX86.td
@@ -6835,178 +6835,178 @@ let TargetPrefix = "x86" in {
let TargetPrefix = "x86" in {
def int_x86_avx10_vminmaxnepbf16128 : ClangBuiltin<"__builtin_ia32_vminmaxnepbf16128">,
- Intrinsic<[llvm_v8bf16_ty], [llvm_v8bf16_ty, llvm_v8bf16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v8bf16_ty], [llvm_v8bf16_ty, llvm_v8bf16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_vminmaxnepbf16256 : ClangBuiltin<"__builtin_ia32_vminmaxnepbf16256">,
- Intrinsic<[llvm_v16bf16_ty], [llvm_v16bf16_ty, llvm_v16bf16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16bf16_ty], [llvm_v16bf16_ty, llvm_v16bf16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_vminmaxnepbf16512 : ClangBuiltin<"__builtin_ia32_vminmaxnepbf16512">,
- Intrinsic<[llvm_v32bf16_ty], [llvm_v32bf16_ty, llvm_v32bf16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v32bf16_ty], [llvm_v32bf16_ty, llvm_v32bf16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_vminmaxpd128 : ClangBuiltin<"__builtin_ia32_vminmaxpd128">,
- Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_mask_vminmaxpd128 : ClangBuiltin<"__builtin_ia32_vminmaxpd128_mask">,
- Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty, llvm_v2f64_ty, llvm_i8_ty],
+ DefaultAttrsIntrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty, llvm_v2f64_ty, llvm_i8_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_vminmaxpd256 : ClangBuiltin<"__builtin_ia32_vminmaxpd256">,
- Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_v4f64_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_v4f64_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_mask_vminmaxpd256_round : ClangBuiltin<"__builtin_ia32_vminmaxpd256_round_mask">,
- Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_v4f64_ty, llvm_i32_ty, llvm_v4f64_ty, llvm_i8_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_v4f64_ty, llvm_i32_ty, llvm_v4f64_ty, llvm_i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>]>;
def int_x86_avx10_mask_vminmaxpd_round : ClangBuiltin<"__builtin_ia32_vminmaxpd512_round_mask">,
- Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_v8f64_ty, llvm_i32_ty, llvm_v8f64_ty, llvm_i8_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_v8f64_ty, llvm_i32_ty, llvm_v8f64_ty, llvm_i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>]>;
def int_x86_avx10_vminmaxph128 : ClangBuiltin<"__builtin_ia32_vminmaxph128">,
- Intrinsic<[llvm_v8f16_ty], [llvm_v8f16_ty, llvm_v8f16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v8f16_ty], [llvm_v8f16_ty, llvm_v8f16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_mask_vminmaxph128 : ClangBuiltin<"__builtin_ia32_vminmaxph128_mask">,
- Intrinsic<[llvm_v8f16_ty], [llvm_v8f16_ty, llvm_v8f16_ty, llvm_i32_ty, llvm_v8f16_ty, llvm_i8_ty],
+ DefaultAttrsIntrinsic<[llvm_v8f16_ty], [llvm_v8f16_ty, llvm_v8f16_ty, llvm_i32_ty, llvm_v8f16_ty, llvm_i8_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_vminmaxph256 : ClangBuiltin<"__builtin_ia32_vminmaxph256">,
- Intrinsic<[llvm_v16f16_ty], [llvm_v16f16_ty, llvm_v16f16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16f16_ty], [llvm_v16f16_ty, llvm_v16f16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_mask_vminmaxph256_round : ClangBuiltin<"__builtin_ia32_vminmaxph256_round_mask">,
- Intrinsic<[llvm_v16f16_ty], [llvm_v16f16_ty, llvm_v16f16_ty, llvm_i32_ty, llvm_v16f16_ty, llvm_i16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16f16_ty], [llvm_v16f16_ty, llvm_v16f16_ty, llvm_i32_ty, llvm_v16f16_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_mask_vminmaxph_round : ClangBuiltin<"__builtin_ia32_vminmaxph512_round_mask">,
- Intrinsic<[llvm_v32f16_ty], [llvm_v32f16_ty, llvm_v32f16_ty, llvm_i32_ty, llvm_v32f16_ty, llvm_i32_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v32f16_ty], [llvm_v32f16_ty, llvm_v32f16_ty, llvm_i32_ty, llvm_v32f16_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>]>;
def int_x86_avx10_vminmaxps128 : ClangBuiltin<"__builtin_ia32_vminmaxps128">,
- Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_mask_vminmaxps128 : ClangBuiltin<"__builtin_ia32_vminmaxps128_mask">,
- Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty, llvm_v4f32_ty, llvm_i8_ty],
+ DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty, llvm_v4f32_ty, llvm_i8_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_vminmaxps256 : ClangBuiltin<"__builtin_ia32_vminmaxps256">,
- Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_v8f32_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_v8f32_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>]>;
def int_x86_avx10_mask_vminmaxps256_round : ClangBuiltin<"__builtin_ia32_vminmaxps256_round_mask">,
- Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_v8f32_ty, llvm_i32_ty, llvm_v8f32_ty, llvm_i8_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_v8f32_ty, llvm_i32_ty, llvm_v8f32_ty, llvm_i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>]>;
def int_x86_avx10_mask_vminmaxps_round : ClangBuiltin<"__builtin_ia32_vminmaxps512_round_mask">,
- Intrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_v16f32_ty, llvm_i32_ty, llvm_v16f32_ty, llvm_i16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_v16f32_ty, llvm_i32_ty, llvm_v16f32_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>]>;
def int_x86_avx10_mask_vminmaxsd_round : ClangBuiltin<"__builtin_ia32_vminmaxsd_round_mask">,
- Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty, llvm_v2f64_ty, llvm_i8_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty, llvm_v2f64_ty, llvm_i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>]>;
def int_x86_avx10_mask_vminmaxsh_round : ClangBuiltin<"__builtin_ia32_vminmaxsh_round_mask">,
- Intrinsic<[llvm_v8f16_ty], [llvm_v8f16_ty, llvm_v8f16_ty, llvm_i32_ty, llvm_v8f16_ty, llvm_i8_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v8f16_ty], [llvm_v8f16_ty, llvm_v8f16_ty, llvm_i32_ty, llvm_v8f16_ty, llvm_i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>]>;
def int_x86_avx10_mask_vminmaxss_round : ClangBuiltin<"__builtin_ia32_vminmaxss_round_mask">,
- Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty, llvm_v4f32_ty, llvm_i8_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty, llvm_v4f32_ty, llvm_i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>]>;
}
//===----------------------------------------------------------------------===//
let TargetPrefix = "x86" in {
def int_x86_avx10_vcvtnebf162ibs128 : ClangBuiltin<"__builtin_ia32_vcvtnebf162ibs128">,
- Intrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_vcvtnebf162ibs256 : ClangBuiltin<"__builtin_ia32_vcvtnebf162ibs256">,
- Intrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_vcvtnebf162ibs512 : ClangBuiltin<"__builtin_ia32_vcvtnebf162ibs512">,
- Intrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_vcvtnebf162iubs128 : ClangBuiltin<"__builtin_ia32_vcvtnebf162iubs128">,
- Intrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_vcvtnebf162iubs256 : ClangBuiltin<"__builtin_ia32_vcvtnebf162iubs256">,
- Intrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_vcvtnebf162iubs512 : ClangBuiltin<"__builtin_ia32_vcvtnebf162iubs512">,
- Intrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_mask_vcvtph2ibs128 : ClangBuiltin<"__builtin_ia32_vcvtph2ibs128_mask">,
- Intrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
[IntrNoMem]>;
def int_x86_avx10_mask_vcvtph2ibs256 : ClangBuiltin<"__builtin_ia32_vcvtph2ibs256_mask">,
- Intrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvtph2ibs512 : ClangBuiltin<"__builtin_ia32_vcvtph2ibs512_mask">,
- Intrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvtph2iubs128 : ClangBuiltin<"__builtin_ia32_vcvtph2iubs128_mask">,
- Intrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
[IntrNoMem]>;
def int_x86_avx10_mask_vcvtph2iubs256 : ClangBuiltin<"__builtin_ia32_vcvtph2iubs256_mask">,
- Intrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvtph2iubs512 : ClangBuiltin<"__builtin_ia32_vcvtph2iubs512_mask">,
- Intrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvtps2ibs128 : ClangBuiltin<"__builtin_ia32_vcvtps2ibs128_mask">,
- Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtps2ibs256 : ClangBuiltin<"__builtin_ia32_vcvtps2ibs256_mask">,
- Intrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvtps2ibs512 : ClangBuiltin<"__builtin_ia32_vcvtps2ibs512_mask">,
- Intrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvtps2iubs128 : ClangBuiltin<"__builtin_ia32_vcvtps2iubs128_mask">,
- Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtps2iubs256 : ClangBuiltin<"__builtin_ia32_vcvtps2iubs256_mask">,
- Intrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvtps2iubs512 : ClangBuiltin<"__builtin_ia32_vcvtps2iubs512_mask">,
- Intrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_vcvttnebf162ibs128 : ClangBuiltin<"__builtin_ia32_vcvttnebf162ibs128">,
- Intrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_vcvttnebf162ibs256 : ClangBuiltin<"__builtin_ia32_vcvttnebf162ibs256">,
- Intrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_vcvttnebf162ibs512 : ClangBuiltin<"__builtin_ia32_vcvttnebf162ibs512">,
- Intrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_vcvttnebf162iubs128 : ClangBuiltin<"__builtin_ia32_vcvttnebf162iubs128">,
- Intrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_vcvttnebf162iubs256 : ClangBuiltin<"__builtin_ia32_vcvttnebf162iubs256">,
- Intrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_vcvttnebf162iubs512 : ClangBuiltin<"__builtin_ia32_vcvttnebf162iubs512">,
- Intrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
+ DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_mask_vcvttph2ibs128 : ClangBuiltin<"__builtin_ia32_vcvttph2ibs128_mask">,
- Intrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
[IntrNoMem]>;
def int_x86_avx10_mask_vcvttph2ibs256 : ClangBuiltin<"__builtin_ia32_vcvttph2ibs256_mask">,
- Intrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvttph2ibs512 : ClangBuiltin<"__builtin_ia32_vcvttph2ibs512_mask">,
- Intrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvttph2iubs128 : ClangBuiltin<"__builtin_ia32_vcvttph2iubs128_mask">,
- Intrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8f16_ty, llvm_v8i16_ty, llvm_i8_ty],
[IntrNoMem]>;
def int_x86_avx10_mask_vcvttph2iubs256 : ClangBuiltin<"__builtin_ia32_vcvttph2iubs256_mask">,
- Intrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16f16_ty, llvm_v16i16_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvttph2iubs512 : ClangBuiltin<"__builtin_ia32_vcvttph2iubs512_mask">,
- Intrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32f16_ty, llvm_v32i16_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvttps2ibs128 : ClangBuiltin<"__builtin_ia32_vcvttps2ibs128_mask">,
- Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
+ DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
[IntrNoMem]>;
def int_x86_avx10_mask_vcvttps2ibs256 : ClangBuiltin<"__builtin_ia32_vcvttps2ibs256_mask">,
- Intrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvttps2ibs512 : ClangBuiltin<"__builtin_ia32_vcvttps2ibs512_mask">,
- Intrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvttps2iubs128 : ClangBuiltin<"__builtin_ia32_vcvttps2iubs128_mask">,
- Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
+ DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4i32_ty, llvm_i8_ty],
[IntrNoMem]>;
def int_x86_avx10_mask_vcvttps2iubs256 : ClangBuiltin<"__builtin_ia32_vcvttps2iubs256_mask">,
- Intrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i32_ty], [llvm_v8f32_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
def int_x86_avx10_mask_vcvttps2iubs512 : ClangBuiltin<"__builtin_ia32_vcvttps2iubs512_mask">,
- Intrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c59f838905894..aa9614e7d2261 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -34062,26 +34062,14 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
NODE_NAME_CASE(VMINMAX_SAE)
NODE_NAME_CASE(VMINMAXS)
NODE_NAME_CASE(VMINMAXS_SAE)
- NODE_NAME_CASE(VCVTNEBF162IBS)
- NODE_NAME_CASE(VCVTNEBF162IUBS)
- NODE_NAME_CASE(VCVTPH2IBS)
- NODE_NAME_CASE(VCVTPH2IBS_RND)
- NODE_NAME_CASE(VCVTPH2IUBS)
- NODE_NAME_CASE(VCVTPH2IUBS_RND)
- NODE_NAME_CASE(VCVTPS2IBS)
- NODE_NAME_CASE(VCVTPS2IBS_RND)
- NODE_NAME_CASE(VCVTTNEBF162IBS)
- NODE_NAME_CASE(VCVTTNEBF162IUBS)
- NODE_NAME_CASE(VCVTPS2IUBS)
- NODE_NAME_CASE(VCVTPS2IUBS_RND)
- NODE_NAME_CASE(VCVTTPH2IBS)
- NODE_NAME_CASE(VCVTTPH2IBS_SAE)
- NODE_NAME_CASE(VCVTTPH2IUBS)
- NODE_NAME_CASE(VCVTTPH2IUBS_SAE)
- NODE_NAME_CASE(VCVTTPS2IBS)
- NODE_NAME_CASE(VCVTTPS2IBS_SAE)
- NODE_NAME_CASE(VCVTTPS2IUBS)
- NODE_NAME_CASE(VCVTTPS2IUBS_SAE)
+ NODE_NAME_CASE(CVTP2IBS)
+ NODE_NAME_CASE(CVTP2IUBS)
+ NODE_NAME_CASE(CVTP2IBS_RND)
+ NODE_NAME_CASE(CVTP2IUBS_RND)
+ NODE_NAME_CASE(CVTTP2IBS)
+ NODE_NAME_CASE(CVTTP2IUBS)
+ NODE_NAME_CASE(CVTTP2IBS_SAE)
+ NODE_NAME_CASE(CVTTP2IUBS_SAE)
NODE_NAME_CASE(AESENC128KL)
NODE_NAME_CASE(AESDEC128KL)
NODE_NAME_CASE(AESENC256KL)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index fd16747f90fb4..60058f7ea77f0 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -600,26 +600,14 @@ namespace llvm {
VMINMAXS,
VMINMAXS_SAE,
- VCVTNEBF162IBS,
- VCVTNEBF162IUBS,
- VCVTPH2IBS,
- VCVTPH2IBS_RND,
- VCVTPH2IUBS,
- VCVTPH2IUBS_RND,
- VCVTPS2IBS,
- VCVTPS2IBS_RND,
- VCVTTNEBF162IBS,
- VCVTTNEBF162IUBS,
- VCVTPS2IUBS,
- VCVTPS2IUBS_RND,
- VCVTTPH2IBS,
- VCVTTPH2IBS_SAE,
- VCVTTPH2IUBS,
- VCVTTPH2IUBS_SAE,
- VCVTTPS2IBS,
- VCVTTPS2IBS_SAE,
- VCVTTPS2IUBS,
- VCVTTPS2IUBS_SAE,
+ CVTP2IBS,
+ CVTP2IUBS,
+ CVTP2IBS_RND,
+ CVTP2IUBS_RND,
+ CVTTP2IBS,
+ CVTTP2IUBS,
+ CVTTP2IBS_SAE,
+ CVTTP2IUBS_SAE,
MPSADBW,
diff --git a/llvm/lib/Target/X86/X86InstrAVX10.td b/llvm/lib/Target/X86/X86InstrAVX10.td
index dab97577bb2c4..1b183d8b2813c 100644
--- a/llvm/lib/Target/X86/X86InstrAVX10.td
+++ b/llvm/lib/Target/X86/X86InstrAVX10.td
@@ -423,68 +423,72 @@ defm VMINMAXSS : avx10_minmax_scalar<"vminmaxss", v4f32x_info, X86vminmaxs, X86v
//-------------------------------------------------
multiclass avx10_sat_cvt_rmb<bits<8> Opc, string OpStr, X86FoldableSchedWrite sched,
- X86VectorVTInfo DestInfo,
- X86VectorVTInfo SrcInfo,
- SDNode MaskNode> {
+ X86VectorVTInfo DestInfo,
+ X86VectorVTInfo SrcInfo,
+ SDNode MaskNode> {
defm rr: AVX512_maskable<Opc, MRMSrcReg, DestInfo, (outs DestInfo.RC:$dst),
- (ins SrcInfo.RC:$src), OpStr, "$src", "$src",
- (DestInfo.VT (MaskNode SrcInfo.RC:$src))>, Sched<[sched]>;
+ (ins SrcInfo.RC:$src), OpStr, "$src", "$src",
+ (DestInfo.VT (MaskNode (SrcInfo.VT SrcInfo.RC:$src)))>,
+ Sched<[sched]>;
defm rm: AVX512_maskable<Opc, MRMSrcMem, DestInfo, (outs DestInfo.RC:$dst),
- (ins SrcInfo.MemOp:$src), OpStr, "$src", "$src",
- (DestInfo.VT (MaskNode (SrcInfo.VT
- (SrcInfo.LdFrag addr:$src))))>,
- Sched<[sched.Folded, sched.ReadAfterFold]>;
+ (ins SrcInfo.MemOp:$src), OpStr, "$src", "$src",
+ (DestInfo.VT (MaskNode (SrcInfo.VT
+ (SrcInfo.LdFrag addr:$src))))>,
+ Sched<[sched.Folded, sched.ReadAfterFold]>;
defm rmb: AVX512_maskable<Opc, MRMSrcMem, DestInfo, (outs DestInfo.RC:$dst),
- (ins SrcInfo.ScalarMemOp:$src), OpStr,
- "${src}"#SrcInfo.BroadcastStr, "${src}"#SrcInfo.BroadcastStr,
- (DestInfo.VT (MaskNode (SrcInfo.VT
- (SrcInfo.BroadcastLdFrag addr:$src))))>, EVEX_B,
- Sched<[sched.Folded, sched.ReadAfterFold]>;
+ (ins SrcInfo.ScalarMemOp:$src), OpStr,
+ "${src}"#SrcInfo.BroadcastStr, "${src}"#SrcInfo.BroadcastStr,
+ (DestInfo.VT (MaskNode (SrcInfo.VT
+ (SrcInfo.BroadcastLdFrag addr:$src))))>, EVEX_B,
+ Sched<[sched.Folded, sched.ReadAfterFold]>;
}
// Conversion with rounding control (RC)
multiclass avx10_sat_cvt_rc<bits<8> Opc, string OpStr, X86SchedWriteWidths sched,
- AVX512VLVectorVTInfo DestInfo, AVX512VLVectorVTInfo SrcInfo,
- SDNode MaskNode> {
- let Uses = [MXCSR] in
- defm Zrrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info512,
+ AVX512VLVectorVTInfo DestInfo, AVX512VLVectorVTInfo SrcInfo,
+ SDNode MaskNode> {
+ let Predicates = [HasAVX10_2_512], Uses = [MXCSR] in
+ defm Zrrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info512,
(outs DestInfo.info512.RC:$dst),
(ins SrcInfo.info512.RC:$src, AVX512RC:$rc),
OpStr, "$rc, $src", "$src, $rc",
- (DestInfo.info512.VT (MaskNode
- SrcInfo.info512.RC:$src, (i32 timm:$rc)))>,
- Sched<[sched.ZMM]>, EVEX, EVEX_RC, EVEX_B;
- let Predicates = [HasAVX10_2], hasEVEX_U = 1 in {
- defm Z256rrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info256,
- (outs DestInfo.info256.RC:$dst),
- (ins SrcInfo.info256.RC:$src, AVX512RC:$rc),
- OpStr, "$rc, $src", "$src, $rc",
- (DestInfo.info256.VT (MaskNode
- SrcInfo.info256.RC:$src, (i32 timm:$rc)))>,
- Sched<[sched.YMM]>, EVEX, EVEX_RC, EVEX_B;
- }
+ (DestInfo.info512.VT
+ (MaskNode (SrcInfo.info512.VT SrcInfo.info512.RC:$src),
+ (i32 timm:$rc)))>,
+ Sched<[sched.ZMM]>, EVEX, EVEX_RC, EVEX_B;
+ let Predicates = [HasAVX10_2], hasEVEX_U = 1 in {
+ defm Z256rrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info256,
+ (outs DestInfo.info256.RC:$dst),
+ (ins SrcInfo.info256.RC:$src, AVX512RC:$rc),
+ OpStr, "$rc, $src", "$src, $rc",
+ (DestInfo.info256.VT
+ (MaskNode (SrcInfo.info256.VT SrcInfo.info256.RC:$src),
+ (i32 timm:$rc)))>,
+ Sched<[sched.YMM]>, EVEX, EVEX_RC, EVEX_B;
+ }
}
// Conversion with SAE
-multiclass
- avx10_sat_cvt_sae<bits<8> Opc, string OpStr, X86SchedWriteWidths sched,
- AVX512VLVectorVTInfo DestInfo, AVX512VLVectorVTInfo SrcInfo,
- SDNode Node> {
- let Uses = [MXCSR] in
- defm Zrrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info512,
- (outs DestInfo.info512.RC:$dst),
- (ins SrcInfo.info512.RC:$src),
- OpStr, "{sae}, $src", "$src, {sae}",
- (DestInfo.info512.VT (Node SrcInfo.info512.RC:$src))>,
- Sched<[sched.ZMM]>, EVEX, EVEX_B;
- let Predicates = [HasAVX10_2], hasEVEX_U = 1 in {
- defm Z256rrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info256,
- (outs DestInfo.info256.RC:$dst),
- (ins SrcInfo.info256.RC:$src),
- OpStr, "{sae}, $src", "$src, {sae}",
- (DestInfo.info256.VT (Node SrcInfo.info256.RC:$src))>,
- Sched<[sched.YMM]>, EVEX, EVEX_B;
- }
+multiclass avx10_sat_cvt_sae<bits<8> Opc, string OpStr, X86SchedWriteWidths sched,
+ AVX512VLVectorVTInfo DestInfo, AVX512VLVectorVTInfo SrcInfo,
+ SDNode Node> {
+ let Predicates = [HasAVX10_2_512], Uses = [MXCSR] in
+ defm Zrrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info512,
+ (outs DestInfo.info512.RC:$dst),
+ (ins SrcInfo.info512.RC:$src),
+ OpStr, "{sae}, $src", "$src, {sae}",
+ (DestInfo.info512.VT
+ (Node (SrcInfo.info512.VT SrcInfo.info512.RC:$src)))>,
+ Sched<[sched.ZMM]>, EVEX, EVEX_B;
+ let Predicates = [HasAVX10_2], hasEVEX_U = 1 in {
+ defm Z256rrb : AVX512_maskable<Opc, MRMSrcReg, DestInfo.info256,
+ (outs DestInfo.info256.RC:$dst),
+ (ins SrcInfo.info256.RC:$src),
+ OpStr, "{sae}, $src", "$src, {sae}",
+ (DestInfo.info256.VT
+ (Node (SrcInfo.info256.VT SrcInfo.info256.RC:$src)))>,
+ Sched<[sched.YMM]>, EVEX, EVEX_B;
+ }
}
multiclass avx10_sat_cvt_base<bits<8> Opc, string OpStr, X86SchedWriteWidths sched,
@@ -510,80 +514,71 @@ multiclass avx10_sat_cvt_base<bits<8> Opc, string OpStr, X86SchedWriteWidths sch
}
defm VCVTNEBF162IBS : avx10_sat_cvt_base<0x69, "vcvtnebf162ibs",
- SchedWriteVecIMul, X86vcvtnebf162ibs,
+ SchedWriteVecIMul, X86vcvtp2ibs,
avx512vl_i16_info, avx512vl_bf16_info>,
AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
defm VCVTNEBF162IUBS : avx10_sat_cvt_base<0x6b, "vcvtnebf162iubs",
- SchedWriteVecIMul, X86vcvtnebf162iubs,
- avx512vl_i16_info, avx512vl_bf16_info>,
- AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+ SchedWriteVecIMul, X86vcvtp2iubs,
+ avx512vl_i16_info, avx512vl_bf16_info>,
+ AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
defm VCVTPH2IBS : avx10_sat_cvt_base<0x69, "vcvtph2ibs", SchedWriteVecIMul,
- X86vcvtph2ibs, avx512vl_i16_info,
- avx512vl_f16_info>, AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
-defm VCVTPH2IBS : avx10_sat_cvt_rc<0x69, "vcvtph2ibs", SchedWriteVecIMul,
- avx512vl_i16_info, avx512vl_f16_info,
- X86vcvtph2ibsRnd>,
- AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
-
+ X86vcvtp2ibs, avx512vl_i16_info,
+ avx512vl_f16_info>,
+ avx10_sat_cvt_rc<0x69, "vcvtph2ibs", SchedWriteVecIMul,
+ avx512vl_i16_info, avx512vl_f16_info,
+ X86vcvtp2ibsRnd>,
+ AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
defm VCVTPH2IUBS : avx10_sat_cvt_base<0x6b, "vcvtph2iubs", SchedWriteVecIMul,
- X86vcvtph2iubs, avx512vl_i16_info,
- avx512vl_f16_info>, AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
-defm VCVTPH2IUBS : avx10_sat_cvt_rc<0x6b, "vcvtph2iubs", SchedWriteVecIMul,
+ X86vcvtp2iubs, avx512vl_i16_info,
+ avx512vl_f16_info>,
+ avx10_sat_cvt_rc<0x6b, "vcvtph2iubs", SchedWriteVecIMul,
avx512vl_i16_info, avx512vl_f16_info,
- X86vcvtph2iubsRnd>,
+ X86vcvtp2iubsRnd>,
AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
defm VCVTPS2IBS : avx10_sat_cvt_base<0x69, "vcvtps2ibs", SchedWriteVecIMul,
- X86vcvtps2ibs, avx512vl_i32_info,
- avx512vl_f32_info>, AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
-defm VCVTPS2IBS : avx10_sat_cvt_rc<0x69, "vcvtps2ibs", SchedWriteVecIMul,
- avx512vl_i32_info, avx512vl_f32_info,
- X86vcvtps2ibsRnd>,
- AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
-
+ X86vcvtp2ibs, avx512vl_i32_info,
+ avx512vl_f32_info>,
+ avx10_sat_cvt_rc<0x69, "vcvtps2ibs", SchedWriteVecIMul,
+ avx512vl_i32_info, avx512vl_f32_info,
+ X86vcvtp2ibsRnd>,
+ AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
defm VCVTPS2IUBS : avx10_sat_cvt_base<0x6b, "vcvtps2iubs", SchedWriteVecIMul,
- X86vcvtps2iubs, avx512vl_i32_info,
- avx512vl_f32_info>, AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
-defm VCVTPS2IUBS : avx10_sat_cvt_rc<0x6b, "vcvtps2iubs", SchedWriteVecIMul,
+ X86vcvtp2iubs, avx512vl_i32_info,
+ avx512vl_f32_info>,
+ avx10_sat_cvt_rc<0x6b, "vcvtps2iubs", SchedWriteVecIMul,
avx512vl_i32_info, avx512vl_f32_info,
- X86vcvtps2iubsRnd>,
+ X86vcvtp2iubsRnd>,
AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
-
defm VCVTTNEBF162IBS : avx10_sat_cvt_base<0x68, "vcvttnebf162ibs",
- SchedWriteVecIMul, X86vcvttnebf162ibs,
- avx512vl_i16_info, avx512vl_bf16_info>,
- AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+ SchedWriteVecIMul, X86vcvttp2ibs,
+ avx512vl_i16_info, avx512vl_bf16_info>,
+ AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
defm VCVTTNEBF162IUBS : avx10_sat_cvt_base<0x6a, "vcvttnebf162iubs",
- SchedWriteVecIMul, X86vcvttnebf162iubs,
- avx512vl_i16_info, avx512vl_bf16_info>,
- AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
+ SchedWriteVecIMul, X86vcvttp2iubs,
+ avx512vl_i16_info, avx512vl_bf16_info>,
+ AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
defm VCVTTPH2IBS : avx10_sat_cvt_base<0x68, "vcvttph2ibs", SchedWriteVecIMul,
- X86vcvttph2ibs, avx512vl_i16_info,
- avx512vl_f16_info>, AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
-defm VCVTTPH2IBS : avx10_sat_cvt_sae<0x68, "vcvttph2ibs", SchedWriteVecIMul,
- avx512vl_i16_info, avx512vl_f16_info, X86vcvttph2ibsSAE>,
+ X86vcvttp2ibs, avx512vl_i16_info, avx512vl_f16_info>,
+ avx10_sat_cvt_sae<0x68, "vcvttph2ibs", SchedWriteVecIMul,
+ avx512vl_i16_info, avx512vl_f16_info, X86vcvttp2ibsSAE>,
AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
defm VCVTTPH2IUBS : avx10_sat_cvt_base<0x6a, "vcvttph2iubs", SchedWriteVecIMul,
- X86vcvttph2iubs, avx512vl_i16_info, avx512vl_f16_info>,
- AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
-defm VCVTTPH2IUBS : avx10_sat_cvt_sae<0x6a, "vcvttph2iubs", SchedWriteVecIMul,
- avx512vl_i16_info, avx512vl_f16_info, X86vcvttph2iubsSAE>,
- AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
-
+ X86vcvttp2iubs, avx512vl_i16_info, avx512vl_f16_info>,
+ avx10_sat_cvt_sae<0x6a, "vcvttph2iubs", SchedWriteVecIMul,
+ avx512vl_i16_info, avx512vl_f16_info, X86vcvttp2iubsSAE>,
+ AVX512PSIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
defm VCVTTPS2IBS : avx10_sat_cvt_base<0x68, "vcvttps2ibs", SchedWriteVecIMul,
- X86vcvttps2ibs, avx512vl_i32_info, avx512vl_f32_info>,
- AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
-defm VCVTTPS2IBS : avx10_sat_cvt_sae<0x68, "vcvttps2ibs", SchedWriteVecIMul,
- avx512vl_i32_info, avx512vl_f32_info, X86vcvttps2ibsSAE>,
+ X86vcvttp2ibs, avx512vl_i32_info, avx512vl_f32_info>,
+ avx10_sat_cvt_sae<0x68, "vcvttps2ibs", SchedWriteVecIMul,
+ avx512vl_i32_info, avx512vl_f32_info, X86vcvttp2ibsSAE>,
AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
-
defm VCVTTPS2IUBS : avx10_sat_cvt_base<0x6a, "vcvttps2iubs", SchedWriteVecIMul,
- X86vcvttps2iubs, avx512vl_i32_info, avx512vl_f32_info>,
- AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
-defm VCVTTPS2IUBS : avx10_sat_cvt_sae<0x6a, "vcvttps2iubs", SchedWriteVecIMul,
- avx512vl_i32_info, avx512vl_f32_info, X86vcvttps2iubsSAE>,
- AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
+ X86vcvttp2iubs, avx512vl_i32_info, avx512vl_f32_info>,
+ avx10_sat_cvt_sae<0x6a, "vcvttps2iubs", SchedWriteVecIMul,
+ avx512vl_i32_info, avx512vl_f32_info, X86vcvttp2iubsSAE>,
+ AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
index f94ef51ca2076..1f38e9ed3d8ce 100644
--- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
+++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
@@ -821,87 +821,19 @@ def X86vpdpbuuds : SDNode<"X86ISD::VPDPBUUDS", SDTVnni>;
def X86Vmpsadbw : SDNode<"X86ISD::MPSADBW", SDTX86PSADBW>;
-def SDTAVX10SATCVT_BF162I : SDTypeProfile<1, 1, [
- SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, bf16>
-]>;
-
-def SDTAVX10SATCVT_PH2I : SDTypeProfile<1, 1, [
- SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, f16>
-]>;
-
-def SDTAVX10SATCVT_PS2I : SDTypeProfile<1, 1, [
- SDTCVecEltisVT<0, i32>, SDTCVecEltisVT<1, f32>
-]>;
-
-def SDTAVX10SATCVT_PH2I_ROUND : SDTypeProfile<1, 2, [
- SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, f16>, SDTCisInt<2>
-]>;
-
-def SDTAVX10SATCVT_PS2I_RND : SDTypeProfile<1, 2, [
- SDTCVecEltisVT<0, i32>, SDTCVecEltisVT<1, f32>, SDTCisInt<2>
-]>;
-
-def SDTAVX10SATCVT_PH2I_SAE : SDTypeProfile<1, 1, [
- SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, f16>,
- SDTCisSameNumEltsAs<0, 1>
-]>;
-
-def SDTAVX10SATCVT_PS2I_SAE : SDTypeProfile<1, 1, [
- SDTCVecEltisVT<0, i32>, SDTCVecEltisVT<1, f32>,
- SDTCisSameNumEltsAs<0, 1>
-]>;
-
-def X86vcvtnebf162ibs
- : SDNode<"X86ISD::VCVTNEBF162IBS", SDTAVX10SATCVT_BF162I>;
-
-def X86vcvtnebf162iubs
- : SDNode<"X86ISD::VCVTNEBF162IUBS", SDTAVX10SATCVT_BF162I>;
-
-def X86vcvtph2ibs : SDNode<"X86ISD::VCVTPH2IBS", SDTAVX10SATCVT_PH2I>;
-
-def X86vcvtph2ibsRnd
- : SDNode<"X86ISD::VCVTPH2IBS_RND", SDTAVX10SATCVT_PH2I_ROUND>;
-
-def X86vcvtph2iubs : SDNode<"X86ISD::VCVTPH2IUBS", SDTAVX10SATCVT_PH2I>;
-
-def X86vcvtph2iubsRnd
- : SDNode<"X86ISD::VCVTPH2IUBS_RND", SDTAVX10SATCVT_PH2I_ROUND>;
-
-def X86vcvtps2ibs : SDNode<"X86ISD::VCVTPS2IBS", SDTAVX10SATCVT_PS2I>;
-
-def X86vcvtps2ibsRnd
- : SDNode<"X86ISD::VCVTPS2IBS_RND", SDTAVX10SATCVT_PS2I_RND>;
-
-def X86vcvtps2iubs : SDNode<"X86ISD::VCVTPS2IUBS", SDTAVX10SATCVT_PS2I>;
-
-def X86vcvtps2iubsRnd
- : SDNode<"X86ISD::VCVTPS2IUBS_RND", SDTAVX10SATCVT_PS2I_RND>;
-
-def X86vcvttnebf162ibs
- : SDNode<"X86ISD::VCVTTNEBF162IBS", SDTAVX10SATCVT_BF162I>;
-
-def X86vcvttnebf162iubs
- : SDNode<"X86ISD::VCVTTNEBF162IUBS", SDTAVX10SATCVT_BF162I>;
-
-def X86vcvttph2ibs : SDNode<"X86ISD::VCVTTPH2IBS", SDTAVX10SATCVT_PH2I>;
-
-def X86vcvttph2ibsSAE
- : SDNode<"X86ISD::VCVTTPH2IBS_SAE", SDTAVX10SATCVT_PH2I_SAE>;
-
-def X86vcvttph2iubs : SDNode<"X86ISD::VCVTTPH2IUBS", SDTAVX10SATCVT_PH2I>;
-
-def X86vcvttph2iubsSAE
- : SDNode<"X86ISD::VCVTTPH2IUBS_SAE", SDTAVX10SATCVT_PH2I_SAE>;
-
-def X86vcvttps2ibs : SDNode<"X86ISD::VCVTTPS2IBS", SDTAVX10SATCVT_PS2I>;
+// in place saturated cvt fp-to-int
+def X86vcvtp2ibs : SDNode<"X86ISD::CVTP2IBS", SDTFloatToInt>;
+def X86vcvtp2iubs : SDNode<"X86ISD::CVTP2IUBS", SDTFloatToInt>;
-def X86vcvttps2ibsSAE
- : SDNode<"X86ISD::VCVTTPS2IBS_SAE", SDTAVX10SATCVT_PS2I_SAE>;
+def X86vcvtp2ibsRnd : SDNode<"X86ISD::CVTP2IBS_RND", SDTFloatToIntRnd>;
+def X86vcvtp2iubsRnd : SDNode<"X86ISD::CVTP2IUBS_RND", SDTFloatToIntRnd>;
-def X86vcvttps2iubs : SDNode<"X86ISD::VCVTTPS2IUBS", SDTAVX10SATCVT_PS2I>;
+// in place saturated cvtt fp-to-int staff
+def X86vcvttp2ibs : SDNode<"X86ISD::CVTTP2IBS", SDTFloatToInt>;
+def X86vcvttp2iubs : SDNode<"X86ISD::CVTTP2IUBS", SDTFloatToInt>;
-def X86vcvttps2iubsSAE
- : SDNode<"X86ISD::VCVTTPS2IUBS_SAE", SDTAVX10SATCVT_PS2I_SAE>;
+def X86vcvttp2ibsSAE : SDNode<"X86ISD::CVTTP2IBS_SAE", SDTFloatToInt>;
+def X86vcvttp2iubsSAE : SDNode<"X86ISD::CVTTP2IUBS_SAE", SDTFloatToInt>;
//===----------------------------------------------------------------------===//
// SSE pattern fragments
diff --git a/llvm/lib/Target/X86/X86InstrUtils.td b/llvm/lib/Target/X86/X86InstrUtils.td
index 531268b41da96..208af630a352d 100644
--- a/llvm/lib/Target/X86/X86InstrUtils.td
+++ b/llvm/lib/Target/X86/X86InstrUtils.td
@@ -313,7 +313,7 @@ def v32i16_info : X86VectorVTInfo<32, i16, VR512, "w">;
def v16i32_info : X86VectorVTInfo<16, i32, VR512, "d">;
def v8i64_info : X86VectorVTInfo<8, i64, VR512, "q">;
def v32f16_info : X86VectorVTInfo<32, f16, VR512, "ph">;
-def v32bf16_info: X86VectorVTInfo<32, bf16, VR512, "pbf16">;
+def v32bf16_info: X86VectorVTInfo<32, bf16, VR512, "pbh">;
def v16f32_info : X86VectorVTInfo<16, f32, VR512, "ps">;
def v8f64_info : X86VectorVTInfo<8, f64, VR512, "pd">;
@@ -323,7 +323,7 @@ def v16i16x_info : X86VectorVTInfo<16, i16, VR256X, "w">;
def v8i32x_info : X86VectorVTInfo<8, i32, VR256X, "d">;
def v4i64x_info : X86VectorVTInfo<4, i64, VR256X, "q">;
def v16f16x_info : X86VectorVTInfo<16, f16, VR256X, "ph">;
-def v16bf16x_info: X86VectorVTInfo<16, bf16, VR256X, "pbf16">;
+def v16bf16x_info: X86VectorVTInfo<16, bf16, VR256X, "pbh">;
def v8f32x_info : X86VectorVTInfo<8, f32, VR256X, "ps">;
def v4f64x_info : X86VectorVTInfo<4, f64, VR256X, "pd">;
@@ -332,7 +332,7 @@ def v8i16x_info : X86VectorVTInfo<8, i16, VR128X, "w">;
def v4i32x_info : X86VectorVTInfo<4, i32, VR128X, "d">;
def v2i64x_info : X86VectorVTInfo<2, i64, VR128X, "q">;
def v8f16x_info : X86VectorVTInfo<8, f16, VR128X, "ph">;
-def v8bf16x_info : X86VectorVTInfo<8, bf16, VR128X, "pbf16">;
+def v8bf16x_info : X86VectorVTInfo<8, bf16, VR128X, "pbh">;
def v4f32x_info : X86VectorVTInfo<4, f32, VR128X, "ps">;
def v2f64x_info : X86VectorVTInfo<2, f64, VR128X, "pd">;
diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
index 7caa1a654d5e5..e08cd1b518be5 100644
--- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h
+++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
@@ -409,17 +409,17 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(avx10_mask_vcvtph2dq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtph2ibs128, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPH2IBS, 0),
+ X86ISD::CVTP2IBS, 0),
X86_INTRINSIC_DATA(avx10_mask_vcvtph2ibs256, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPH2IBS, X86ISD::VCVTPH2IBS_RND),
+ X86ISD::CVTP2IBS, X86ISD::CVTP2IBS_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtph2ibs512, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPH2IBS, X86ISD::VCVTPH2IBS_RND),
+ X86ISD::CVTP2IBS, X86ISD::CVTP2IBS_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtph2iubs128, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPH2IUBS, 0),
+ X86ISD::CVTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_mask_vcvtph2iubs256, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPH2IUBS, X86ISD::VCVTPH2IUBS_RND),
+ X86ISD::CVTP2IUBS, X86ISD::CVTP2IUBS_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtph2iubs512, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPH2IUBS, X86ISD::VCVTPH2IUBS_RND),
+ X86ISD::CVTP2IUBS, X86ISD::CVTP2IUBS_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtph2pd256, INTR_TYPE_1OP_MASK_SAE,
ISD::FP_EXTEND, X86ISD::VFPEXT_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvtph2psx256, INTR_TYPE_1OP_MASK_SAE,
@@ -437,17 +437,17 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(avx10_mask_vcvtps2dq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtps2ibs128, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPS2IBS, 0),
+ X86ISD::CVTP2IBS, 0),
X86_INTRINSIC_DATA(avx10_mask_vcvtps2ibs256, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPS2IBS, X86ISD::VCVTPS2IBS_RND),
+ X86ISD::CVTP2IBS, X86ISD::CVTP2IBS_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtps2ibs512, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPS2IBS, X86ISD::VCVTPS2IBS_RND),
+ X86ISD::CVTP2IBS, X86ISD::CVTP2IBS_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtps2iubs128, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPS2IUBS, 0),
+ X86ISD::CVTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_mask_vcvtps2iubs256, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPS2IUBS, X86ISD::VCVTPS2IUBS_RND),
+ X86ISD::CVTP2IUBS, X86ISD::CVTP2IUBS_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtps2iubs512, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTPS2IUBS, X86ISD::VCVTPS2IUBS_RND),
+ X86ISD::CVTP2IUBS, X86ISD::CVTP2IUBS_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtps2pd256, INTR_TYPE_1OP_MASK_SAE,
ISD::FP_EXTEND, X86ISD::VFPEXT_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvtps2phx256, INTR_TYPE_1OP_MASK,
@@ -469,17 +469,17 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(avx10_mask_vcvttph2dq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTTP2SI, X86ISD::CVTTP2SI_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttph2ibs128, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTTPH2IBS, 0),
+ X86ISD::CVTTP2IBS, 0),
X86_INTRINSIC_DATA(avx10_mask_vcvttph2ibs256, INTR_TYPE_1OP_MASK_SAE,
- X86ISD::VCVTTPH2IBS, X86ISD::VCVTTPH2IBS_SAE),
+ X86ISD::CVTTP2IBS, X86ISD::CVTTP2IBS_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttph2ibs512, INTR_TYPE_1OP_MASK_SAE,
- X86ISD::VCVTTPH2IBS, X86ISD::VCVTTPH2IBS_SAE),
+ X86ISD::CVTTP2IBS, X86ISD::CVTTP2IBS_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttph2iubs128, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTTPH2IUBS, 0),
+ X86ISD::CVTTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_mask_vcvttph2iubs256, INTR_TYPE_1OP_MASK_SAE,
- X86ISD::VCVTTPH2IUBS, X86ISD::VCVTTPH2IUBS_SAE),
+ X86ISD::CVTTP2IUBS, X86ISD::CVTTP2IUBS_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttph2iubs512, INTR_TYPE_1OP_MASK_SAE,
- X86ISD::VCVTTPH2IUBS, X86ISD::VCVTTPH2IUBS_SAE),
+ X86ISD::CVTTP2IUBS, X86ISD::CVTTP2IUBS_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttph2qq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTTP2SI, X86ISD::CVTTP2SI_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttph2udq256, INTR_TYPE_1OP_MASK,
@@ -493,17 +493,17 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(avx10_mask_vcvttps2dq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTTP2SI, X86ISD::CVTTP2SI_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttps2ibs128, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTTPS2IBS, 0),
+ X86ISD::CVTTP2IBS, 0),
X86_INTRINSIC_DATA(avx10_mask_vcvttps2ibs256, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTTPS2IBS, X86ISD::VCVTTPS2IBS_SAE),
+ X86ISD::CVTTP2IBS, X86ISD::CVTTP2IBS_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttps2ibs512, INTR_TYPE_1OP_MASK_SAE,
- X86ISD::VCVTTPS2IBS, X86ISD::VCVTTPS2IBS_SAE),
+ X86ISD::CVTTP2IBS, X86ISD::CVTTP2IBS_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttps2iubs128, INTR_TYPE_1OP_MASK,
- X86ISD::VCVTTPS2IUBS, 0),
+ X86ISD::CVTTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_mask_vcvttps2iubs256, INTR_TYPE_1OP_MASK_SAE,
- X86ISD::VCVTTPS2IUBS, X86ISD::VCVTTPS2IUBS_SAE),
+ X86ISD::CVTTP2IUBS, X86ISD::CVTTP2IUBS_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttps2iubs512, INTR_TYPE_1OP_MASK_SAE,
- X86ISD::VCVTTPS2IUBS, X86ISD::VCVTTPS2IUBS_SAE),
+ X86ISD::CVTTP2IUBS, X86ISD::CVTTP2IUBS_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttps2qq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTTP2SI, X86ISD::CVTTP2SI_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvttps2udq256, INTR_TYPE_1OP_MASK,
@@ -594,30 +594,30 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86ISD::FADD_RND),
X86_INTRINSIC_DATA(avx10_vaddps256, INTR_TYPE_2OP, ISD::FADD,
X86ISD::FADD_RND),
- X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs128, INTR_TYPE_1OP,
- X86ISD::VCVTNEBF162IBS, 0),
- X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs256, INTR_TYPE_1OP,
- X86ISD::VCVTNEBF162IBS, 0),
- X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs512, INTR_TYPE_1OP,
- X86ISD::VCVTNEBF162IBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs128, INTR_TYPE_1OP, X86ISD::CVTP2IBS,
+ 0),
+ X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs256, INTR_TYPE_1OP, X86ISD::CVTP2IBS,
+ 0),
+ X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs512, INTR_TYPE_1OP, X86ISD::CVTP2IBS,
+ 0),
X86_INTRINSIC_DATA(avx10_vcvtnebf162iubs128, INTR_TYPE_1OP,
- X86ISD::VCVTNEBF162IUBS, 0),
+ X86ISD::CVTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_vcvtnebf162iubs256, INTR_TYPE_1OP,
- X86ISD::VCVTNEBF162IUBS, 0),
+ X86ISD::CVTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_vcvtnebf162iubs512, INTR_TYPE_1OP,
- X86ISD::VCVTNEBF162IUBS, 0),
+ X86ISD::CVTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_vcvttnebf162ibs128, INTR_TYPE_1OP,
- X86ISD::VCVTTNEBF162IBS, 0),
+ X86ISD::CVTTP2IBS, 0),
X86_INTRINSIC_DATA(avx10_vcvttnebf162ibs256, INTR_TYPE_1OP,
- X86ISD::VCVTTNEBF162IBS, 0),
+ X86ISD::CVTTP2IBS, 0),
X86_INTRINSIC_DATA(avx10_vcvttnebf162ibs512, INTR_TYPE_1OP,
- X86ISD::VCVTTNEBF162IBS, 0),
+ X86ISD::CVTTP2IBS, 0),
X86_INTRINSIC_DATA(avx10_vcvttnebf162iubs128, INTR_TYPE_1OP,
- X86ISD::VCVTTNEBF162IUBS, 0),
+ X86ISD::CVTTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_vcvttnebf162iubs256, INTR_TYPE_1OP,
- X86ISD::VCVTTNEBF162IUBS, 0),
+ X86ISD::CVTTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_vcvttnebf162iubs512, INTR_TYPE_1OP,
- X86ISD::VCVTTNEBF162IUBS, 0),
+ X86ISD::CVTTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_vdivpd256, INTR_TYPE_2OP, ISD::FDIV,
X86ISD::FDIV_RND),
X86_INTRINSIC_DATA(avx10_vdivph256, INTR_TYPE_2OP, ISD::FDIV,
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