[llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)
Antonio Frighetto via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 5 09:35:57 PDT 2024
================
@@ -3214,6 +3238,112 @@ bool SimplifyCFGOpt::speculativelyExecuteBB(BranchInst *BI,
BB->splice(BI->getIterator(), ThenBB, ThenBB->begin(),
std::prev(ThenBB->end()));
+ // If the target supports conditional faulting,
+ // we are looking for code like the following:
+ // \code
+ // BB:
+ // ...
+ // %cond = icmp ult %x, %y
+ // br i1 %cond, label %TrueBB, label %FalseBB
+ // FalseBB:
+ // store i32 1, ptr %q, align 4
+ // ...
+ // TrueBB:
+ // %0 = load i32, ptr %b, align 4
+ // store i32 %0, ptr %p, align 4
+ // ...
+ // \endcode
+ //
+ // and transform it into:
+ //
+ // \code
+ // BB:
+ // ...
+ // %cond = icmp ult %x, %y
+ // %0 = cload i32, ptr %b, %cond
+ // cstore i32 %0, ptr %p, %cond
+ // cstore i32 1, ptr %q, ~%cond
+ // br i1 %cond, label %TrueBB, label %FalseBB
+ // FalseBB:
+ // ...
+ // TrueBB:
+ // ...
+ // \endcode
+ //
+ // where cload/cstore is represented by intrinsic like llvm.masked.load/store,
+ // e.g.
+ //
+ // \code
+ // %vcond = bitcast i1 %cond to <1 x i1>
+ // %v0 = call <1 x i32> @llvm.masked.load.v1i32.p0
+ // (ptr %b, i32 4, <1 x i1> %vcond, <1 x i32> poison)
+ // %0 = bitcast <1 x i32> %v0 to i32
----------------
antoniofrighetto wrote:
```suggestion
// %maskedloadstore = bitcast <1 x i32> %v0 to i32
```
https://github.com/llvm/llvm-project/pull/96878
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