[llvm] [WebAssembly] Fix assertion in LowerBUILD_VECTOR (PR #101961)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-webassembly

Author: Sam Parker (sparker-arm)

<details>
<summary>Changes</summary>

The assertion was failing in the case where we were trying to lower to loadxx_zero, but lane zero was undef.

---
Full diff: https://github.com/llvm/llvm-project/pull/101961.diff


2 Files Affected:

- (modified) llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (+2-2) 
- (modified) llvm/test/CodeGen/WebAssembly/simd-build-vector.ll (+14) 


``````````diff
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 960ef90148095..563601b722c80 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -2276,9 +2276,9 @@ SDValue WebAssemblyTargetLowering::LowerBUILD_VECTOR(SDValue Op,
     };
   } else {
     size_t DestLaneSize = VecT.getVectorElementType().getFixedSizeInBits();
-    if (NumSplatLanes == 1 && (DestLaneSize == 32 || DestLaneSize == 64)) {
+    if (NumSplatLanes == 1 && Op->getOperand(0) == SplatValue &&
+        (DestLaneSize == 32 || DestLaneSize == 64)) {
       // Could be selected to load_zero.
-      assert(SplatValue == Op->getOperand(0));
       Result = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecT, SplatValue);
     } else {
       // Use a splat (which might be selected as a load splat)
diff --git a/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll b/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
index 7d295f83e8f1f..cfbec78b9d17f 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
@@ -495,6 +495,20 @@ define <4 x float> @load_zero_lane_f32x4(ptr %addr.a, ptr %addr.b, ptr %addr.c,
   ret <4 x float> %v.3
 }
 
+define <4 x float> @load_zero_undef_lane_f32x4(ptr %addr.a, ptr %addr.b) {
+; CHECK-LABEL: load_zero_undef_lane_f32x4:
+; CHECK:         .functype load_zero_undef_lane_f32x4 (i32, i32) -> (v128)
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    v128.load32_splat $push0=, 0($0)
+; CHECK-NEXT:    v128.load32_lane $push1=, 0($1), $pop0, 3
+; CHECK-NEXT:    return $pop1
+  %a = load float, ptr %addr.a
+  %b = load float, ptr %addr.b
+  %v = insertelement <4 x float> undef, float %a, i32 1
+  %v.1 = insertelement <4 x float> %v, float %b, i32 3
+  ret <4 x float> %v.1
+}
+
 define <2 x double> @load_zero_lane_f64x2(ptr %addr.a, ptr %addr.b) {
 ; CHECK-LABEL: load_zero_lane_f64x2:
 ; CHECK:         .functype load_zero_lane_f64x2 (i32, i32) -> (v128)

``````````

</details>


https://github.com/llvm/llvm-project/pull/101961