[llvm] [X86][RA] Add two address hints for compressible NDD instructions. (PR #98603)

[Freddy Ye via llvm-commits]

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@@ -1082,8 +1088,49 @@ bool X86RegisterInfo::getRegAllocationHints(Register VirtReg,
       VirtReg, Order, Hints, MF, VRM, Matrix);
 
   unsigned ID = RC.getID();
-  if (ID != X86::TILERegClassID)
+
+  if (ID != X86::TILERegClassID) {
+    if (!VRM || DisableRegAllocNDDHints)
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FreddyLeaf wrote:

[c5477fd](https://github.com/llvm/llvm-project/pull/98603/commits/c5477fdd50af255167043b9220dc2caea31434c1)

https://github.com/llvm/llvm-project/pull/98603