[llvm] [X86][RA] Add two address hints for compressible NDD instructions. (PR #98603)

[Shengchen Kan via llvm-commits]

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@@ -1082,8 +1088,44 @@ bool X86RegisterInfo::getRegAllocationHints(Register VirtReg,
       VirtReg, Order, Hints, MF, VRM, Matrix);
 
   unsigned ID = RC.getID();
-  if (ID != X86::TILERegClassID)
+
+  if (ID != X86::TILERegClassID) {
+    if (!VRM || DisableRegAllocNDDHints)
+      return BaseImplRetVal;
+
+    // Add any two address hints after any copy hints.
+    SmallSet<unsigned, 4> TwoAddrHints;
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KanRobert wrote:

Wouldn't it introduce indeterministic behavior since you push its elements into a vector? (AMX code seems a bug too.)

Maybe we should use `SmallSetVector` here.

https://github.com/llvm/llvm-project/pull/98603