[llvm] [AMDGPU] Remove some Wave64 checks for GFX10+ MC tests (NFC) (PR #100971)

via llvm-commits llvm-commits at lists.llvm.org
Sun Jul 28 22:06:30 PDT 2024 

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Changpeng Fang (changpeng)

<details>
<summary>Changes</summary>

  It is unnecessary (and redundant) to check for both Wave32 and Wave64 if the same code is generated (WaveSizePredicate is not specified in instruction definitions). This work removes such Wave64 checks. Additionally, we also remove related target attribute setting of +wavefronsize32 because it is default for GFX10+.

---

Patch is 74.21 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/100971.diff


96 Files Affected:

- (modified) llvm/test/MC/AMDGPU/gfx1013.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx1030_unsupported.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx10_asm_ds.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx10_asm_err.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx10_asm_flat.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx10_asm_smem.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx10_asm_sop.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx10_asm_vop1.s (+2-4) 
- (modified) llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx10_err_pos.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx10_unsupported.s (+2-3) 
- (modified) llvm/test/MC/AMDGPU/gfx10_unsupported_dpp.s (+2-3) 
- (modified) llvm/test/MC/AMDGPU/gfx10_unsupported_e32.s (+2-3) 
- (modified) llvm/test/MC/AMDGPU/gfx10_unsupported_e64.s (+2-3) 
- (modified) llvm/test/MC/AMDGPU/gfx10_unsupported_e64_dpp.s (+2-3) 
- (modified) llvm/test/MC/AMDGPU/gfx10_unsupported_sdwa.s (+2-3) 
- (modified) llvm/test/MC/AMDGPU/gfx11-promotions.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_flat.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1-fake16.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16-fake16.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8-fake16.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err-fake16.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1-fake16.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1-fake16.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_err.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp16.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp8.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_asm_vopd.s (-1) 
- (modified) llvm/test/MC/AMDGPU/gfx11_unsupported.s (+2-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_unsupported_dpp.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_unsupported_e32.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_unsupported_e64.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa-fake16.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop1.s (+2-4) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s (+2-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop2_aliases.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_err.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3p_aliases.s (+1-1) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp16.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp8.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s (+1-2) 
- (modified) llvm/test/MC/AMDGPU/gfx12_asm_vopd.s (-1) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_ds.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_smem.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_sop1.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_sopc.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_sopk.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp8.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_sdwa.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx_sdwa.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt (+2-4) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopd.txt (+1-1) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt (+1-2) 
- (modified) llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopd.txt (+1-1) 


``````````diff
diff --git a/llvm/test/MC/AMDGPU/gfx1013.s b/llvm/test/MC/AMDGPU/gfx1013.s
index f8bad215fdc5a..065731857fdf8 100644
--- a/llvm/test/MC/AMDGPU/gfx1013.s
+++ b/llvm/test/MC/AMDGPU/gfx1013.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1013 -show-encoding %s | FileCheck %s
 
 image_bvh64_intersect_ray v[5:8], v[1:12], s[8:11]
 // CHECK: [0x01,0x9f,0x9c,0xf1,0x01,0x05,0x02,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx1030_unsupported.s b/llvm/test/MC/AMDGPU/gfx1030_unsupported.s
index da1fb512fec98..4b88c420819d0 100644
--- a/llvm/test/MC/AMDGPU/gfx1030_unsupported.s
+++ b/llvm/test/MC/AMDGPU/gfx1030_unsupported.s
@@ -1,5 +1,4 @@
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1030 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1030 -mattr=+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1030 %s 2>&1 | FileCheck --implicit-check-not=error: %s
 
 v_mul_lo_i32 v0, v1, v2
 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_ds.s b/llvm/test/MC/AMDGPU/gfx10_asm_ds.s
index ccdcd2262f9a4..c9c3f0dfb2cf1 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_ds.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_ds.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
 
 //===----------------------------------------------------------------------===//
 // ENC_DS.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_err.s b/llvm/test/MC/AMDGPU/gfx10_asm_err.s
index eee26196623d6..d98d45567c56e 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_err.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_err.s
@@ -2,8 +2,7 @@
 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx701 %s 2>&1 | FileCheck --check-prefixes=GFX6-7,GFX6-8,GFX6-9 --implicit-check-not=error: %s
 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx801 %s 2>&1 | FileCheck --check-prefixes=GFX6-8,GFX6-9,GFX8-9 --implicit-check-not=error: %s
 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefixes=GFX6-9,GFX8-9 --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --check-prefixes=GFX10 --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=GFX10 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefixes=GFX10 --implicit-check-not=error: %s
 
 //===----------------------------------------------------------------------===//
 // ENC_DS.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_flat.s b/llvm/test/MC/AMDGPU/gfx10_asm_flat.s
index 4a375c224b122..be1ed7e671d27 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_flat.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_flat.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
 
 //===----------------------------------------------------------------------===//
 // ENC_FLAT.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s b/llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
index 95c22ef8ce283..4ea3369a729bd 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
 
 //===----------------------------------------------------------------------===//
 // ENC_MUBUF.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_smem.s b/llvm/test/MC/AMDGPU/gfx10_asm_smem.s
index b582de83a2f29..0721b22c8858b 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_smem.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_smem.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
 
 //===----------------------------------------------------------------------===//
 // ENC_SMEM.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_sop.s b/llvm/test/MC/AMDGPU/gfx10_asm_sop.s
index c35b04c20c8c3..4e7022bd486f9 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_sop.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_sop.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
 
 //===----------------------------------------------------------------------===//
 // ENC_SOP1.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx10_asm_vop1.s
index 3cc25501ff7c0..8102f13567d69 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_vop1.s
@@ -1,7 +1,5 @@
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010  %s 2>&1 | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s
 
 //===----------------------------------------------------------------------===//
 // ENC_VOP1.
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s b/llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s
index e323603e3308c..c346c34f94698 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
 
 //===----------------------------------------------------------------------===//
 // ENC_VOPC - v_cmpx_* opcodes.
diff --git a/llvm/test/MC/AMDGPU/gfx10_err_pos.s b/llvm/test/MC/AMDGPU/gfx10_err_pos.s
index 4db454f0ced5a..ee101379acf54 100644
--- a/llvm/test/MC/AMDGPU/gfx10_err_pos.s
+++ b/llvm/test/MC/AMDGPU/gfx10_err_pos.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
 
 //==============================================================================
 // operands are not valid for this GPU or mode
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported.s b/llvm/test/MC/AMDGPU/gfx10_unsupported.s
index 46b4e6ffb4037..ba4080614aea3 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported.s
@@ -1,6 +1,5 @@
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --check-prefixes=CHECK,GFX1010 --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 %s 2>&1 | FileCheck --check-prefixes=CHECK,GFX1010 --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefixes=CHECK,GFX1010 --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 %s 2>&1 | FileCheck --implicit-check-not=error: %s
 
 buffer_atomic_add_f32 v0, v2, s[4:7], 0 idxen glc
 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported_dpp.s b/llvm/test/MC/AMDGPU/gfx10_unsupported_dpp.s
index aa8f36d0da64a..96b132ef650d7 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported_dpp.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported_dpp.s
@@ -1,6 +1,5 @@
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010  %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013  %s 2>&1 | FileCheck --implicit-check-not=error: %s
 
 v_add_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported_e32.s b/llvm/test/MC/AMDGPU/gfx10_unsupported_e32.s
index 4d0c0a4a21b18..3ff2288a15653 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported_e32.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported_e32.s
@@ -1,6 +1,5 @@
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 %s 2>&1 | FileCheck --implicit-check-not=error: %s
 
 v_add_co_u32_e32 v2, vcc, s0, v2
 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: e32 variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported_e64.s b/llvm/test/MC/AMDGPU/gfx10_unsupported_e64.s
index 1b4f978c64971..18dbf0a2ea93f 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported_e64.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported_e64.s
@@ -1,6 +1,5 @@
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 %s 2>&1 | FileCheck --implicit-check-not=error: %s
 
 v_swap_b32_e64 v1, v2
 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: e64 variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported_e64_dpp.s b/llvm/test/MC/AMDGPU/gfx10_unsupported_e64_dpp.s
index f60473c761fd4..430024b338efb 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported_e64_dpp.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported_e64_dpp.s
@@ -1,6 +1,5 @@
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 %s 2>&1 | FileCheck --implicit-check-not=error: %s
 
 v_add3_u32_e64_dpp v5, v1, s1, v0 dpp8:[7,6,5,4,3,2,1,0]
 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: e64_dpp variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx10_unsupported_sdwa.s b/llvm/test/MC/AMDGPU/gfx10_unsupported_sdwa.s
index 88db110ad9c20..1e503f028f45c 100644
--- a/llvm/test/MC/AMDGPU/gfx10_unsupported_sdwa.s
+++ b/llvm/test/MC/AMDGPU/gfx10_unsupported_sdwa.s
@@ -1,6 +1,5 @@
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 %s 2>&1 | FileCheck --implicit-check-not=error: %s
 
 v_add_co_u32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported
diff --git a/llvm/test/MC/AMDGPU/gfx11-promotions.s b/llvm/test/MC/AMDGPU/gfx11-promotions.s
index c92fb45c79d02..314fa9e6f9cc1 100644
--- a/llvm/test/MC/AMDGPU/gfx11-promotions.s
+++ b/llvm/test/MC/AMDGPU/gfx11-promotions.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1100 -mattr=+wavefrontsize32 %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1100 %s | FileCheck --check-prefix=GFX11 %s
 
 // Check opcode promotions and forced suffices.
 // 1. When a suffix is optional, check that it may be omitted.
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_flat.s b/llvm/test/MC/AMDGPU/gfx11_asm_flat.s
index 6add0c12d0944..bb6c2807c90f3 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_flat.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_flat.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
 
 //===----------------------------------------------------------------------===//
 // FLAT.
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1-fake16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1-fake16.s
index c590d42c0dc66..7b22284f1098e 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1-fake16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1-fake16.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
 
 v_floor_f16 v5, v1
 // GFX11: encoding: [0x01,0xb7,0x0a,0x7e]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
index d95ef6f15e48d..d7473428754ec 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
 
 v_bfrev_b32_e32 v5, v1
 // GFX11: encoding: [0x01,0x71,0x0a,0x7e]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16-fake16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16-fake16.s
index 6cf3900dd3f0d..d3915e9be1b38 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16-fake16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16-fake16.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
 
 v_floor_f16 v5, v1 quad_perm:[3,2,1,0]
 // GFX11: encoding: [0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
index fea36e9f22144..9e6b562ad437a 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
 
 v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0]
 // GFX11: encoding: [0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8-fake16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8-fake16.s
index 2b06f4597fd2f..f770ef0cb7c1f 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8-fake16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8-fake16.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
 
 v_floor_f16 v5, v1 dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: encoding: [0xe9,0xb6,0x0a,0x7e,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
index fc9079fc54282..f5cc5c1211735 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
@@ -1,5 +1,4 @@
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
-// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
 
 v_bfrev_b32_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: encoding: [0xe9,0x70,0x0a,0x7e,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err-fake16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err-fake16.s
index 2cc67c23809b9..e9dcb090d291c 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err-fake16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err-fake16.s
@@ -1,5 +1,4 @@
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16,+wavefrontsize32 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
-// RUN: n...
[truncated]

``````````

</details>


https://github.com/llvm/llvm-project/pull/100971

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